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authorNathaniel Graff <nathaniel.graff@sifive.com>2019-06-21 21:05:11 +0000
committerGitHub <noreply@github.com>2019-06-21 21:05:11 +0000
commit543c5f1122f39fc5791a31bc3c8d714108acf8d1 (patch)
treee810c8fe1496b26a55cb9de24a4d78cbecafd850 /bsp/qemu-sifive-s51/design.dts
parente126922df3d5ac193d34b9a3b8bcb88625adec4a (diff)
parent9b807f144969bed818e1f14d0cfdcfc277f492c5 (diff)
Merge pull request #293 from sifive/update-targets
Update BSPs
Diffstat (limited to 'bsp/qemu-sifive-s51/design.dts')
-rw-r--r--bsp/qemu-sifive-s51/design.dts10
1 files changed, 5 insertions, 5 deletions
diff --git a/bsp/qemu-sifive-s51/design.dts b/bsp/qemu-sifive-s51/design.dts
index 083653e..fce4a4a 100644
--- a/bsp/qemu-sifive-s51/design.dts
+++ b/bsp/qemu-sifive-s51/design.dts
@@ -50,7 +50,7 @@
clock-frequency = <16000000>;
};
hfxoscout: clock@1 {
- compatible = "sifive,fs510-g000,hfxosc";
+ compatible = "sifive,fe310-g000,hfxosc";
clocks = <&hfxoscin>;
reg = <&prci 0x4>;
reg-names = "config";
@@ -61,13 +61,13 @@
clock-frequency = <72000000>;
};
hfroscout: clock@3 {
- compatible = "sifive,fs510-g000,hfrosc";
+ compatible = "sifive,fe310-g000,hfrosc";
clocks = <&hfroscin>;
reg = <&prci 0x0>;
reg-names = "config";
};
hfclk: clock@4 {
- compatible = "sifive,fs510-g000,pll";
+ compatible = "sifive,fe310-g000,pll";
clocks = <&hfxoscout &hfroscout>;
clock-names = "pllref", "pllsel0";
reg = <&prci 0x8 &prci 0xc>;
@@ -81,7 +81,7 @@
clock-frequency = <32000000>;
};
lfclk: clock@6 {
- compatible = "sifive,fs510-g000,lfrosc";
+ compatible = "sifive,fe310-g000,lfrosc";
clocks = <&lfroscin>;
reg = <&aon 0x70>;
reg-names = "config";
@@ -94,7 +94,7 @@
};
prci: prci@10008000 {
- compatible = "sifive,fs510-g000,prci";
+ compatible = "sifive,fe310-g000,prci";
reg = <0x10008000 0x8000>;
reg-names = "mem";
};