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author | Bunnaroath Sou <35707615+bsousi5@users.noreply.github.com> | 2019-03-06 12:21:03 -0800 |
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committer | GitHub <noreply@github.com> | 2019-03-06 12:21:03 -0800 |
commit | c71689996d85011f3d493b8cbe75e1379bdbc932 (patch) | |
tree | e098bff2a7c45b7860173fb65c3488d8eb7f29c6 /bsp/qemu-sifive-s51/design.reglist | |
parent | f7601b8a833502a34047af50ebb200d543e81da7 (diff) | |
parent | f7a18d3711b3bb04b7ed8294a0e47599ac15cf45 (diff) |
Merge pull request #192 from sifive/arty-19.2
Update/add E20, E21, E24 arty targets for all 19.2 CoreIPs release
Diffstat (limited to 'bsp/qemu-sifive-s51/design.reglist')
0 files changed, 0 insertions, 0 deletions