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authorNathaniel Graff <nathaniel.graff@sifive.com>2019-06-21 21:05:11 +0000
committerGitHub <noreply@github.com>2019-06-21 21:05:11 +0000
commit543c5f1122f39fc5791a31bc3c8d714108acf8d1 (patch)
treee810c8fe1496b26a55cb9de24a4d78cbecafd850 /bsp/qemu-sifive-s51
parente126922df3d5ac193d34b9a3b8bcb88625adec4a (diff)
parent9b807f144969bed818e1f14d0cfdcfc277f492c5 (diff)
Merge pull request #293 from sifive/update-targets
Update BSPs
Diffstat (limited to 'bsp/qemu-sifive-s51')
-rw-r--r--bsp/qemu-sifive-s51/design.dts10
-rw-r--r--bsp/qemu-sifive-s51/metal-inline.h6
-rw-r--r--bsp/qemu-sifive-s51/metal-platform.h6
-rw-r--r--bsp/qemu-sifive-s51/metal.default.lds6
-rw-r--r--bsp/qemu-sifive-s51/metal.h12
-rw-r--r--bsp/qemu-sifive-s51/metal.ramrodata.lds6
-rw-r--r--bsp/qemu-sifive-s51/metal.scratchpad.lds6
7 files changed, 26 insertions, 26 deletions
diff --git a/bsp/qemu-sifive-s51/design.dts b/bsp/qemu-sifive-s51/design.dts
index 083653e..fce4a4a 100644
--- a/bsp/qemu-sifive-s51/design.dts
+++ b/bsp/qemu-sifive-s51/design.dts
@@ -50,7 +50,7 @@
clock-frequency = <16000000>;
};
hfxoscout: clock@1 {
- compatible = "sifive,fs510-g000,hfxosc";
+ compatible = "sifive,fe310-g000,hfxosc";
clocks = <&hfxoscin>;
reg = <&prci 0x4>;
reg-names = "config";
@@ -61,13 +61,13 @@
clock-frequency = <72000000>;
};
hfroscout: clock@3 {
- compatible = "sifive,fs510-g000,hfrosc";
+ compatible = "sifive,fe310-g000,hfrosc";
clocks = <&hfroscin>;
reg = <&prci 0x0>;
reg-names = "config";
};
hfclk: clock@4 {
- compatible = "sifive,fs510-g000,pll";
+ compatible = "sifive,fe310-g000,pll";
clocks = <&hfxoscout &hfroscout>;
clock-names = "pllref", "pllsel0";
reg = <&prci 0x8 &prci 0xc>;
@@ -81,7 +81,7 @@
clock-frequency = <32000000>;
};
lfclk: clock@6 {
- compatible = "sifive,fs510-g000,lfrosc";
+ compatible = "sifive,fe310-g000,lfrosc";
clocks = <&lfroscin>;
reg = <&aon 0x70>;
reg-names = "config";
@@ -94,7 +94,7 @@
};
prci: prci@10008000 {
- compatible = "sifive,fs510-g000,prci";
+ compatible = "sifive,fe310-g000,prci";
reg = <0x10008000 0x8000>;
reg-names = "mem";
};
diff --git a/bsp/qemu-sifive-s51/metal-inline.h b/bsp/qemu-sifive-s51/metal-inline.h
index eafd455..6ef4db2 100644
--- a/bsp/qemu-sifive-s51/metal-inline.h
+++ b/bsp/qemu-sifive-s51/metal-inline.h
@@ -5,8 +5,8 @@
#ifndef ASSEMBLY
-#ifndef QEMU_SIFIVE_S51__METAL_INLINE_H
-#define QEMU_SIFIVE_S51__METAL_INLINE_H
+#ifndef QEMU_SIFIVE_S51____METAL_INLINE_H
+#define QEMU_SIFIVE_S51____METAL_INLINE_H
#include <metal/machine.h>
@@ -245,5 +245,5 @@ struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = {
};
-#endif /* QEMU_SIFIVE_S51__METAL_INLINE_H*/
+#endif /* QEMU_SIFIVE_S51____METAL_INLINE_H*/
#endif /* ! ASSEMBLY */
diff --git a/bsp/qemu-sifive-s51/metal-platform.h b/bsp/qemu-sifive-s51/metal-platform.h
index 650fdbd..fae3cf9 100644
--- a/bsp/qemu-sifive-s51/metal-platform.h
+++ b/bsp/qemu-sifive-s51/metal-platform.h
@@ -3,8 +3,8 @@
/* ----------------------------------- */
/* ----------------------------------- */
-#ifndef QEMU_SIFIVE_S51__METAL_PLATFORM_H
-#define QEMU_SIFIVE_S51__METAL_PLATFORM_H
+#ifndef QEMU_SIFIVE_S51____METAL_PLATFORM_H
+#define QEMU_SIFIVE_S51____METAL_PLATFORM_H
/* From clock@0 */
#define METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY 16000000UL
@@ -219,4 +219,4 @@
#define METAL_SIFIVE_UART0_IP 20UL
#define METAL_SIFIVE_UART0_DIV 24UL
-#endif /* QEMU_SIFIVE_S51__METAL_PLATFORM_H*/
+#endif /* QEMU_SIFIVE_S51____METAL_PLATFORM_H*/
diff --git a/bsp/qemu-sifive-s51/metal.default.lds b/bsp/qemu-sifive-s51/metal.default.lds
index 6bd988b..1f14be5 100644
--- a/bsp/qemu-sifive-s51/metal.default.lds
+++ b/bsp/qemu-sifive-s51/metal.default.lds
@@ -94,12 +94,12 @@ SECTIONS
} >flash AT>flash :flash
- .finit_array :
+ .fini_array :
{
- PROVIDE_HIDDEN (__finit_array_start = .);
+ PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__finit_array_end = .);
+ PROVIDE_HIDDEN (__fini_array_end = .);
} >flash AT>flash :flash
diff --git a/bsp/qemu-sifive-s51/metal.h b/bsp/qemu-sifive-s51/metal.h
index 3d3df92..e61ca6e 100644
--- a/bsp/qemu-sifive-s51/metal.h
+++ b/bsp/qemu-sifive-s51/metal.h
@@ -9,8 +9,8 @@
#ifdef __METAL_MACHINE_MACROS
-#ifndef MACROS_IF_QEMU_SIFIVE_S51__METAL_H
-#define MACROS_IF_QEMU_SIFIVE_S51__METAL_H
+#ifndef MACROS_IF_QEMU_SIFIVE_S51____METAL_H
+#define MACROS_IF_QEMU_SIFIVE_S51____METAL_H
#define __METAL_CLINT_NUM_PARENTS 2
@@ -31,12 +31,12 @@
#define __METAL_CLIC_SUBINTERRUPTS 0
#endif
-#endif /* MACROS_IF_SIFIVE_HIFIVE1__METAL_H*/
+#endif /* MACROS_IF_QEMU_SIFIVE_S51____METAL_H*/
#else /* ! __METAL_MACHINE_MACROS */
-#ifndef MACROS_ELSE_SIFIVE_HIFIVE1__METAL_H
-#define MACROS_ELSE_SIFIVE_HIFIVE1__METAL_H
+#ifndef MACROS_ELSE_QEMU_SIFIVE_S51____METAL_H
+#define MACROS_ELSE_QEMU_SIFIVE_S51____METAL_H
#define __METAL_CLINT_2000000_INTERRUPTS 2
@@ -861,7 +861,7 @@ struct __metal_driver_sifive_spi0 *__metal_spi_table[] = {
#define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4)
-#endif /* MACROS_ELSE_QEMU_SIFIVE_S51__METAL_H*/
+#endif /* MACROS_ELSE_QEMU_SIFIVE_S51____METAL_H*/
#endif /* ! __METAL_MACHINE_MACROS */
diff --git a/bsp/qemu-sifive-s51/metal.ramrodata.lds b/bsp/qemu-sifive-s51/metal.ramrodata.lds
index 3322e4a..9f25258 100644
--- a/bsp/qemu-sifive-s51/metal.ramrodata.lds
+++ b/bsp/qemu-sifive-s51/metal.ramrodata.lds
@@ -74,12 +74,12 @@ SECTIONS
} >flash AT>flash :flash
- .finit_array :
+ .fini_array :
{
- PROVIDE_HIDDEN (__finit_array_start = .);
+ PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__finit_array_end = .);
+ PROVIDE_HIDDEN (__fini_array_end = .);
} >flash AT>flash :flash
diff --git a/bsp/qemu-sifive-s51/metal.scratchpad.lds b/bsp/qemu-sifive-s51/metal.scratchpad.lds
index 14e64ea..6eceaaf 100644
--- a/bsp/qemu-sifive-s51/metal.scratchpad.lds
+++ b/bsp/qemu-sifive-s51/metal.scratchpad.lds
@@ -94,12 +94,12 @@ SECTIONS
} >ram AT>ram :ram
- .finit_array :
+ .fini_array :
{
- PROVIDE_HIDDEN (__finit_array_start = .);
+ PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__finit_array_end = .);
+ PROVIDE_HIDDEN (__fini_array_end = .);
} >ram AT>ram :ram
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 07:51:46 +0000