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authorNathaniel Graff <nathaniel.graff@sifive.com>2019-04-04 09:59:15 -0700
committerNathaniel Graff <nathaniel.graff@sifive.com>2019-04-12 13:47:41 -0700
commit4be70b922c864c682135d5c66743b6b4c6a51c8f (patch)
tree2e312e1dcfff061e8cccd5b8736d0c274f9a5984 /bsp/sifive-hifive-unleashed/openocd.cfg
parent41b5a7fa29179221628abc340bdaa67fb7704a6f (diff)
Add HiFive Unleashed board files
Includes: - design.dts (including nodes for Vera board hardware) - openocd.cfg - settings.mk - README.md Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'bsp/sifive-hifive-unleashed/openocd.cfg')
-rw-r--r--bsp/sifive-hifive-unleashed/openocd.cfg24
1 files changed, 24 insertions, 0 deletions
diff --git a/bsp/sifive-hifive-unleashed/openocd.cfg b/bsp/sifive-hifive-unleashed/openocd.cfg
new file mode 100644
index 0000000..7589897
--- /dev/null
+++ b/bsp/sifive-hifive-unleashed/openocd.cfg
@@ -0,0 +1,24 @@
+adapter_khz 10000
+
+interface ftdi
+ftdi_device_desc "Dual RS232-HS"
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_layout_init 0x0008 0x001b
+ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME 0x10040000
+init
+halt
+
+# Uncomment this if you want to be able to clobber your SPI Flash, which
+# probably you don't since you can do it through Linux
+
+# flash protect 0 0 last off