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author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-22 17:53:09 +0000 |
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committer | GitHub <noreply@github.com> | 2019-05-22 17:53:09 +0000 |
commit | 44deff8b8d615721c11ab5f408da73030b01d0f9 (patch) | |
tree | 34cd2bb52009a596dc8de95bf2b7262f5a6ce3f9 /bsp/sifive-hifive1-revb/design.dts | |
parent | 9946f2062837098088e4c9701614a2eeffaa921b (diff) | |
parent | c5dd42c68d030a356c85bb8d174296b4f2df615d (diff) |
Merge pull request #254 from sifive/dts-pmpregions
Update to new-style riscv,pmpregions property
Diffstat (limited to 'bsp/sifive-hifive1-revb/design.dts')
-rw-r--r-- | bsp/sifive-hifive1-revb/design.dts | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/bsp/sifive-hifive1-revb/design.dts b/bsp/sifive-hifive1-revb/design.dts index 0e48622..970d3be 100644 --- a/bsp/sifive-hifive1-revb/design.dts +++ b/bsp/sifive-hifive1-revb/design.dts @@ -25,6 +25,7 @@ next-level-cache = <&spi0>; reg = <0>; riscv,isa = "rv32imac"; + riscv,pmpregions = <8>; sifive,dtim = <&dtim>; status = "okay"; timebase-frequency = <1000000>; @@ -43,12 +44,6 @@ #clock-cells = <1>; compatible = "sifive,hifive1"; ranges; - - pmp: pmp@0 { - compatible = "riscv,pmp"; - regions = <8>; - }; - hfxoscin: clock@0 { #clock-cells = <0>; compatible = "fixed-clock"; |