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authorNathaniel Graff <nathaniel.graff@sifive.com>2019-04-03 12:50:13 -0700
committerNathaniel Graff <nathaniel.graff@sifive.com>2019-04-12 13:47:41 -0700
commit02dc7f4f76e4f6c2cb31207b14f261fec49f98ce (patch)
tree2f89fbb85686a7946a4e8c966a097fdb2eddff12 /bsp/sifive-hifive1-revb
parent767f807a613f955ededa172f2ddc39f07ce85585 (diff)
Update BSPs for Unleashed and U54(MC)
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'bsp/sifive-hifive1-revb')
-rw-r--r--bsp/sifive-hifive1-revb/metal.default.lds2
-rw-r--r--bsp/sifive-hifive1-revb/metal.h80
-rw-r--r--bsp/sifive-hifive1-revb/metal.ramrodata.lds2
-rw-r--r--bsp/sifive-hifive1-revb/metal.scratchpad.lds1
4 files changed, 62 insertions, 23 deletions
diff --git a/bsp/sifive-hifive1-revb/metal.default.lds b/bsp/sifive-hifive1-revb/metal.default.lds
index 878e09e..7a08d34 100644
--- a/bsp/sifive-hifive1-revb/metal.default.lds
+++ b/bsp/sifive-hifive1-revb/metal.default.lds
@@ -20,6 +20,7 @@ PHDRS
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
+ PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
@@ -217,7 +218,6 @@ SECTIONS
{
PROVIDE( metal_segment_heap_target_start = . );
. = __heap_size;
- . = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram);
PROVIDE( metal_segment_heap_target_end = . );
PROVIDE( _heap_end = . );
} >ram AT>ram :ram
diff --git a/bsp/sifive-hifive1-revb/metal.h b/bsp/sifive-hifive1-revb/metal.h
index 83ac0e1..a5d90e5 100644
--- a/bsp/sifive-hifive1-revb/metal.h
+++ b/bsp/sifive-hifive1-revb/metal.h
@@ -5,11 +5,21 @@
#ifdef __METAL_MACHINE_MACROS
+#define __METAL_CLINT_NUM_PARENTS 2
+
+#ifndef __METAL_CLINT_NUM_PARENTS
+#define __METAL_CLINT_NUM_PARENTS 0
+#endif
#define __METAL_PLIC_SUBINTERRUPTS 27
+#define __METAL_PLIC_NUM_PARENTS 1
+
#ifndef __METAL_PLIC_SUBINTERRUPTS
#define __METAL_PLIC_SUBINTERRUPTS 0
#endif
+#ifndef __METAL_PLIC_NUM_PARENTS
+#define __METAL_PLIC_NUM_PARENTS 0
+#endif
#ifndef __METAL_CLIC_SUBINTERRUPTS
#define __METAL_CLIC_SUBINTERRUPTS 0
#endif
@@ -20,12 +30,16 @@
#define METAL_MAX_CLINT_INTERRUPTS 2
+#define __METAL_CLINT_NUM_PARENTS 2
+
#define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1
#define __METAL_PLIC_SUBINTERRUPTS 27
#define METAL_MAX_PLIC_INTERRUPTS 1
+#define __METAL_PLIC_NUM_PARENTS 1
+
#define __METAL_CLIC_SUBINTERRUPTS 0
#define METAL_MAX_CLIC_INTERRUPTS 0
@@ -45,6 +59,7 @@
#include <metal/drivers/fixed-clock.h>
+#include <metal/memory.h>
#include <metal/drivers/riscv,clint0.h>
#include <metal/drivers/riscv,cpu.h>
#include <metal/drivers/riscv,plic0.h>
@@ -70,6 +85,12 @@ struct __metal_driver_fixed_clock __metal_dt_clock_2;
asm (".weak __metal_dt_clock_5");
struct __metal_driver_fixed_clock __metal_dt_clock_5;
+asm (".weak __metal_dt_mem_dtim_80000000");
+struct metal_memory __metal_dt_mem_dtim_80000000;
+
+asm (".weak __metal_dt_mem_spi_10014000");
+struct metal_memory __metal_dt_mem_spi_10014000;
+
/* From clint@2000000 */
asm (".weak __metal_dt_clint_2000000");
struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
@@ -78,9 +99,8 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
asm (".weak __metal_dt_cpu_0");
struct __metal_driver_cpu __metal_dt_cpu_0;
-/* From interrupt_controller */
-asm (".weak __metal_dt_interrupt_controller");
-struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller;
+asm (".weak __metal_dt_cpu_0_interrupt_controller");
+struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller;
/* From interrupt_controller@c000000 */
asm (".weak __metal_dt_interrupt_controller_c000000");
@@ -143,6 +163,28 @@ struct __metal_driver_fixed_clock __metal_dt_clock_5 = {
.rate = 32000000UL,
};
+struct metal_memory __metal_dt_mem_dtim_80000000 = {
+ ._base_address = 2147483648UL,
+ ._size = 16384UL,
+ ._attrs = {
+ .R = 1,
+ .W = 1,
+ .X = 1,
+ .C = 1,
+ .A = 1},
+};
+
+struct metal_memory __metal_dt_mem_spi_10014000 = {
+ ._base_address = 536870912UL,
+ ._size = 500000UL,
+ ._attrs = {
+ .R = 1,
+ .W = 1,
+ .X = 1,
+ .C = 1,
+ .A = 1},
+};
+
/* From clint@2000000 */
struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
.vtable = &__metal_driver_vtable_riscv_clint0,
@@ -151,8 +193,9 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
.control_size = 65536UL,
.init_done = 0,
.num_interrupts = METAL_MAX_CLINT_INTERRUPTS,
- .interrupt_parent = &__metal_dt_interrupt_controller.controller,
+ .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller,
.interrupt_lines[0] = 3,
+ .interrupt_parents[1] = &__metal_dt_cpu_0_interrupt_controller.controller,
.interrupt_lines[1] = 7,
};
@@ -161,11 +204,11 @@ struct __metal_driver_cpu __metal_dt_cpu_0 = {
.vtable = &__metal_driver_vtable_cpu,
.cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable,
.timebase = 1000000UL,
- .interrupt_controller = &__metal_dt_interrupt_controller.controller,
+ .interrupt_controller = &__metal_dt_cpu_0_interrupt_controller.controller,
};
/* From interrupt_controller */
-struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = {
+struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = {
.vtable = &__metal_driver_vtable_riscv_cpu_intc,
.controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable,
.init_done = 0,
@@ -177,9 +220,8 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
.vtable = &__metal_driver_vtable_riscv_plic0,
.controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable,
.init_done = 0,
-/* From interrupt_controller */
- .interrupt_parent = &__metal_dt_interrupt_controller.controller,
- .interrupt_line = 11UL,
+ .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller,
+ .interrupt_lines[0] = 11,
.control_base = 201326592UL,
.control_size = 67108864UL,
.max_priority = 7UL,
@@ -197,8 +239,7 @@ struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_externa
.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0,
.irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable,
.init_done = 0,
-/* From interrupt_controller */
- .interrupt_parent = &__metal_dt_interrupt_controller.controller,
+ .interrupt_parent = &__metal_dt_cpu_0_interrupt_controller.controller,
.num_interrupts = METAL_MAX_LOCAL_EXT_INTERRUPTS,
.interrupt_lines[0] = 16,
.interrupt_lines[1] = 17,
@@ -324,6 +365,13 @@ struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = {
};
+#define __METAL_DT_MAX_MEMORIES 2
+
+asm (".weak __metal_memory_table");
+struct metal_memory *__metal_memory_table[] = {
+ &__metal_dt_mem_dtim_80000000,
+ &__metal_dt_mem_spi_10014000};
+
/* From serial@10013000 */
#define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_10013000.uart)
@@ -336,22 +384,12 @@ struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = {
#define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller)
-/* From cpu@0 */
-#define __METAL_DT_RISCV_CPU_HANDLE (&__metal_dt_cpu_0.cpu)
-
-#define __METAL_DT_CPU_0_HANDLE (&__metal_dt_cpu_0.cpu)
-
#define __METAL_DT_MAX_HARTS 1
asm (".weak __metal_cpu_table");
struct __metal_driver_cpu *__metal_cpu_table[] = {
&__metal_dt_cpu_0};
-/* From interrupt_controller */
-#define __METAL_DT_RISCV_CPU_INTC_HANDLE (&__metal_dt_interrupt_controller.controller)
-
-#define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller)
-
/* From interrupt_controller@c000000 */
#define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
diff --git a/bsp/sifive-hifive1-revb/metal.ramrodata.lds b/bsp/sifive-hifive1-revb/metal.ramrodata.lds
index 5f7b6d3..cf49d3b 100644
--- a/bsp/sifive-hifive1-revb/metal.ramrodata.lds
+++ b/bsp/sifive-hifive1-revb/metal.ramrodata.lds
@@ -20,6 +20,7 @@ PHDRS
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
+ PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
@@ -214,7 +215,6 @@ SECTIONS
{
PROVIDE( metal_segment_heap_target_start = . );
. = __heap_size;
- . = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram);
PROVIDE( metal_segment_heap_target_end = . );
PROVIDE( _heap_end = . );
} >ram AT>ram :ram
diff --git a/bsp/sifive-hifive1-revb/metal.scratchpad.lds b/bsp/sifive-hifive1-revb/metal.scratchpad.lds
index 416f203..8ab46ed 100644
--- a/bsp/sifive-hifive1-revb/metal.scratchpad.lds
+++ b/bsp/sifive-hifive1-revb/metal.scratchpad.lds
@@ -20,6 +20,7 @@ PHDRS
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
+ PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;