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author | Bunnaroath Sou <bsou@sifive.com> | 2019-02-11 17:03:33 -0800 |
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committer | Bunnaroath Sou <bsou@sifive.com> | 2019-02-11 17:03:33 -0800 |
commit | 5016845c243e08c21e21c623c33c744da5689f6f (patch) | |
tree | a0ac1ea6bf16c93a9f31b5ab825ae8f2e65f24cc /bsp/sifive-hifive1 | |
parent | 9fbff1434211e4e6e3e0fa18316eeadc484b2986 (diff) |
Update BSPs for hw-exec-breakpoint
Diffstat (limited to 'bsp/sifive-hifive1')
-rw-r--r-- | bsp/sifive-hifive1/design.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/bsp/sifive-hifive1/design.dts b/bsp/sifive-hifive1/design.dts index abccd6c..ff95ae0 100644 --- a/bsp/sifive-hifive1/design.dts +++ b/bsp/sifive-hifive1/design.dts @@ -28,6 +28,7 @@ sifive,dtim = <&dtim>; status = "okay"; timebase-frequency = <1000000>; + hardware-exec-breakpoint-count = <4>; hlic: interrupt-controller { #interrupt-cells = <1>; compatible = "riscv,cpu-intc"; |