diff options
author | hsiang-chia.huang <hsiangchia.huang@sifive.com> | 2019-05-24 10:22:08 +0800 |
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committer | GitHub <noreply@github.com> | 2019-05-24 10:22:08 +0800 |
commit | faf58a49c3b6421107ada0e8af43170a5ffafcea (patch) | |
tree | 3996d52a748ae2420b5c9c6c9efe4158d5dece53 /bsp/sifive-hifive1 | |
parent | 7817c5e85cb6f9f6d5b98f6702fa4b7d1fb99e02 (diff) | |
parent | 2c0269905929128bd0bd13a55ae3d8afd60a1af6 (diff) |
Merge branch 'development-19.05' into dhrystone_19.05
Diffstat (limited to 'bsp/sifive-hifive1')
-rw-r--r-- | bsp/sifive-hifive1/metal-inline.h | 4 | ||||
-rw-r--r-- | bsp/sifive-hifive1/metal-platform.h | 2 | ||||
-rw-r--r-- | bsp/sifive-hifive1/metal.default.lds | 3 | ||||
-rw-r--r-- | bsp/sifive-hifive1/metal.h | 22 | ||||
-rw-r--r-- | bsp/sifive-hifive1/metal.ramrodata.lds | 3 | ||||
-rw-r--r-- | bsp/sifive-hifive1/metal.scratchpad.lds | 3 | ||||
-rw-r--r-- | bsp/sifive-hifive1/settings.mk | 2 |
7 files changed, 32 insertions, 7 deletions
diff --git a/bsp/sifive-hifive1/metal-inline.h b/bsp/sifive-hifive1/metal-inline.h index 117bff9..10470c7 100644 --- a/bsp/sifive-hifive1/metal-inline.h +++ b/bsp/sifive-hifive1/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,8 +28,10 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); /* --------------------- sifive_plic0 ------------ */ diff --git a/bsp/sifive-hifive1/metal-platform.h b/bsp/sifive-hifive1/metal-platform.h index f63b445..0bda7f1 100644 --- a/bsp/sifive-hifive1/metal-platform.h +++ b/bsp/sifive-hifive1/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef SIFIVE_HIFIVE1__METAL_PLATFORM_H diff --git a/bsp/sifive-hifive1/metal.default.lds b/bsp/sifive-hifive1/metal.default.lds index 7346fd0..3b27dd0 100644 --- a/bsp/sifive-hifive1/metal.default.lds +++ b/bsp/sifive-hifive1/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1/metal.h b/bsp/sifive-hifive1/metal.h index 39d733d..29f6127 100644 --- a/bsp/sifive-hifive1/metal.h +++ b/bsp/sifive-hifive1/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -228,6 +228,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { @@ -248,6 +258,16 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s } } +static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return 0; + } +} + /* --------------------- sifive_plic0 ------------ */ diff --git a/bsp/sifive-hifive1/metal.ramrodata.lds b/bsp/sifive-hifive1/metal.ramrodata.lds index 00bc224..2f49231 100644 --- a/bsp/sifive-hifive1/metal.ramrodata.lds +++ b/bsp/sifive-hifive1/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1/metal.scratchpad.lds b/bsp/sifive-hifive1/metal.scratchpad.lds index 7a716d7..cb27d7e 100644 --- a/bsp/sifive-hifive1/metal.scratchpad.lds +++ b/bsp/sifive-hifive1/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1/settings.mk b/bsp/sifive-hifive1/settings.mk index b4b69dc..6b305de 100644 --- a/bsp/sifive-hifive1/settings.mk +++ b/bsp/sifive-hifive1/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 22-05-2019 00-09-03 # +# [XXXXX] 23-05-2019 13-29-50 # # ----------------------------------- # RISCV_ARCH=rv32imac |