diff options
| author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-23 21:11:59 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-23 21:11:59 +0000 |
| commit | 2c0269905929128bd0bd13a55ae3d8afd60a1af6 (patch) | |
| tree | 8a1e97f1d80e73284f791d11b80935bcea547a61 /bsp | |
| parent | e3804d42d321b5ebf3d2ef989a97c09b412393bf (diff) | |
| parent | 2cc2f5e07ad2bfdefc03d443a533d1c5455c283f (diff) | |
Merge pull request #257 from sifive/choose-boot-hart
DeviceTree can request a specific boot hart with 'metal,boothart' property in the chosen node
Diffstat (limited to 'bsp')
169 files changed, 560 insertions, 167 deletions
diff --git a/bsp/coreip-e20-arty/metal-inline.h b/bsp/coreip-e20-arty/metal-inline.h index 682d70d..3b9c4e5 100644 --- a/bsp/coreip-e20-arty/metal-inline.h +++ b/bsp/coreip-e20-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -23,6 +23,7 @@ extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e20-arty/metal-platform.h b/bsp/coreip-e20-arty/metal-platform.h index a31682d..d049910 100644 --- a/bsp/coreip-e20-arty/metal-platform.h +++ b/bsp/coreip-e20-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E20_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-e20-arty/metal.default.lds b/bsp/coreip-e20-arty/metal.default.lds index de7d8d6..badb729 100644 --- a/bsp/coreip-e20-arty/metal.default.lds +++ b/bsp/coreip-e20-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e20-arty/metal.h b/bsp/coreip-e20-arty/metal.h index 8a4b3dd..34014a1 100644 --- a/bsp/coreip-e20-arty/metal.h +++ b/bsp/coreip-e20-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -170,6 +170,16 @@ static inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e20-arty/metal.ramrodata.lds b/bsp/coreip-e20-arty/metal.ramrodata.lds index 17b3e25..5742665 100644 --- a/bsp/coreip-e20-arty/metal.ramrodata.lds +++ b/bsp/coreip-e20-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e20-arty/metal.scratchpad.lds b/bsp/coreip-e20-arty/metal.scratchpad.lds index eb571c0..3702a05 100644 --- a/bsp/coreip-e20-arty/metal.scratchpad.lds +++ b/bsp/coreip-e20-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e20-arty/settings.mk b/bsp/coreip-e20-arty/settings.mk index 85c4141..9a4c6d6 100644 --- a/bsp/coreip-e20-arty/settings.mk +++ b/bsp/coreip-e20-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imc @@ -9,3 +9,4 @@ RISCV_ABI=ilp32 RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-e20-rtl/metal-inline.h b/bsp/coreip-e20-rtl/metal-inline.h index 5bd0417..a896131 100644 --- a/bsp/coreip-e20-rtl/metal-inline.h +++ b/bsp/coreip-e20-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -22,6 +22,7 @@ /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e20-rtl/metal-platform.h b/bsp/coreip-e20-rtl/metal-platform.h index 02b0ad9..4aa40ea 100644 --- a/bsp/coreip-e20-rtl/metal-platform.h +++ b/bsp/coreip-e20-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E20_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e20-rtl/metal.default.lds b/bsp/coreip-e20-rtl/metal.default.lds index af982c6..7937b08 100644 --- a/bsp/coreip-e20-rtl/metal.default.lds +++ b/bsp/coreip-e20-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e20-rtl/metal.h b/bsp/coreip-e20-rtl/metal.h index 1f38a0f..6749faa 100644 --- a/bsp/coreip-e20-rtl/metal.h +++ b/bsp/coreip-e20-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -97,6 +97,16 @@ struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e20-rtl/metal.ramrodata.lds b/bsp/coreip-e20-rtl/metal.ramrodata.lds index 782640e..2343ee7 100644 --- a/bsp/coreip-e20-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e20-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e20-rtl/metal.scratchpad.lds b/bsp/coreip-e20-rtl/metal.scratchpad.lds index af982c6..7937b08 100644 --- a/bsp/coreip-e20-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e20-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e20-rtl/settings.mk b/bsp/coreip-e20-rtl/settings.mk index 8c8cfc0..a935127 100644 --- a/bsp/coreip-e20-rtl/settings.mk +++ b/bsp/coreip-e20-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imc @@ -11,3 +11,4 @@ RISCV_CMODEL=medlow COREIP_MEM_WIDTH=32 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-e21-arty/metal-inline.h b/bsp/coreip-e21-arty/metal-inline.h index 37937d3..21116c7 100644 --- a/bsp/coreip-e21-arty/metal-inline.h +++ b/bsp/coreip-e21-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -23,6 +23,7 @@ extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e21-arty/metal-platform.h b/bsp/coreip-e21-arty/metal-platform.h index adbfb15..3e275a2 100644 --- a/bsp/coreip-e21-arty/metal-platform.h +++ b/bsp/coreip-e21-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E21_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-e21-arty/metal.default.lds b/bsp/coreip-e21-arty/metal.default.lds index b7665dd..5bea1f5 100644 --- a/bsp/coreip-e21-arty/metal.default.lds +++ b/bsp/coreip-e21-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e21-arty/metal.h b/bsp/coreip-e21-arty/metal.h index 8ef7fc6..f5e9533 100644 --- a/bsp/coreip-e21-arty/metal.h +++ b/bsp/coreip-e21-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -174,6 +174,16 @@ static inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e21-arty/metal.ramrodata.lds b/bsp/coreip-e21-arty/metal.ramrodata.lds index 54b0c8e..1e37ef6 100644 --- a/bsp/coreip-e21-arty/metal.ramrodata.lds +++ b/bsp/coreip-e21-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e21-arty/metal.scratchpad.lds b/bsp/coreip-e21-arty/metal.scratchpad.lds index 912117d..21e626f 100644 --- a/bsp/coreip-e21-arty/metal.scratchpad.lds +++ b/bsp/coreip-e21-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e21-arty/settings.mk b/bsp/coreip-e21-arty/settings.mk index d7bf600..ab96737 100644 --- a/bsp/coreip-e21-arty/settings.mk +++ b/bsp/coreip-e21-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -9,3 +9,4 @@ RISCV_ABI=ilp32 RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-e21-rtl/metal-inline.h b/bsp/coreip-e21-rtl/metal-inline.h index 9c4c7ef..fc8a319 100644 --- a/bsp/coreip-e21-rtl/metal-inline.h +++ b/bsp/coreip-e21-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -22,6 +22,7 @@ /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e21-rtl/metal-platform.h b/bsp/coreip-e21-rtl/metal-platform.h index 7069709..51a7b22 100644 --- a/bsp/coreip-e21-rtl/metal-platform.h +++ b/bsp/coreip-e21-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E21_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e21-rtl/metal.default.lds b/bsp/coreip-e21-rtl/metal.default.lds index b1c05ca..0f4bf1e 100644 --- a/bsp/coreip-e21-rtl/metal.default.lds +++ b/bsp/coreip-e21-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e21-rtl/metal.h b/bsp/coreip-e21-rtl/metal.h index 1c46492..eb1da58 100644 --- a/bsp/coreip-e21-rtl/metal.h +++ b/bsp/coreip-e21-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -103,6 +103,16 @@ struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e21-rtl/metal.ramrodata.lds b/bsp/coreip-e21-rtl/metal.ramrodata.lds index 59bfadc..b3b1581 100644 --- a/bsp/coreip-e21-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e21-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e21-rtl/metal.scratchpad.lds b/bsp/coreip-e21-rtl/metal.scratchpad.lds index ccd53eb..4b1b222 100644 --- a/bsp/coreip-e21-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e21-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e21-rtl/settings.mk b/bsp/coreip-e21-rtl/settings.mk index 85e5a58..afc60e3 100644 --- a/bsp/coreip-e21-rtl/settings.mk +++ b/bsp/coreip-e21-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -11,3 +11,4 @@ RISCV_CMODEL=medlow COREIP_MEM_WIDTH=32 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-e24-arty/metal-inline.h b/bsp/coreip-e24-arty/metal-inline.h index 0c359b2..ddb5acd 100644 --- a/bsp/coreip-e24-arty/metal-inline.h +++ b/bsp/coreip-e24-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -23,6 +23,7 @@ extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e24-arty/metal-platform.h b/bsp/coreip-e24-arty/metal-platform.h index ec9b9e1..160303c 100644 --- a/bsp/coreip-e24-arty/metal-platform.h +++ b/bsp/coreip-e24-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E24_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-e24-arty/metal.default.lds b/bsp/coreip-e24-arty/metal.default.lds index b7665dd..5bea1f5 100644 --- a/bsp/coreip-e24-arty/metal.default.lds +++ b/bsp/coreip-e24-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e24-arty/metal.h b/bsp/coreip-e24-arty/metal.h index 2725154..cb76f8f 100644 --- a/bsp/coreip-e24-arty/metal.h +++ b/bsp/coreip-e24-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -174,6 +174,16 @@ static inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e24-arty/metal.ramrodata.lds b/bsp/coreip-e24-arty/metal.ramrodata.lds index 54b0c8e..1e37ef6 100644 --- a/bsp/coreip-e24-arty/metal.ramrodata.lds +++ b/bsp/coreip-e24-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e24-arty/metal.scratchpad.lds b/bsp/coreip-e24-arty/metal.scratchpad.lds index 912117d..21e626f 100644 --- a/bsp/coreip-e24-arty/metal.scratchpad.lds +++ b/bsp/coreip-e24-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e24-arty/settings.mk b/bsp/coreip-e24-arty/settings.mk index 429208f..1e501a6 100644 --- a/bsp/coreip-e24-arty/settings.mk +++ b/bsp/coreip-e24-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imafc @@ -9,3 +9,4 @@ RISCV_ABI=ilp32f RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-e24-rtl/metal-inline.h b/bsp/coreip-e24-rtl/metal-inline.h index 460e9d3..acc2c7e 100644 --- a/bsp/coreip-e24-rtl/metal-inline.h +++ b/bsp/coreip-e24-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -22,6 +22,7 @@ /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e24-rtl/metal-platform.h b/bsp/coreip-e24-rtl/metal-platform.h index 7806168..db73ab4 100644 --- a/bsp/coreip-e24-rtl/metal-platform.h +++ b/bsp/coreip-e24-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E24_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e24-rtl/metal.default.lds b/bsp/coreip-e24-rtl/metal.default.lds index b1c05ca..0f4bf1e 100644 --- a/bsp/coreip-e24-rtl/metal.default.lds +++ b/bsp/coreip-e24-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e24-rtl/metal.h b/bsp/coreip-e24-rtl/metal.h index bbe0508..222afa0 100644 --- a/bsp/coreip-e24-rtl/metal.h +++ b/bsp/coreip-e24-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -103,6 +103,16 @@ struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e24-rtl/metal.ramrodata.lds b/bsp/coreip-e24-rtl/metal.ramrodata.lds index 59bfadc..b3b1581 100644 --- a/bsp/coreip-e24-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e24-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e24-rtl/metal.scratchpad.lds b/bsp/coreip-e24-rtl/metal.scratchpad.lds index ccd53eb..4b1b222 100644 --- a/bsp/coreip-e24-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e24-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e24-rtl/settings.mk b/bsp/coreip-e24-rtl/settings.mk index 942bc62..dc10ea1 100644 --- a/bsp/coreip-e24-rtl/settings.mk +++ b/bsp/coreip-e24-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imafc @@ -11,3 +11,4 @@ RISCV_CMODEL=medlow COREIP_MEM_WIDTH=32 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-e31-arty/metal-inline.h b/bsp/coreip-e31-arty/metal-inline.h index 88b82bc..463ecca 100644 --- a/bsp/coreip-e31-arty/metal-inline.h +++ b/bsp/coreip-e31-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e31-arty/metal-platform.h b/bsp/coreip-e31-arty/metal-platform.h index e01cbdb..3993a61 100644 --- a/bsp/coreip-e31-arty/metal-platform.h +++ b/bsp/coreip-e31-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E31_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-e31-arty/metal.default.lds b/bsp/coreip-e31-arty/metal.default.lds index 53a32f1..4a9e1be 100644 --- a/bsp/coreip-e31-arty/metal.default.lds +++ b/bsp/coreip-e31-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e31-arty/metal.h b/bsp/coreip-e31-arty/metal.h index eb0cc1e..43e71a3 100644 --- a/bsp/coreip-e31-arty/metal.h +++ b/bsp/coreip-e31-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -240,6 +240,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e31-arty/metal.ramrodata.lds b/bsp/coreip-e31-arty/metal.ramrodata.lds index c684be1..a280082 100644 --- a/bsp/coreip-e31-arty/metal.ramrodata.lds +++ b/bsp/coreip-e31-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e31-arty/metal.scratchpad.lds b/bsp/coreip-e31-arty/metal.scratchpad.lds index 6b224a0..16211dc 100644 --- a/bsp/coreip-e31-arty/metal.scratchpad.lds +++ b/bsp/coreip-e31-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e31-arty/settings.mk b/bsp/coreip-e31-arty/settings.mk index d7bf600..ab96737 100644 --- a/bsp/coreip-e31-arty/settings.mk +++ b/bsp/coreip-e31-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -9,3 +9,4 @@ RISCV_ABI=ilp32 RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-e31-rtl/metal-inline.h b/bsp/coreip-e31-rtl/metal-inline.h index 692078e..a5035c7 100644 --- a/bsp/coreip-e31-rtl/metal-inline.h +++ b/bsp/coreip-e31-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e31-rtl/metal-platform.h b/bsp/coreip-e31-rtl/metal-platform.h index 571736f..9e03fae 100644 --- a/bsp/coreip-e31-rtl/metal-platform.h +++ b/bsp/coreip-e31-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E31_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e31-rtl/metal.default.lds b/bsp/coreip-e31-rtl/metal.default.lds index f29e650..f687862 100644 --- a/bsp/coreip-e31-rtl/metal.default.lds +++ b/bsp/coreip-e31-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e31-rtl/metal.h b/bsp/coreip-e31-rtl/metal.h index f869d80..9e977af 100644 --- a/bsp/coreip-e31-rtl/metal.h +++ b/bsp/coreip-e31-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -175,6 +175,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e31-rtl/metal.ramrodata.lds b/bsp/coreip-e31-rtl/metal.ramrodata.lds index fd9fded..e75a025 100644 --- a/bsp/coreip-e31-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e31-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e31-rtl/metal.scratchpad.lds b/bsp/coreip-e31-rtl/metal.scratchpad.lds index 99dfa4e..d05f5c2 100644 --- a/bsp/coreip-e31-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e31-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e31-rtl/settings.mk b/bsp/coreip-e31-rtl/settings.mk index 85e5a58..afc60e3 100644 --- a/bsp/coreip-e31-rtl/settings.mk +++ b/bsp/coreip-e31-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -11,3 +11,4 @@ RISCV_CMODEL=medlow COREIP_MEM_WIDTH=32 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-e34-arty/metal-inline.h b/bsp/coreip-e34-arty/metal-inline.h index a1478e2..c322ecb 100644 --- a/bsp/coreip-e34-arty/metal-inline.h +++ b/bsp/coreip-e34-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e34-arty/metal-platform.h b/bsp/coreip-e34-arty/metal-platform.h index a0c3791..e3781a9 100644 --- a/bsp/coreip-e34-arty/metal-platform.h +++ b/bsp/coreip-e34-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E34_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-e34-arty/metal.default.lds b/bsp/coreip-e34-arty/metal.default.lds index 53a32f1..4a9e1be 100644 --- a/bsp/coreip-e34-arty/metal.default.lds +++ b/bsp/coreip-e34-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e34-arty/metal.h b/bsp/coreip-e34-arty/metal.h index 4b11daf..384bd19 100644 --- a/bsp/coreip-e34-arty/metal.h +++ b/bsp/coreip-e34-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -240,6 +240,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e34-arty/metal.ramrodata.lds b/bsp/coreip-e34-arty/metal.ramrodata.lds index c684be1..a280082 100644 --- a/bsp/coreip-e34-arty/metal.ramrodata.lds +++ b/bsp/coreip-e34-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e34-arty/metal.scratchpad.lds b/bsp/coreip-e34-arty/metal.scratchpad.lds index 6b224a0..16211dc 100644 --- a/bsp/coreip-e34-arty/metal.scratchpad.lds +++ b/bsp/coreip-e34-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e34-arty/settings.mk b/bsp/coreip-e34-arty/settings.mk index 429208f..1e501a6 100644 --- a/bsp/coreip-e34-arty/settings.mk +++ b/bsp/coreip-e34-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imafc @@ -9,3 +9,4 @@ RISCV_ABI=ilp32f RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-e34-rtl/metal-inline.h b/bsp/coreip-e34-rtl/metal-inline.h index 30e90fa..8a7c179 100644 --- a/bsp/coreip-e34-rtl/metal-inline.h +++ b/bsp/coreip-e34-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e34-rtl/metal-platform.h b/bsp/coreip-e34-rtl/metal-platform.h index 7abc816..4b128f9 100644 --- a/bsp/coreip-e34-rtl/metal-platform.h +++ b/bsp/coreip-e34-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E34_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e34-rtl/metal.default.lds b/bsp/coreip-e34-rtl/metal.default.lds index f29e650..f687862 100644 --- a/bsp/coreip-e34-rtl/metal.default.lds +++ b/bsp/coreip-e34-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e34-rtl/metal.h b/bsp/coreip-e34-rtl/metal.h index 2019930..a77fc08 100644 --- a/bsp/coreip-e34-rtl/metal.h +++ b/bsp/coreip-e34-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -175,6 +175,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e34-rtl/metal.ramrodata.lds b/bsp/coreip-e34-rtl/metal.ramrodata.lds index fd9fded..e75a025 100644 --- a/bsp/coreip-e34-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e34-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e34-rtl/metal.scratchpad.lds b/bsp/coreip-e34-rtl/metal.scratchpad.lds index 99dfa4e..d05f5c2 100644 --- a/bsp/coreip-e34-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e34-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e34-rtl/settings.mk b/bsp/coreip-e34-rtl/settings.mk index 942bc62..dc10ea1 100644 --- a/bsp/coreip-e34-rtl/settings.mk +++ b/bsp/coreip-e34-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imafc @@ -11,3 +11,4 @@ RISCV_CMODEL=medlow COREIP_MEM_WIDTH=32 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-e76-arty/metal-inline.h b/bsp/coreip-e76-arty/metal-inline.h index 79d9511..d1af334 100644 --- a/bsp/coreip-e76-arty/metal-inline.h +++ b/bsp/coreip-e76-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e76-arty/metal-platform.h b/bsp/coreip-e76-arty/metal-platform.h index 229fecc..a08971f 100644 --- a/bsp/coreip-e76-arty/metal-platform.h +++ b/bsp/coreip-e76-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E76_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-e76-arty/metal.default.lds b/bsp/coreip-e76-arty/metal.default.lds index b9fd8c7..fc983a7 100644 --- a/bsp/coreip-e76-arty/metal.default.lds +++ b/bsp/coreip-e76-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e76-arty/metal.h b/bsp/coreip-e76-arty/metal.h index a48daa4..0c4f0eb 100644 --- a/bsp/coreip-e76-arty/metal.h +++ b/bsp/coreip-e76-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -237,6 +237,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e76-arty/metal.ramrodata.lds b/bsp/coreip-e76-arty/metal.ramrodata.lds index 5a48635..f53fd33 100644 --- a/bsp/coreip-e76-arty/metal.ramrodata.lds +++ b/bsp/coreip-e76-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e76-arty/metal.scratchpad.lds b/bsp/coreip-e76-arty/metal.scratchpad.lds index 5abe56e..eadc43f 100644 --- a/bsp/coreip-e76-arty/metal.scratchpad.lds +++ b/bsp/coreip-e76-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e76-arty/settings.mk b/bsp/coreip-e76-arty/settings.mk index 429208f..1e501a6 100644 --- a/bsp/coreip-e76-arty/settings.mk +++ b/bsp/coreip-e76-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imafc @@ -9,3 +9,4 @@ RISCV_ABI=ilp32f RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-e76-rtl/metal-inline.h b/bsp/coreip-e76-rtl/metal-inline.h index e549be9..aef66bd 100644 --- a/bsp/coreip-e76-rtl/metal-inline.h +++ b/bsp/coreip-e76-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-e76-rtl/metal-platform.h b/bsp/coreip-e76-rtl/metal-platform.h index 758b785..5513ead 100644 --- a/bsp/coreip-e76-rtl/metal-platform.h +++ b/bsp/coreip-e76-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_E76_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e76-rtl/metal.default.lds b/bsp/coreip-e76-rtl/metal.default.lds index 1212a6e..f1317d6 100644 --- a/bsp/coreip-e76-rtl/metal.default.lds +++ b/bsp/coreip-e76-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e76-rtl/metal.h b/bsp/coreip-e76-rtl/metal.h index 34d2545..903e53d 100644 --- a/bsp/coreip-e76-rtl/metal.h +++ b/bsp/coreip-e76-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -165,6 +165,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-e76-rtl/metal.ramrodata.lds b/bsp/coreip-e76-rtl/metal.ramrodata.lds index 198bf29..11169de 100644 --- a/bsp/coreip-e76-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e76-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e76-rtl/metal.scratchpad.lds b/bsp/coreip-e76-rtl/metal.scratchpad.lds index 1212a6e..f1317d6 100644 --- a/bsp/coreip-e76-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e76-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-e76-rtl/settings.mk b/bsp/coreip-e76-rtl/settings.mk index 9c9e85d..8f9bb0b 100644 --- a/bsp/coreip-e76-rtl/settings.mk +++ b/bsp/coreip-e76-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv32imafc @@ -11,3 +11,4 @@ RISCV_CMODEL=medlow COREIP_MEM_WIDTH=64 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-s51-arty/metal-inline.h b/bsp/coreip-s51-arty/metal-inline.h index 2c679a4..3d1cc63 100644 --- a/bsp/coreip-s51-arty/metal-inline.h +++ b/bsp/coreip-s51-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-s51-arty/metal-platform.h b/bsp/coreip-s51-arty/metal-platform.h index 1defcb6..7edd9aa 100644 --- a/bsp/coreip-s51-arty/metal-platform.h +++ b/bsp/coreip-s51-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_S51_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-s51-arty/metal.default.lds b/bsp/coreip-s51-arty/metal.default.lds index 53a32f1..4a9e1be 100644 --- a/bsp/coreip-s51-arty/metal.default.lds +++ b/bsp/coreip-s51-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s51-arty/metal.h b/bsp/coreip-s51-arty/metal.h index 3365d5e..f5087cc 100644 --- a/bsp/coreip-s51-arty/metal.h +++ b/bsp/coreip-s51-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -240,6 +240,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-s51-arty/metal.ramrodata.lds b/bsp/coreip-s51-arty/metal.ramrodata.lds index c684be1..a280082 100644 --- a/bsp/coreip-s51-arty/metal.ramrodata.lds +++ b/bsp/coreip-s51-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s51-arty/metal.scratchpad.lds b/bsp/coreip-s51-arty/metal.scratchpad.lds index 6b224a0..16211dc 100644 --- a/bsp/coreip-s51-arty/metal.scratchpad.lds +++ b/bsp/coreip-s51-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s51-arty/settings.mk b/bsp/coreip-s51-arty/settings.mk index 639de93..4c84306 100644 --- a/bsp/coreip-s51-arty/settings.mk +++ b/bsp/coreip-s51-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imac @@ -9,3 +9,4 @@ RISCV_ABI=lp64 RISCV_CMODEL=medany TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-s51-rtl/metal-inline.h b/bsp/coreip-s51-rtl/metal-inline.h index af290b5..43b1d7b 100644 --- a/bsp/coreip-s51-rtl/metal-inline.h +++ b/bsp/coreip-s51-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-s51-rtl/metal-platform.h b/bsp/coreip-s51-rtl/metal-platform.h index e0074ed..9d7ee51 100644 --- a/bsp/coreip-s51-rtl/metal-platform.h +++ b/bsp/coreip-s51-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_S51_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-s51-rtl/metal.default.lds b/bsp/coreip-s51-rtl/metal.default.lds index becfaf5..e5be410 100644 --- a/bsp/coreip-s51-rtl/metal.default.lds +++ b/bsp/coreip-s51-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s51-rtl/metal.h b/bsp/coreip-s51-rtl/metal.h index e7922b9..3a90f6c 100644 --- a/bsp/coreip-s51-rtl/metal.h +++ b/bsp/coreip-s51-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -175,6 +175,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-s51-rtl/metal.ramrodata.lds b/bsp/coreip-s51-rtl/metal.ramrodata.lds index 79a9105..e9f838a 100644 --- a/bsp/coreip-s51-rtl/metal.ramrodata.lds +++ b/bsp/coreip-s51-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s51-rtl/metal.scratchpad.lds b/bsp/coreip-s51-rtl/metal.scratchpad.lds index 1b0941c..e46abb7 100644 --- a/bsp/coreip-s51-rtl/metal.scratchpad.lds +++ b/bsp/coreip-s51-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s51-rtl/settings.mk b/bsp/coreip-s51-rtl/settings.mk index 380e38e..12a8c2e 100644 --- a/bsp/coreip-s51-rtl/settings.mk +++ b/bsp/coreip-s51-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imac @@ -11,3 +11,4 @@ RISCV_CMODEL=medany COREIP_MEM_WIDTH=64 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-s54-arty/metal-inline.h b/bsp/coreip-s54-arty/metal-inline.h index 6ec413d..b321a86 100644 --- a/bsp/coreip-s54-arty/metal-inline.h +++ b/bsp/coreip-s54-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-s54-arty/metal-platform.h b/bsp/coreip-s54-arty/metal-platform.h index 1767e31..d044a65 100644 --- a/bsp/coreip-s54-arty/metal-platform.h +++ b/bsp/coreip-s54-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_S54_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-s54-arty/metal.default.lds b/bsp/coreip-s54-arty/metal.default.lds index 53a32f1..4a9e1be 100644 --- a/bsp/coreip-s54-arty/metal.default.lds +++ b/bsp/coreip-s54-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s54-arty/metal.h b/bsp/coreip-s54-arty/metal.h index ecff95c..6973c1b 100644 --- a/bsp/coreip-s54-arty/metal.h +++ b/bsp/coreip-s54-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -240,6 +240,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-s54-arty/metal.ramrodata.lds b/bsp/coreip-s54-arty/metal.ramrodata.lds index c684be1..a280082 100644 --- a/bsp/coreip-s54-arty/metal.ramrodata.lds +++ b/bsp/coreip-s54-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s54-arty/metal.scratchpad.lds b/bsp/coreip-s54-arty/metal.scratchpad.lds index 6b224a0..16211dc 100644 --- a/bsp/coreip-s54-arty/metal.scratchpad.lds +++ b/bsp/coreip-s54-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s54-arty/settings.mk b/bsp/coreip-s54-arty/settings.mk index 4b9dfb0..ded9d2f 100644 --- a/bsp/coreip-s54-arty/settings.mk +++ b/bsp/coreip-s54-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imafdc @@ -9,3 +9,4 @@ RISCV_ABI=lp64d RISCV_CMODEL=medany TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-s54-rtl/metal-inline.h b/bsp/coreip-s54-rtl/metal-inline.h index 9fe2c39..a04cbc1 100644 --- a/bsp/coreip-s54-rtl/metal-inline.h +++ b/bsp/coreip-s54-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-s54-rtl/metal-platform.h b/bsp/coreip-s54-rtl/metal-platform.h index d5f6de8..2175c30 100644 --- a/bsp/coreip-s54-rtl/metal-platform.h +++ b/bsp/coreip-s54-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_S54_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-s54-rtl/metal.default.lds b/bsp/coreip-s54-rtl/metal.default.lds index becfaf5..e5be410 100644 --- a/bsp/coreip-s54-rtl/metal.default.lds +++ b/bsp/coreip-s54-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s54-rtl/metal.h b/bsp/coreip-s54-rtl/metal.h index c47f29e..3880110 100644 --- a/bsp/coreip-s54-rtl/metal.h +++ b/bsp/coreip-s54-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -175,6 +175,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-s54-rtl/metal.ramrodata.lds b/bsp/coreip-s54-rtl/metal.ramrodata.lds index 79a9105..e9f838a 100644 --- a/bsp/coreip-s54-rtl/metal.ramrodata.lds +++ b/bsp/coreip-s54-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s54-rtl/metal.scratchpad.lds b/bsp/coreip-s54-rtl/metal.scratchpad.lds index 1b0941c..e46abb7 100644 --- a/bsp/coreip-s54-rtl/metal.scratchpad.lds +++ b/bsp/coreip-s54-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s54-rtl/settings.mk b/bsp/coreip-s54-rtl/settings.mk index 389d403..a25dc18 100644 --- a/bsp/coreip-s54-rtl/settings.mk +++ b/bsp/coreip-s54-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imafdc @@ -11,3 +11,4 @@ RISCV_CMODEL=medany COREIP_MEM_WIDTH=64 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-s76-arty/metal-inline.h b/bsp/coreip-s76-arty/metal-inline.h index a4e44af..56168da 100644 --- a/bsp/coreip-s76-arty/metal-inline.h +++ b/bsp/coreip-s76-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-s76-arty/metal-platform.h b/bsp/coreip-s76-arty/metal-platform.h index 1e72316..c849584 100644 --- a/bsp/coreip-s76-arty/metal-platform.h +++ b/bsp/coreip-s76-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_S76_ARTY__METAL_PLATFORM_H diff --git a/bsp/coreip-s76-arty/metal.default.lds b/bsp/coreip-s76-arty/metal.default.lds index b9fd8c7..fc983a7 100644 --- a/bsp/coreip-s76-arty/metal.default.lds +++ b/bsp/coreip-s76-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s76-arty/metal.h b/bsp/coreip-s76-arty/metal.h index d948150..87f6ae5 100644 --- a/bsp/coreip-s76-arty/metal.h +++ b/bsp/coreip-s76-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -237,6 +237,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-s76-arty/metal.ramrodata.lds b/bsp/coreip-s76-arty/metal.ramrodata.lds index 5a48635..f53fd33 100644 --- a/bsp/coreip-s76-arty/metal.ramrodata.lds +++ b/bsp/coreip-s76-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s76-arty/metal.scratchpad.lds b/bsp/coreip-s76-arty/metal.scratchpad.lds index 5abe56e..eadc43f 100644 --- a/bsp/coreip-s76-arty/metal.scratchpad.lds +++ b/bsp/coreip-s76-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-34 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s76-arty/settings.mk b/bsp/coreip-s76-arty/settings.mk index 4b9dfb0..ded9d2f 100644 --- a/bsp/coreip-s76-arty/settings.mk +++ b/bsp/coreip-s76-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-34 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imafdc @@ -9,3 +9,4 @@ RISCV_ABI=lp64d RISCV_CMODEL=medany TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/coreip-s76-rtl/metal-inline.h b/bsp/coreip-s76-rtl/metal-inline.h index 9ab68d4..57d7a4d 100644 --- a/bsp/coreip-s76-rtl/metal-inline.h +++ b/bsp/coreip-s76-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-s76-rtl/metal-platform.h b/bsp/coreip-s76-rtl/metal-platform.h index 4aa8776..ca0320d 100644 --- a/bsp/coreip-s76-rtl/metal-platform.h +++ b/bsp/coreip-s76-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_S76_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-s76-rtl/metal.default.lds b/bsp/coreip-s76-rtl/metal.default.lds index 3595f92..f1317d6 100644 --- a/bsp/coreip-s76-rtl/metal.default.lds +++ b/bsp/coreip-s76-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s76-rtl/metal.h b/bsp/coreip-s76-rtl/metal.h index 2a7145c..7b092fc 100644 --- a/bsp/coreip-s76-rtl/metal.h +++ b/bsp/coreip-s76-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -165,6 +165,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-s76-rtl/metal.ramrodata.lds b/bsp/coreip-s76-rtl/metal.ramrodata.lds index e7c0478..11169de 100644 --- a/bsp/coreip-s76-rtl/metal.ramrodata.lds +++ b/bsp/coreip-s76-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s76-rtl/metal.scratchpad.lds b/bsp/coreip-s76-rtl/metal.scratchpad.lds index 3595f92..f1317d6 100644 --- a/bsp/coreip-s76-rtl/metal.scratchpad.lds +++ b/bsp/coreip-s76-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -27,6 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-s76-rtl/settings.mk b/bsp/coreip-s76-rtl/settings.mk index 53c575a..a25dc18 100644 --- a/bsp/coreip-s76-rtl/settings.mk +++ b/bsp/coreip-s76-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-35 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imafdc @@ -11,3 +11,4 @@ RISCV_CMODEL=medany COREIP_MEM_WIDTH=64 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-u54-rtl/metal-inline.h b/bsp/coreip-u54-rtl/metal-inline.h index 186c3ab..3d08799 100644 --- a/bsp/coreip-u54-rtl/metal-inline.h +++ b/bsp/coreip-u54-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-u54-rtl/metal-platform.h b/bsp/coreip-u54-rtl/metal-platform.h index 8bc29b7..fb3d3b4 100644 --- a/bsp/coreip-u54-rtl/metal-platform.h +++ b/bsp/coreip-u54-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef COREIP_U54_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-u54-rtl/metal.default.lds b/bsp/coreip-u54-rtl/metal.default.lds index 7dbd4f1..93fc5a8 100644 --- a/bsp/coreip-u54-rtl/metal.default.lds +++ b/bsp/coreip-u54-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-u54-rtl/metal.h b/bsp/coreip-u54-rtl/metal.h index ee3c264..7e793bc 100644 --- a/bsp/coreip-u54-rtl/metal.h +++ b/bsp/coreip-u54-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -171,6 +171,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-u54-rtl/metal.ramrodata.lds b/bsp/coreip-u54-rtl/metal.ramrodata.lds index 1fd5001..57b767a 100644 --- a/bsp/coreip-u54-rtl/metal.ramrodata.lds +++ b/bsp/coreip-u54-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-u54-rtl/metal.scratchpad.lds b/bsp/coreip-u54-rtl/metal.scratchpad.lds index 7dbd4f1..93fc5a8 100644 --- a/bsp/coreip-u54-rtl/metal.scratchpad.lds +++ b/bsp/coreip-u54-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/coreip-u54-rtl/settings.mk b/bsp/coreip-u54-rtl/settings.mk index 3815c91..4cf87cb 100644 --- a/bsp/coreip-u54-rtl/settings.mk +++ b/bsp/coreip-u54-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-35 # +# [XXXXX] 23-05-2019 13-29-50 # # ----------------------------------- # RISCV_ARCH=rv64imafdc @@ -11,3 +11,4 @@ RISCV_CMODEL=medany COREIP_MEM_WIDTH=128 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/coreip-u54mc-rtl/design.dts b/bsp/coreip-u54mc-rtl/design.dts index beba177..2982dd5 100644 --- a/bsp/coreip-u54mc-rtl/design.dts +++ b/bsp/coreip-u54mc-rtl/design.dts @@ -5,6 +5,9 @@ #size-cells = <2>; compatible = "SiFive,FU540G-dev", "fu540-dev", "sifive-dev"; model = "SiFive,FU540G"; + chosen { + metal,boothart = <&L13>; + }; L36: cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/bsp/coreip-u54mc-rtl/metal-inline.h b/bsp/coreip-u54mc-rtl/metal-inline.h index 62b9eb9..34e4d33 100644 --- a/bsp/coreip-u54mc-rtl/metal-inline.h +++ b/bsp/coreip-u54mc-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/coreip-u54mc-rtl/metal-platform.h b/bsp/coreip-u54mc-rtl/metal-platform.h index 0919ca3..7045d23 100644 --- a/bsp/coreip-u54mc-rtl/metal-platform.h +++ b/bsp/coreip-u54mc-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef COREIP_U54MC_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-u54mc-rtl/metal.default.lds b/bsp/coreip-u54mc-rtl/metal.default.lds index 32ee163..a95cc07 100644 --- a/bsp/coreip-u54mc-rtl/metal.default.lds +++ b/bsp/coreip-u54mc-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 1); .init : diff --git a/bsp/coreip-u54mc-rtl/metal.h b/bsp/coreip-u54mc-rtl/metal.h index f60e70c..417332f 100644 --- a/bsp/coreip-u54mc-rtl/metal.h +++ b/bsp/coreip-u54mc-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -249,6 +249,28 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_1) { + return 1; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_2) { + return 2; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_3) { + return 3; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/coreip-u54mc-rtl/metal.ramrodata.lds b/bsp/coreip-u54mc-rtl/metal.ramrodata.lds index 6a59904..b5f35f7 100644 --- a/bsp/coreip-u54mc-rtl/metal.ramrodata.lds +++ b/bsp/coreip-u54mc-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 1); .init : diff --git a/bsp/coreip-u54mc-rtl/metal.scratchpad.lds b/bsp/coreip-u54mc-rtl/metal.scratchpad.lds index 32ee163..a95cc07 100644 --- a/bsp/coreip-u54mc-rtl/metal.scratchpad.lds +++ b/bsp/coreip-u54mc-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-49 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 1); .init : diff --git a/bsp/coreip-u54mc-rtl/settings.mk b/bsp/coreip-u54mc-rtl/settings.mk index 4509247..ae9e038 100644 --- a/bsp/coreip-u54mc-rtl/settings.mk +++ b/bsp/coreip-u54mc-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-35 # +# [XXXXX] 23-05-2019 13-29-49 # # ----------------------------------- # RISCV_ARCH=rv64imac @@ -11,3 +11,4 @@ RISCV_CMODEL=medany COREIP_MEM_WIDTH=128 TARGET_TAGS=rtl +TARGET_DHRY_ITERS=2000 diff --git a/bsp/freedom-e310-arty/metal-inline.h b/bsp/freedom-e310-arty/metal-inline.h index 00ce361..fafb3ec 100644 --- a/bsp/freedom-e310-arty/metal-inline.h +++ b/bsp/freedom-e310-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/freedom-e310-arty/metal-platform.h b/bsp/freedom-e310-arty/metal-platform.h index fc2a024..35d7e0a 100644 --- a/bsp/freedom-e310-arty/metal-platform.h +++ b/bsp/freedom-e310-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef FREEDOM_E310_ARTY__METAL_PLATFORM_H diff --git a/bsp/freedom-e310-arty/metal.default.lds b/bsp/freedom-e310-arty/metal.default.lds index ca12e31..f9dcdbd 100644 --- a/bsp/freedom-e310-arty/metal.default.lds +++ b/bsp/freedom-e310-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/freedom-e310-arty/metal.h b/bsp/freedom-e310-arty/metal.h index c6bd078..c1c3dca 100644 --- a/bsp/freedom-e310-arty/metal.h +++ b/bsp/freedom-e310-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -192,6 +192,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/freedom-e310-arty/metal.ramrodata.lds b/bsp/freedom-e310-arty/metal.ramrodata.lds index f430861..d5d7b5b 100644 --- a/bsp/freedom-e310-arty/metal.ramrodata.lds +++ b/bsp/freedom-e310-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/freedom-e310-arty/metal.scratchpad.lds b/bsp/freedom-e310-arty/metal.scratchpad.lds index cb5ed4d..dfdf485 100644 --- a/bsp/freedom-e310-arty/metal.scratchpad.lds +++ b/bsp/freedom-e310-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/freedom-e310-arty/settings.mk b/bsp/freedom-e310-arty/settings.mk index 947b357..d3d0bfc 100644 --- a/bsp/freedom-e310-arty/settings.mk +++ b/bsp/freedom-e310-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-35 # +# [XXXXX] 23-05-2019 13-29-50 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -9,3 +9,4 @@ RISCV_ABI=ilp32 RISCV_CMODEL=medlow TARGET_TAGS=fpga openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/sifive-hifive-unleashed/metal-inline.h b/bsp/sifive-hifive-unleashed/metal-inline.h index 6099519..dcc51cb 100644 --- a/bsp/sifive-hifive-unleashed/metal-inline.h +++ b/bsp/sifive-hifive-unleashed/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -31,6 +31,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/sifive-hifive-unleashed/metal-platform.h b/bsp/sifive-hifive-unleashed/metal-platform.h index 19119c4..4bfe75b 100644 --- a/bsp/sifive-hifive-unleashed/metal-platform.h +++ b/bsp/sifive-hifive-unleashed/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef SIFIVE_HIFIVE_UNLEASHED__METAL_PLATFORM_H diff --git a/bsp/sifive-hifive-unleashed/metal.default.lds b/bsp/sifive-hifive-unleashed/metal.default.lds index a0d0420..23351d2 100644 --- a/bsp/sifive-hifive-unleashed/metal.default.lds +++ b/bsp/sifive-hifive-unleashed/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive-unleashed/metal.h b/bsp/sifive-hifive-unleashed/metal.h index f74e931..4154037 100644 --- a/bsp/sifive-hifive-unleashed/metal.h +++ b/bsp/sifive-hifive-unleashed/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -318,6 +318,28 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_1) { + return 1; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_2) { + return 2; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_3) { + return 3; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/sifive-hifive-unleashed/metal.ramrodata.lds b/bsp/sifive-hifive-unleashed/metal.ramrodata.lds index f0f2a6d..4b31408 100644 --- a/bsp/sifive-hifive-unleashed/metal.ramrodata.lds +++ b/bsp/sifive-hifive-unleashed/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive-unleashed/metal.scratchpad.lds b/bsp/sifive-hifive-unleashed/metal.scratchpad.lds index dd35e29..48d397f 100644 --- a/bsp/sifive-hifive-unleashed/metal.scratchpad.lds +++ b/bsp/sifive-hifive-unleashed/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -29,6 +29,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive-unleashed/settings.mk b/bsp/sifive-hifive-unleashed/settings.mk index 38a72d6..2745538 100644 --- a/bsp/sifive-hifive-unleashed/settings.mk +++ b/bsp/sifive-hifive-unleashed/settings.mk @@ -1,5 +1,12 @@ +# Copyright 2019 SiFive, Inc # +# SPDX-License-Identifier: Apache-2.0 # +# ----------------------------------- # +# [XXXXX] 23-05-2019 13-29-50 # +# ----------------------------------- # + RISCV_ARCH=rv64imac RISCV_ABI=lp64 RISCV_CMODEL=medany TARGET_TAGS=board openocd +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/sifive-hifive1-revb/metal-inline.h b/bsp/sifive-hifive1-revb/metal-inline.h index 2d29620..5f341a0 100644 --- a/bsp/sifive-hifive1-revb/metal-inline.h +++ b/bsp/sifive-hifive1-revb/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/sifive-hifive1-revb/metal-platform.h b/bsp/sifive-hifive1-revb/metal-platform.h index d437f68..3e0f3b9 100644 --- a/bsp/sifive-hifive1-revb/metal-platform.h +++ b/bsp/sifive-hifive1-revb/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef SIFIVE_HIFIVE1_REVB__METAL_PLATFORM_H diff --git a/bsp/sifive-hifive1-revb/metal.default.lds b/bsp/sifive-hifive1-revb/metal.default.lds index 0a81a8e..dcbff03 100644 --- a/bsp/sifive-hifive1-revb/metal.default.lds +++ b/bsp/sifive-hifive1-revb/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1-revb/metal.h b/bsp/sifive-hifive1-revb/metal.h index 7ca6cdc..7a111a2 100644 --- a/bsp/sifive-hifive1-revb/metal.h +++ b/bsp/sifive-hifive1-revb/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -230,6 +230,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/sifive-hifive1-revb/metal.ramrodata.lds b/bsp/sifive-hifive1-revb/metal.ramrodata.lds index cadc499..014fe70 100644 --- a/bsp/sifive-hifive1-revb/metal.ramrodata.lds +++ b/bsp/sifive-hifive1-revb/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1-revb/metal.scratchpad.lds b/bsp/sifive-hifive1-revb/metal.scratchpad.lds index baa38d9..13a357e 100644 --- a/bsp/sifive-hifive1-revb/metal.scratchpad.lds +++ b/bsp/sifive-hifive1-revb/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1-revb/settings.mk b/bsp/sifive-hifive1-revb/settings.mk index a315dab..d793c1d 100644 --- a/bsp/sifive-hifive1-revb/settings.mk +++ b/bsp/sifive-hifive1-revb/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-35 # +# [XXXXX] 23-05-2019 13-29-50 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -9,3 +9,4 @@ RISCV_ABI=ilp32 RISCV_CMODEL=medlow TARGET_TAGS=board jlink +TARGET_DHRY_ITERS=20000000 diff --git a/bsp/sifive-hifive1/metal-inline.h b/bsp/sifive-hifive1/metal-inline.h index ef68bb7..10470c7 100644 --- a/bsp/sifive-hifive1/metal-inline.h +++ b/bsp/sifive-hifive1/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -28,6 +28,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); diff --git a/bsp/sifive-hifive1/metal-platform.h b/bsp/sifive-hifive1/metal-platform.h index c2c508c..0bda7f1 100644 --- a/bsp/sifive-hifive1/metal-platform.h +++ b/bsp/sifive-hifive1/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef SIFIVE_HIFIVE1__METAL_PLATFORM_H diff --git a/bsp/sifive-hifive1/metal.default.lds b/bsp/sifive-hifive1/metal.default.lds index d4dabc1..3b27dd0 100644 --- a/bsp/sifive-hifive1/metal.default.lds +++ b/bsp/sifive-hifive1/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1/metal.h b/bsp/sifive-hifive1/metal.h index 96707bd..29f6127 100644 --- a/bsp/sifive-hifive1/metal.h +++ b/bsp/sifive-hifive1/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -228,6 +228,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { diff --git a/bsp/sifive-hifive1/metal.ramrodata.lds b/bsp/sifive-hifive1/metal.ramrodata.lds index a79888d..2f49231 100644 --- a/bsp/sifive-hifive1/metal.ramrodata.lds +++ b/bsp/sifive-hifive1/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1/metal.scratchpad.lds b/bsp/sifive-hifive1/metal.scratchpad.lds index 5dd7707..cb27d7e 100644 --- a/bsp/sifive-hifive1/metal.scratchpad.lds +++ b/bsp/sifive-hifive1/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 21-05-2019 10-54-35 */ +/* [XXXXX] 23-05-2019 13-29-50 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") @@ -28,6 +28,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); .init : diff --git a/bsp/sifive-hifive1/settings.mk b/bsp/sifive-hifive1/settings.mk index 966f928..6b305de 100644 --- a/bsp/sifive-hifive1/settings.mk +++ b/bsp/sifive-hifive1/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 21-05-2019 10-54-35 # +# [XXXXX] 23-05-2019 13-29-50 # # ----------------------------------- # RISCV_ARCH=rv32imac @@ -9,3 +9,4 @@ RISCV_ABI=ilp32 RISCV_CMODEL=medlow TARGET_TAGS=board openocd +TARGET_DHRY_ITERS=20000000 |