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authorNathaniel Graff <nathaniel.graff@sifive.com>2019-06-03 15:42:09 -0700
committerNathaniel Graff <nathaniel.graff@sifive.com>2019-06-03 16:10:12 -0700
commitd29a5d443cabe9373016bb158203c9dcd6f32279 (patch)
tree0e140dbead440599c1580a8cabeddabab4a6acf7 /doc/Makefile
parentf2c7f75ceef24aec9891d75c2b4fb5db5b847868 (diff)
Detect when we need to add metal,entry for FPGA targets
Automatically add a 0x400000 byte offset to the entry point of FPGA and Arty targets Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'doc/Makefile')
0 files changed, 0 insertions, 0 deletions