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| author | hsiang-chia.huang <hsiangchia.huang@sifive.com> | 2019-05-24 10:25:58 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-24 10:25:58 +0800 |
| commit | 869ef0c1a2282f52500c4004224c9c9b196626b9 (patch) | |
| tree | 3996d52a748ae2420b5c9c6c9efe4158d5dece53 /scripts | |
| parent | 2c0269905929128bd0bd13a55ae3d8afd60a1af6 (diff) | |
| parent | faf58a49c3b6421107ada0e8af43170a5ffafcea (diff) | |
Merge pull request #255 from sifive/dhrystone_19.05
Setup default options for dhrystone release.
Diffstat (limited to 'scripts')
| -rw-r--r-- | scripts/standalone.mk | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/scripts/standalone.mk b/scripts/standalone.mk index 913b24b..6b83a29 100644 --- a/scripts/standalone.mk +++ b/scripts/standalone.mk @@ -37,6 +37,12 @@ ifeq ($(RISCV_CMODEL),) RISCV_CMODEL = medany endif +ifeq ($(PROGRAM),dhrystone) +ifeq ($(LINK_TARGET),) +LINK_TARGET = ramrodata +endif +endif + ifeq ($(LINK_TARGET),) LINK_TARGET = default endif @@ -101,6 +107,20 @@ RISCV_CCASFLAGS += --specs=nano.specs RISCV_CFLAGS += --specs=nano.specs RISCV_CXXFLAGS += --specs=nano.specs +ifeq ($(PROGRAM),dhrystone) +ifeq ($(DHRY_OPTION),) +# Ground rules (default) +RISCV_XCFLAGS += -mexplicit-relocs -fno-inline +else ifeq ($(DHRY_OPTION),fast) +# With inline and without lto +RISCV_XCFLAGS += -mexplicit-relocs -finline +else ifeq ($(DHRY_OPTION),best) +# Best Score +RISCV_XCFLAGS += -finline -flto -fwhole-program +endif +RISCV_XCFLAGS += -DDHRY_ITERS=$(TARGET_DHRY_ITERS) +endif + # Turn on garbage collection for unused sections RISCV_LDFLAGS += -Wl,--gc-sections # Turn on linker map file generation @@ -152,6 +172,7 @@ $(PROGRAM_ELF): \ CCASFLAGS="$(RISCV_CCASFLAGS)" \ CFLAGS="$(RISCV_CFLAGS)" \ CXXFLAGS="$(RISCV_CXXFLAGS)" \ + XCFLAGS="$(RISCV_XCFLAGS)" \ LDFLAGS="$(RISCV_LDFLAGS)" \ LDLIBS="$(RISCV_LDLIBS)" mv $(SRC_DIR)/$(basename $(notdir $@)).map $(dir $@) |