summaryrefslogtreecommitdiff
path: root/software/performance_counters
diff options
context:
space:
mode:
authorNathaniel Graff <nathaniel.graff@sifive.com>2019-03-07 21:32:52 +0000
committerGitHub <noreply@github.com>2019-03-07 21:32:52 +0000
commit7b036c07e40a6f3d3cf1ddfc5d88d3a36beb4e46 (patch)
treec1459952c20e4534d33016d4fc2cf6729228c0e6 /software/performance_counters
parent84781219c87c0b9148e318f3e358ef7de03e251c (diff)
parentdef12d50a686774196c613a819e6afb744ee290e (diff)
Merge pull request #195 from sifive/remove-legacy
Remove legacy BSPs and Software
Diffstat (limited to 'software/performance_counters')
-rw-r--r--software/performance_counters/Makefile6
-rw-r--r--software/performance_counters/performance_counters.c133
2 files changed, 0 insertions, 139 deletions
diff --git a/software/performance_counters/Makefile b/software/performance_counters/Makefile
deleted file mode 100644
index eb3e8f1..0000000
--- a/software/performance_counters/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-TARGET = performance_counters
-C_SRCS += performance_counters.c
-CFLAGS += -O2 -fno-builtin-printf
-
-BSP_BASE = ../../bsp
-include $(BSP_BASE)/env/common.mk
diff --git a/software/performance_counters/performance_counters.c b/software/performance_counters/performance_counters.c
deleted file mode 100644
index 8094128..0000000
--- a/software/performance_counters/performance_counters.c
+++ /dev/null
@@ -1,133 +0,0 @@
-// See LICENSE for license details.
-
-// This demo shows how to use basic
-// RISC-V profiling counters, mcycle
-// (counts the number of processor cycles)
-// and minstret (counts the number of retired instructions).
-// Note that both are writable as well.
-
-#include <stdio.h>
-
-// The CSR encodings are in this header.
-#include "encoding.h"
-
-// The mcycle counter is 64-bit counter, but since
-// Freedom E platforms use RV32, we must access it as
-// 2 32-bit registers. At 256MHz, the lower bits will
-// roll over approx. every 5 seconds, so we check for
-// rollover with this routine as suggested by the
-// RISC-V Priviledged Architecture Specification.
-
-#if __riscv_xlen == 64
-#define rdmcycle(x) { \
- uint64_t hi; \
- __asm__ __volatile__ ("1:\n\t" \
- "csrr %0, mcycle\n\t" \
- : "=r" (hi)) ; \
- *(x) = hi; \
- }
-#else
-#define rdmcycle(x) { \
- uint32_t lo, hi, hi2; \
- __asm__ __volatile__ ("1:\n\t" \
- "csrr %0, mcycleh\n\t" \
- "csrr %1, mcycle\n\t" \
- "csrr %2, mcycleh\n\t" \
- "bne %0, %2, 1b\n\t" \
- : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \
- *(x) = lo | ((uint64_t) hi << 32); \
- }
-#endif
-
-
-// The minstret counter is 64-bit counter, but
-// Freedom E platforms use RV32, we must access it as
-// 2 32-bit registers, same as for mcycle.
-
-#if __riscv_xlen == 64
-#define rdminstret(x) { \
- uint64_t hi; \
- __asm__ __volatile__ ("1:\n\t" \
- "csrr %0, minstret\n\t" \
- : "=r" (hi)) ; \
- *(x) = hi; \
- }
-#else
-#define rdminstret(x) { \
- uint32_t lo, hi, hi2; \
- __asm__ __volatile__ ("1:\n\t" \
- "csrr %0, minstreth\n\t" \
- "csrr %1, minstret\n\t" \
- "csrr %2, minstreth\n\t" \
- "bne %0, %2, 1b\n\t" \
- : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \
- *(x) = lo | ((uint64_t) hi << 32); \
- }
-#endif
-
-// Simple program to measure the performance of.
-
-int factorial(int i){
-
- int result = 1;
- for (int ii = 1; ii <= i; ii++) {
- result = result * i;
- }
-
- return result;
-
-}
-
-
-int main()
-{
-
- uint64_t before_cycle;
- uint64_t before_instret;
-
- uint64_t after_cycle;
- uint64_t after_instret;
-
- printf("\n\nDemo 1: Using Counter Differences.\n");
-
- for (int ii = 0; ii < 3; ii++){
- rdmcycle(&before_cycle);
- rdminstret(&before_instret);
-
- volatile int result = factorial (100);
-
- rdmcycle(&after_cycle);
- rdminstret(&after_instret);
-
- printf("Loop %d: Retired %d instructions in %d cycles\n",
- ii,
- (uint32_t)(after_instret - before_instret),
- (uint32_t)(after_cycle - before_cycle));
- }
-
- printf("\n\nDemo 2: Clearing Counters, Using Values Directly.\n");
-
- for (int ii = 0; ii < 3; ii++){
-
- write_csr(mcycle, 0);
- write_csr(minstret, 0);
-#if __riscv_xlen == 32
- write_csr(mcycleh, 0);
- write_csr(minstreth, 0);
-#endif
-
- volatile int result = factorial (100);
-
- rdmcycle(&after_cycle);
- rdminstret(&after_instret);
-
- printf("Loop %d: Retired %d instructions in %d cycles\n",
- ii,
- (uint32_t)(after_instret),
- (uint32_t)(after_cycle));
-
- }
-
- return 0;
-
-}