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authorBunnaroath Sou <35707615+bsousi5@users.noreply.github.com>2019-03-19 18:16:56 -0700
committerGitHub <noreply@github.com>2019-03-19 18:16:56 -0700
commit318ac16f2b0fdab7ac82758993e7e6835b94115d (patch)
treebd15b52cccb8ff4f9c6e184db10aa8d4520b7aa0 /software/sifive-welcome
parent0f8c780d82b2ec3eda351229e79953bbde7bb95a (diff)
parentac5e78c355567d2ed430e22b4c1d119188904d83 (diff)
Merge pull request #209 from sifive/arty-19.2
Make rtl target to use ram from dtim, flash from testram
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