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authorPalmer Dabbelt <palmer@dabbelt.com>2017-06-13 15:14:38 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-06-14 08:53:39 -0700
commitb22853b2f4bdd1ed31d601ebd331083d67d40f11 (patch)
treeb93f00a0566675d6c38152d5097acf30381a3e04 /software/smp/atomic.h
parentc08ce47e3829d8070ba7b4813cfc7a9a48c35a3c (diff)
Add a SMP example
This just prints "hello world" on two cores. It contains an example of how to initialize a multi-core system using IPIs, and a simple spin lock.
Diffstat (limited to 'software/smp/atomic.h')
-rw-r--r--software/smp/atomic.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/software/smp/atomic.h b/software/smp/atomic.h
new file mode 100644
index 0000000..074c6a2
--- /dev/null
+++ b/software/smp/atomic.h
@@ -0,0 +1,29 @@
+#ifndef SIFIVE_ATOMIC_H
+#define SIFIVE_ATOMIC_H
+
+#define ATOMIC_INIT(x) \
+ { \
+ .counter = (x), \
+ }
+
+typedef struct {
+ int counter;
+} atomic_t;
+
+static inline int atomic_xchg(atomic_t *v, int n)
+{
+ register int c;
+
+ __asm__ __volatile__ (
+ "amoswap.w.aqrl %0, %2, %1"
+ : "=r" (c), "+A" (v->counter)
+ : "r" (n));
+ return c;
+}
+
+static inline void mb(void)
+{
+ __asm__ __volatile__ ("fence");
+}
+
+#endif