diff options
| -rw-r--r-- | .gitmodules | 3 | ||||
| -rw-r--r-- | Makefile | 19 | ||||
| -rw-r--r-- | README.md | 3 | ||||
| -rw-r--r-- | bsp/coreip-e20-arty/metal.ramrodata.lds | 14 | ||||
| -rw-r--r-- | doc/sphinx/contents.rst | 4 | ||||
| m--------- | freedom-metal | 0 | ||||
| -rwxr-xr-x | scripts/fixup-dts | 25 | ||||
| -rw-r--r-- | scripts/standalone.mk | 18 | ||||
| m--------- | software/coremark | 0 |
9 files changed, 78 insertions, 8 deletions
diff --git a/.gitmodules b/.gitmodules index 40b88d9..a166706 100644 --- a/.gitmodules +++ b/.gitmodules @@ -52,3 +52,6 @@ [submodule "software/example-user-syscall"] path = software/example-user-syscall url = https://github.com/sifive/example-user-syscall.git +[submodule "software/coremark"] + path = software/coremark + url = https://github.com/sifive/benchmark-coremark.git @@ -20,6 +20,13 @@ endif PROGRAM ?= hello TARGET ?= sifive-hifive1 +# Coremark require PORT_DIR set for different OS, freedom-metal for us! +ifeq ($(PROGRAM),coremark) +ifeq ($(PORT_DIR),) +PORT_DIR = freedom-metal +endif +endif + TARGET_ROOT ?= $(abspath .) PROGRAM_ROOT ?= $(abspath .) @@ -109,9 +116,9 @@ clean: ############################################################# # Enumerate BSPs and Programs # -# List all available boards and programs in a form that -# Freedom Studio knows how to parse. Do not change the -# format or fixed text of the output without consulting the +# List all available boards and programs in a form that +# Freedom Studio knows how to parse. Do not change the +# format or fixed text of the output without consulting the # Freedom Studio dev team. ############################################################# @@ -201,6 +208,9 @@ standalone: \ cp release.mk $</release.mk echo "PROGRAM = $(PROGRAM)" > $</Makefile +ifneq ($(PORT_DIR),) + echo "PORT_DIR = $(PORT_DIR)" > $</Makefile +endif cat scripts/standalone.mk >> $</Makefile cat scripts/libmetal.mk >> $</Makefile else # "rtl" not in TARGET_TAGS @@ -227,6 +237,9 @@ standalone: \ cp release.mk $</release.mk echo "PROGRAM = $(PROGRAM)" > $</Makefile +ifneq ($(PORT_DIR),) + echo "PORT_DIR = $(PORT_DIR)" > $</Makefile +endif cat scripts/standalone.mk >> $</Makefile cat scripts/libmetal.mk >> $</Makefile endif # rtl in TARGET_TAGS @@ -98,6 +98,9 @@ operating systems to RISC-V. - Prints the SiFive banner and blinks LEDs - dhrystone - "Dhrystone" Benchmark Program by Reinhold P. Weicker + - coremark + - "CoreMark" Benchmark Program that measures the performance of embedded + microcrontrollers (MCU) ### Setting up the SDK ### diff --git a/bsp/coreip-e20-arty/metal.ramrodata.lds b/bsp/coreip-e20-arty/metal.ramrodata.lds index 513e567..0c6fffa 100644 --- a/bsp/coreip-e20-arty/metal.ramrodata.lds +++ b/bsp/coreip-e20-arty/metal.ramrodata.lds @@ -9,8 +9,9 @@ ENTRY(_enter) MEMORY { - ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000 + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x8000 flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 0x1fc00000 + itim (wx!rai) : ORIGIN = 0x80008000, LENGTH = 0x8000 } PHDRS @@ -127,13 +128,17 @@ SECTIONS { . = ALIGN(4); PROVIDE( metal_segment_itim_target_start = . ); - } >ram AT>flash :ram_init + } >itim AT>flash :itim_init .itim : { *(.itim .itim.*) - } >flash AT>flash :flash + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >itim AT>flash :itim_init . = ALIGN(8); @@ -144,8 +149,7 @@ SECTIONS *(.text.startup .text.startup.*) *(.text .text.*) *(.gnu.linkonce.t.*) - *(.itim .itim.*) - } >flash AT>flash :flash + } >itim AT>flash :flash .lalign : diff --git a/doc/sphinx/contents.rst b/doc/sphinx/contents.rst index cad7f78..3a20bad 100644 --- a/doc/sphinx/contents.rst +++ b/doc/sphinx/contents.rst @@ -153,3 +153,7 @@ The example programs can be found under the ``software/`` directory. - "Dhrystone" Benchmark Program by Reinhold P. Weicker +- coremark + + - "CoreMark" Benchmark Program that measures the performance of embedded + microcrontrollers (MCU) diff --git a/freedom-metal b/freedom-metal -Subproject 7eb6be9e76019ab6c20c78c529b747bf6bc2b16 +Subproject 2c101d05a09afaf8f00469e5b0565069055d6a2 diff --git a/scripts/fixup-dts b/scripts/fixup-dts index 278b835..37c2105 100755 --- a/scripts/fixup-dts +++ b/scripts/fixup-dts @@ -105,6 +105,31 @@ if [ `grep -c 'stdout-path' ${dts}` -eq 0 ]; then fi +# FPGA targets need a 0x400000 byte offset into their SPI flash + +# Is the target an FPGA? +if [ `echo ${dts} | grep -c 'arty'` -ne 0 -o `echo ${dts} | grep -c 'fpga'` -ne 0 ] ; then + # Is there a metal,entry property in the chosen node? + if [ `grep -c 'metal,entry' ${dts}` -eq 0 ] ; then + echo "$0: FPGA target needs metal,entry property to set boot offset." + + # Find the SPI device with the lowest base address + first_spi_node=`grep -oE "spi@[[:xdigit:]]+?" ${dts} | sort | head -n 1` + + # Get the DTS node label of that SPI device + spi_entry_label=`grep -oE "[^[:space:]]+?:\s+?${first_spi_node}" ${dts} | cut -d ':' -f 1` + + if [ `grep -c 'chosen' ${dts}` -eq 0 ]; then + ${SED} -i "/cpus/i chosen {\n};" ${dts} + fi + + ${SED} -i "/chosen/a metal,entry = <&${spi_entry_label} 0x400000>;" ${dts} + + echo -e "$0: \tAdded metal,entry for SPI node ${first_spi_node} with label ${spi_entry_label}" + fi +fi + + # Add a test memory node if one doesn't exist if [ `grep -c 'sifive,testram0' ${dts}` -eq 0 ]; then diff --git a/scripts/standalone.mk b/scripts/standalone.mk index 6f87950..d0740cd 100644 --- a/scripts/standalone.mk +++ b/scripts/standalone.mk @@ -49,6 +49,14 @@ ifeq ($(LINK_TARGET),) endif endif +ifeq ($(PROGRAM),coremark) +ifeq ($(CONFIGURATION),release) +ifeq ($(LINK_TARGET),) +LINK_TARGET = ramrodata +endif +endif +endif + ifeq ($(LINK_TARGET),) LINK_TARGET = default endif @@ -127,6 +135,15 @@ endif RISCV_XCFLAGS += -DDHRY_ITERS=$(TARGET_DHRY_ITERS) endif +ifeq ($(PROGRAM),coremark) +ifeq ($(RISCV_SERIES),sifive-7-series) +RISCV_XCFLAGS += -O2 -fno-common -funroll-loops -finline-functions -funroll-all-loops --param max-inline-insns-auto=20 -falign-functions=8 -falign-jumps=8 -falign-loops=8 --param inline-min-speedup=10 -mtune=sifive-7-series -ffast-math +else +RISCV_XCFLAGS += -O2 -fno-common -funroll-loops -finline-functions --param max-inline-insns-auto=20 -falign-functions=4 -falign-jumps=4 -falign-loops=4 --param inline-min-speedup=10 +endif +RISCV_XCFLAGS += -DITERATIONS=$(TARGET_CORE_ITERS) +endif + # Turn on garbage collection for unused sections RISCV_LDFLAGS += -Wl,--gc-sections # Turn on linker map file generation @@ -171,6 +188,7 @@ $(PROGRAM_ELF): \ $(BSP_DIR)/metal.$(LINK_TARGET).lds mkdir -p $(dir $@) $(MAKE) -C $(SRC_DIR) $(basename $(notdir $@)) \ + PORT_DIR=$(PORT_DIR) \ AR=$(RISCV_AR) \ CC=$(RISCV_GCC) \ CXX=$(RISCV_GXX) \ diff --git a/software/coremark b/software/coremark new file mode 160000 +Subproject 2a15fbb3ecae618f978a1c6f9eaa1fb469aa688 |