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-rw-r--r--Makefile49
-rw-r--r--bsp/coreip-e20-arty/settings.mk3
-rw-r--r--bsp/coreip-e20-rtl/settings.mk5
-rw-r--r--bsp/coreip-e21-arty/settings.mk3
-rw-r--r--bsp/coreip-e21-rtl/settings.mk5
-rw-r--r--bsp/coreip-e24-arty/settings.mk2
-rw-r--r--bsp/coreip-e24-rtl/settings.mk5
-rw-r--r--bsp/coreip-e31-arty/settings.mk2
-rw-r--r--bsp/coreip-e31-rtl/settings.mk5
-rw-r--r--bsp/coreip-e34-arty/settings.mk2
-rw-r--r--bsp/coreip-e34-rtl/settings.mk5
-rw-r--r--bsp/coreip-e76-arty/settings.mk3
-rw-r--r--bsp/coreip-e76-rtl/settings.mk5
-rw-r--r--bsp/coreip-s51-arty/settings.mk2
-rw-r--r--bsp/coreip-s51-rtl/settings.mk5
-rw-r--r--bsp/coreip-s54-arty/settings.mk4
-rw-r--r--bsp/coreip-s54-rtl/settings.mk5
-rw-r--r--bsp/coreip-s76-arty/settings.mk3
-rw-r--r--bsp/coreip-s76-rtl/settings.mk3
-rw-r--r--bsp/freedom-e310-arty/settings.mk6
-rw-r--r--bsp/sifive-hifive1-revb/settings.mk9
-rw-r--r--bsp/sifive-hifive1/settings.mk8
-rwxr-xr-xscripts/filter-targets21
-rw-r--r--scripts/standalone.mk14
m---------software/empty0
m---------software/example-itim0
m---------software/example-pmp0
m---------software/example-spi0
m---------software/hello0
29 files changed, 131 insertions, 43 deletions
diff --git a/Makefile b/Makefile
index 7f3eafb..7eb7229 100644
--- a/Makefile
+++ b/Makefile
@@ -106,16 +106,41 @@ clean:
# format or fixed text of the output without consulting the
# Freedom Studio dev team.
#############################################################
-#
-# Metal boards are any folders that aren't the Legacy BSP or update-targets.sh
-EXCLUDE_TARGET_DIRS = drivers env include libwrap update-targets.sh
+
+# Find all settings.mk with TARGET_REQUIRE_TAGS in TARGET_TAGS
+MATCHING_SETTINGS = $(shell scripts/filter-targets $(TARGET_ROOT)/bsp $(TARGET_REQUIRE_TAGS))
+
+# Get the name of the containing directory of all matching settings.mk
+MATCHING_TARGETS = $(patsubst $(TARGET_ROOT)/bsp/%/,%,$(dir $(MATCHING_SETTINGS)))
+
+.PHONY: list-targets
list-targets:
- @echo bsp-list: $(sort $(filter-out $(EXCLUDE_TARGET_DIRS),$(notdir $(wildcard bsp/*))))
+ @echo bsp-list: $(sort $(MATCHING_TARGETS))
+
+# Lists all available TARGET_TAGS
+#
+# 1. Find all settings.mk
+# 2. Extract the TARGET_TAGS line
+# 3. Extract the value of TARGET_TAGS
+# 4. Split each tag onto a newline
+# 5. Sort the lines
+# 6. Find unique tags
+#
+.PHONY: list-target-tags
+list-target-tags:
+ @echo target-tags: $(shell find $(TARGET_ROOT)/bsp -name settings.mk | \
+ xargs grep -he "TARGET_TAGS" | \
+ sed -r 's/TARGET_TAGS.*=(.*)/\1/' | \
+ tr ' ' '\n' | \
+ sort | \
+ uniq)
# Metal programs are any submodules in the software folder
+.PHONY: list-programs
list-programs:
@echo program-list: $(shell grep -o '= software/.*$$' .gitmodules | sed 's/.*\///')
+.PHONY: list-options
list-options: list-programs list-targets
#############################################################
@@ -131,13 +156,14 @@ include scripts/libmetal.mk
ifeq ($(STANDALONE_DEST),)
standalone:
$(error Please provide STANDALONE_DEST to create a standalone project)
-else
+else # STANDALONE_DEST != ""
$(STANDALONE_DEST):
$(STANDALONE_DEST)/%:
mkdir -p $@
-ifneq ($(COREIP_MEM_WIDTH),)
+ifneq ($(filter rtl,$(TARGET_TAGS)),)
+# TARGETs with the "rtl" TARGET_TAG need elf2hex in their standalone project
standalone: \
$(STANDALONE_DEST) \
$(STANDALONE_DEST)/bsp \
@@ -169,7 +195,7 @@ standalone: \
echo "PROGRAM = $(PROGRAM)" > $</Makefile
cat scripts/standalone.mk >> $</Makefile
cat scripts/libmetal.mk >> $</Makefile
-else
+else # "rtl" not in TARGET_TAGS
standalone: \
$(STANDALONE_DEST) \
$(STANDALONE_DEST)/bsp \
@@ -195,9 +221,9 @@ standalone: \
echo "PROGRAM = $(PROGRAM)" > $</Makefile
cat scripts/standalone.mk >> $</Makefile
cat scripts/libmetal.mk >> $</Makefile
-endif
+endif # rtl in TARGET_TAGS
-endif
+endif # STANDALONE_DEST
#############################################################
# Upload and Debug
@@ -210,7 +236,7 @@ else
RISCV_OPENOCD=openocd
endif
-ifneq ($(SEGGER_JLINK_OB),)
+ifneq ($(filter jlink,$(TARGET_TAGS)),)
upload: $(PROGRAM_HEX)
scripts/upload --hex $(PROGRAM_HEX) --jlink $(SEGGER_JLINK_EXE)
else
@@ -218,7 +244,7 @@ upload: $(PROGRAM_ELF)
scripts/upload --elf $(PROGRAM_ELF) --openocd $(RISCV_OPENOCD) --gdb $(RISCV_GDB) --openocd-config bsp/$(TARGET)/openocd.cfg
endif
-ifneq ($(SEGGER_JLINK_OB),)
+ifneq ($(filter jlink,$(TARGET_TAGS)),)
debug: $(PROGRAM_ELF)
scripts/debug --elf $(PROGRAM_ELF) --jlink $(SEGGER_JLINK_GDB_SERVER) --gdb $(RISCV_GDB)
else
@@ -226,3 +252,4 @@ debug: $(PROGRAM_ELF)
scripts/debug --elf $(PROGRAM_ELF) --openocd $(RISCV_OPENOCD) --gdb $(RISCV_GDB) --openocd-config bsp/$(TARGET)/openocd.cfg
endif
+
diff --git a/bsp/coreip-e20-arty/settings.mk b/bsp/coreip-e20-arty/settings.mk
index 31143b5..0b9c2cb 100644
--- a/bsp/coreip-e20-arty/settings.mk
+++ b/bsp/coreip-e20-arty/settings.mk
@@ -1,2 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
+RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e20-rtl/settings.mk b/bsp/coreip-e20-rtl/settings.mk
index 1ac4d9f..699498e 100644
--- a/bsp/coreip-e20-rtl/settings.mk
+++ b/bsp/coreip-e20-rtl/settings.mk
@@ -1,6 +1,7 @@
-#write_config_file
-
RISCV_ARCH=rv32imc
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
COREIP_MEM_WIDTH=32
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-e21-arty/settings.mk b/bsp/coreip-e21-arty/settings.mk
index 31143b5..0b9c2cb 100644
--- a/bsp/coreip-e21-arty/settings.mk
+++ b/bsp/coreip-e21-arty/settings.mk
@@ -1,2 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
+RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e21-rtl/settings.mk b/bsp/coreip-e21-rtl/settings.mk
index 32bb84d..f60f250 100644
--- a/bsp/coreip-e21-rtl/settings.mk
+++ b/bsp/coreip-e21-rtl/settings.mk
@@ -1,6 +1,7 @@
-#write_config_file
-
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
COREIP_MEM_WIDTH=32
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-e24-arty/settings.mk b/bsp/coreip-e24-arty/settings.mk
index 829d3e8..0b9c2cb 100644
--- a/bsp/coreip-e24-arty/settings.mk
+++ b/bsp/coreip-e24-arty/settings.mk
@@ -1,3 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e24-rtl/settings.mk b/bsp/coreip-e24-rtl/settings.mk
index 32bb84d..f60f250 100644
--- a/bsp/coreip-e24-rtl/settings.mk
+++ b/bsp/coreip-e24-rtl/settings.mk
@@ -1,6 +1,7 @@
-#write_config_file
-
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
COREIP_MEM_WIDTH=32
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-e31-arty/settings.mk b/bsp/coreip-e31-arty/settings.mk
index 829d3e8..0b9c2cb 100644
--- a/bsp/coreip-e31-arty/settings.mk
+++ b/bsp/coreip-e31-arty/settings.mk
@@ -1,3 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e31-rtl/settings.mk b/bsp/coreip-e31-rtl/settings.mk
index 32bb84d..f60f250 100644
--- a/bsp/coreip-e31-rtl/settings.mk
+++ b/bsp/coreip-e31-rtl/settings.mk
@@ -1,6 +1,7 @@
-#write_config_file
-
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
COREIP_MEM_WIDTH=32
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-e34-arty/settings.mk b/bsp/coreip-e34-arty/settings.mk
index 829d3e8..0b9c2cb 100644
--- a/bsp/coreip-e34-arty/settings.mk
+++ b/bsp/coreip-e34-arty/settings.mk
@@ -1,3 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e34-rtl/settings.mk b/bsp/coreip-e34-rtl/settings.mk
index 32bb84d..f60f250 100644
--- a/bsp/coreip-e34-rtl/settings.mk
+++ b/bsp/coreip-e34-rtl/settings.mk
@@ -1,6 +1,7 @@
-#write_config_file
-
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
COREIP_MEM_WIDTH=32
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-e76-arty/settings.mk b/bsp/coreip-e76-arty/settings.mk
index 31143b5..0b9c2cb 100644
--- a/bsp/coreip-e76-arty/settings.mk
+++ b/bsp/coreip-e76-arty/settings.mk
@@ -1,2 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
+RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e76-rtl/settings.mk b/bsp/coreip-e76-rtl/settings.mk
index fd049f4..dd09d48 100644
--- a/bsp/coreip-e76-rtl/settings.mk
+++ b/bsp/coreip-e76-rtl/settings.mk
@@ -1,6 +1,7 @@
-#write_config_file
-
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
RISCV_CMODEL=medlow
+
COREIP_MEM_WIDTH=64
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-s51-arty/settings.mk b/bsp/coreip-s51-arty/settings.mk
index 3f994a3..2832d7c 100644
--- a/bsp/coreip-s51-arty/settings.mk
+++ b/bsp/coreip-s51-arty/settings.mk
@@ -1,3 +1,5 @@
RISCV_ARCH=rv64imac
RISCV_ABI=lp64
RISCV_CMODEL=medany
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-s51-rtl/settings.mk b/bsp/coreip-s51-rtl/settings.mk
index a3cd0bb..4d48fc1 100644
--- a/bsp/coreip-s51-rtl/settings.mk
+++ b/bsp/coreip-s51-rtl/settings.mk
@@ -1,4 +1,7 @@
RISCV_ARCH=rv64imac
RISCV_ABI=lp64
-COREIP_MEM_WIDTH=64
RISCV_CMODEL=medany
+
+COREIP_MEM_WIDTH=64
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-s54-arty/settings.mk b/bsp/coreip-s54-arty/settings.mk
index ab3b474..2832d7c 100644
--- a/bsp/coreip-s54-arty/settings.mk
+++ b/bsp/coreip-s54-arty/settings.mk
@@ -1,3 +1,5 @@
RISCV_ARCH=rv64imac
RISCV_ABI=lp64
-iRISCV_CMODEL=medany
+RISCV_CMODEL=medany
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-s54-rtl/settings.mk b/bsp/coreip-s54-rtl/settings.mk
index fabb838..4d48fc1 100644
--- a/bsp/coreip-s54-rtl/settings.mk
+++ b/bsp/coreip-s54-rtl/settings.mk
@@ -1,4 +1,7 @@
RISCV_ARCH=rv64imac
RISCV_ABI=lp64
-RISCV_CMODE=medany
+RISCV_CMODEL=medany
+
COREIP_MEM_WIDTH=64
+
+TARGET_TAGS=rtl
diff --git a/bsp/coreip-s76-arty/settings.mk b/bsp/coreip-s76-arty/settings.mk
index 1627f4b..2832d7c 100644
--- a/bsp/coreip-s76-arty/settings.mk
+++ b/bsp/coreip-s76-arty/settings.mk
@@ -1,2 +1,5 @@
RISCV_ARCH=rv64imac
RISCV_ABI=lp64
+RISCV_CMODEL=medany
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-s76-rtl/settings.mk b/bsp/coreip-s76-rtl/settings.mk
index a7d8dfa..4d48fc1 100644
--- a/bsp/coreip-s76-rtl/settings.mk
+++ b/bsp/coreip-s76-rtl/settings.mk
@@ -1,4 +1,7 @@
RISCV_ARCH=rv64imac
RISCV_ABI=lp64
RISCV_CMODEL=medany
+
COREIP_MEM_WIDTH=64
+
+TARGET_TAGS=rtl
diff --git a/bsp/freedom-e310-arty/settings.mk b/bsp/freedom-e310-arty/settings.mk
index b7a7782..0b9c2cb 100644
--- a/bsp/freedom-e310-arty/settings.mk
+++ b/bsp/freedom-e310-arty/settings.mk
@@ -1,5 +1,5 @@
-#write_config_file
-
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
-RISCV_CMODE=medlow
+RISCV_CMODEL=medlow
+
+TARGET_TAGS=fpga openocd
diff --git a/bsp/sifive-hifive1-revb/settings.mk b/bsp/sifive-hifive1-revb/settings.mk
index 61e2b02..4c1f33e 100644
--- a/bsp/sifive-hifive1-revb/settings.mk
+++ b/bsp/sifive-hifive1-revb/settings.mk
@@ -1,4 +1,5 @@
-RISCV_ARCH = rv32imac
-RISCV_ABI = ilp32
-RISCV_CMODEL = medlow
-SEGGER_JLINK_OB = 1
+RISCV_ARCH=rv32imac
+RISCV_ABI=ilp32
+RISCV_CMODEL=medlow
+
+TARGET_TAGS=board jlink
diff --git a/bsp/sifive-hifive1/settings.mk b/bsp/sifive-hifive1/settings.mk
index fd73559..d863a6d 100644
--- a/bsp/sifive-hifive1/settings.mk
+++ b/bsp/sifive-hifive1/settings.mk
@@ -1,3 +1,5 @@
-RISCV_ARCH = rv32imac
-RISCV_ABI = ilp32
-RISCV_CMODEL = medlow
+RISCV_ARCH=rv32imac
+RISCV_ABI=ilp32
+RISCV_CMODEL=medlow
+
+TARGET_TAGS=board openocd
diff --git a/scripts/filter-targets b/scripts/filter-targets
new file mode 100755
index 0000000..580a433
--- /dev/null
+++ b/scripts/filter-targets
@@ -0,0 +1,21 @@
+#!/bin/bash
+
+set -e
+set -o pipefail
+
+unset tag
+unset bsp_dir
+unset all_settings
+
+bsp_dir="$1"
+shift 1
+
+all_settings=`find ${bsp_dir} -name settings.mk`
+
+while [[ "$1" != "" ]]
+do
+ all_settings=`grep -le "TARGET_TAGS.*=.*$1.*" ${all_settings}`
+ shift 1
+done
+
+echo ${all_settings}
diff --git a/scripts/standalone.mk b/scripts/standalone.mk
index c9da448..fd7486b 100644
--- a/scripts/standalone.mk
+++ b/scripts/standalone.mk
@@ -121,10 +121,7 @@ all: software
.PHONY: software
software: $(PROGRAM_ELF)
-ifneq ($(COREIP_MEM_WIDTH),)
-software: $(PROGRAM_HEX)
-endif
-ifneq ($(SEGGER_JLINK_OB),)
+ifneq ($(filter jlink rtl,$(TARGET_TAGS)),)
software: $(PROGRAM_HEX)
endif
@@ -149,14 +146,17 @@ $(PROGRAM_ELF): \
$(RISCV_SIZE) $@
-ifneq ($(SEGGER_JLINK_OB),)
# If we're using Segger J-Link OB, use objcopy to create an Intel hex file for programming
+ifneq ($(filter jlink,$(TARGET_TAGS)),)
$(PROGRAM_HEX): \
$(RISCV_OBJCOPY) \
$(PROGRAM_ELF)
$< -O ihex $(PROGRAM_ELF) $@
-else
-# Use elf2hex if we're not using Segger J-Link OB (i.e. for coreip-rtl targets)
+endif
+
+# Use elf2hex if we're creating a hex file for RTL simulation
+ifneq ($(filter rtl,$(TARGET_TAGS)),)
+.PHONY: software
$(PROGRAM_HEX): \
scripts/elf2hex/install/bin/$(CROSS_COMPILE)-elf2hex \
$(PROGRAM_ELF)
diff --git a/software/empty b/software/empty
-Subproject b7037457b6892952ceb96288e85eab7a52d9f7b
+Subproject 7803cc83a72083e7994b75a5fbc655b2cfaf291
diff --git a/software/example-itim b/software/example-itim
-Subproject 592565d30b00b9d90291c59cb9dee8afccb4d5d
+Subproject a1aec43ed1c7899b8a2e1ca4c16b138eb300540
diff --git a/software/example-pmp b/software/example-pmp
-Subproject 590115451b04422e933576dba846aa8e39a6cf0
+Subproject cee0c31bb386f58651f1c7c3bc7fb7cebc1d36d
diff --git a/software/example-spi b/software/example-spi
-Subproject 78200c708fd847d9fdea0281430a8a665854ac2
+Subproject de4536ffaa73d77f29d13922e971950f731a6ba
diff --git a/software/hello b/software/hello
-Subproject a9212fbe78293ae408259b98d05628e38c9071f
+Subproject d1397bec64187efb8b791fe1eb307aa3c760c69