diff options
23 files changed, 1906 insertions, 5 deletions
diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/.cproject b/FreedomStudio/E31FPGA/vectored_interrupts/.cproject new file mode 100644 index 0000000..8d8ac7e --- /dev/null +++ b/FreedomStudio/E31FPGA/vectored_interrupts/.cproject @@ -0,0 +1,219 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + <externalSettings/> + <extensions> + <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/> + <extension id="org.eclipse.cdt.core.GASErrorParser" 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instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.743554394;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2132640858"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> + </scannerConfigBuildInfo> + <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.424460842;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1695943366"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> + </scannerConfigBuildInfo> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> + <storageModule moduleId="refreshScope" versionNumber="2"> + <configuration configurationName="Debug"> + <resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/> + </configuration> + <configuration configurationName="Release"> + <resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/> + </configuration> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> +</cproject> diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/.gitignore b/FreedomStudio/E31FPGA/vectored_interrupts/.gitignore new file mode 100644 index 0000000..3df573f --- /dev/null +++ b/FreedomStudio/E31FPGA/vectored_interrupts/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/.project b/FreedomStudio/E31FPGA/vectored_interrupts/.project new file mode 100644 index 0000000..f34dc51 --- /dev/null +++ b/FreedomStudio/E31FPGA/vectored_interrupts/.project @@ -0,0 +1,233 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>vectored_interrupts</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <triggers>full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>bsp</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>vectored_interrupts.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/software/vectored_interrupts/vectored_interrupts.c</locationURI> + </link> + <link> + <name>bsp/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/.DS_Store</locationURI> + </link> + <link> + <name>bsp/drivers</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/include</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/.DS_Store</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/plic</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/.DS_Store</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-arty.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-arty.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env/encoding.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI> + </link> + <link> + <name>bsp/env/start.S</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI> + </link> + <link> + <name>bsp/env/ventry.S</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/ventry.S</locationURI> + </link> + <link> + <name>bsp/include/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/.DS_Store</locationURI> + </link> + <link> + <name>bsp/include/sifive</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci/fe300prci_driver.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.c</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci/fe300prci_driver.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.h</locationURI> + </link> + <link> + <name>bsp/drivers/plic/plic_driver.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.c</locationURI> + </link> + <link> + <name>bsp/drivers/plic/plic_driver.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/flash.lds</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/flash.lds</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/init.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/init.c</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/openocd.cfg</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/openocd.cfg</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/platform.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/platform.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/scratchpad.lds</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/scratchpad.lds</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/settings.mk</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/settings.mk</locationURI> + </link> + <link> + <name>bsp/include/sifive/bits.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/const.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/include/sifive/sections.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/smp.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/aon.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/clint.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/gpio.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/otp.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/plic.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/prci.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/pwm.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/spi.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/uart.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/sifive-coreplexip-e31-arty.cfg b/FreedomStudio/E31FPGA/vectored_interrupts/sifive-coreplexip-e31-arty.cfg new file mode 100644 index 0000000..8b382dc --- /dev/null +++ b/FreedomStudio/E31FPGA/vectored_interrupts/sifive-coreplexip-e31-arty.cfg @@ -0,0 +1,31 @@ +# JTAG adapter setup +adapter_khz 10000 + +interface ftdi +ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ftdi_vid_pid 0x15ba 0x002a + +ftdi_layout_init 0x0808 0x0a1b +ftdi_layout_signal nSRST -oe 0x0200 +#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi_layout_signal LED -data 0x0800 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 + +# Un-comment these two flash lines if you have a SPI flash and want to write +# it. +flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 +init +if {[ info exists pulse_srst]} { + ftdi_set_signal nSRST 0 + ftdi_set_signal nSRST z +} +halt +flash protect 0 64 last off +echo "Ready for Remote Connections" diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts Debug.launch b/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts Debug.launch new file mode 100644 index 0000000..73f5aaa --- /dev/null +++ b/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts Debug.launch @@ -0,0 +1,59 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType"> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/> +<booleanAttribute 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<locationURI>PARENT-3-PROJECT_LOC/bsp/env/.DS_Store</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-arty.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-arty.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e51-arty</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env/encoding.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI> + </link> + <link> + <name>bsp/env/hifive1.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/hifive1.h</locationURI> + </link> + <link> + <name>bsp/env/start.S</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI> + </link> + <link> + <name>bsp/env/ventry.S</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/ventry.S</locationURI> + </link> + <link> + <name>bsp/include/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/.DS_Store</locationURI> + </link> + <link> + <name>bsp/include/sifive</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci/fe300prci_driver.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.c</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci/fe300prci_driver.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.h</locationURI> + </link> + <link> + <name>bsp/drivers/plic/plic_driver.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.c</locationURI> + </link> + <link> + <name>bsp/drivers/plic/plic_driver.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e51-arty/flash.lds</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/flash.lds</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e51-arty/init.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/init.c</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e51-arty/openocd.cfg</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/openocd.cfg</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e51-arty/platform.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/platform.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e51-arty/scratchpad.lds</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/scratchpad.lds</locationURI> + </link> + <link> + <name>bsp/include/sifive/bits.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/const.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/include/sifive/sections.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/smp.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/aon.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/clint.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/gpio.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/otp.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/plic.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/prci.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/pwm.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/spi.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/uart.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/FreedomStudio/E51FPGA/vectored_interrupts/sifive-coreplexip-e51-arty.cfg b/FreedomStudio/E51FPGA/vectored_interrupts/sifive-coreplexip-e51-arty.cfg new file mode 100644 index 0000000..8b382dc --- /dev/null +++ b/FreedomStudio/E51FPGA/vectored_interrupts/sifive-coreplexip-e51-arty.cfg @@ -0,0 +1,31 @@ +# JTAG adapter setup +adapter_khz 10000 + +interface ftdi +ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ftdi_vid_pid 0x15ba 0x002a + +ftdi_layout_init 0x0808 0x0a1b +ftdi_layout_signal nSRST -oe 0x0200 +#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi_layout_signal LED -data 0x0800 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 + +# Un-comment these two flash lines if you have a SPI flash and want to write +# it. +flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 +init +if {[ info exists pulse_srst]} { + ftdi_set_signal nSRST 0 + ftdi_set_signal nSRST z +} +halt +flash protect 0 64 last off +echo "Ready for Remote Connections" diff --git a/FreedomStudio/E51FPGA/vectored_interrupts/vectored_interrupts OpenOCD.launch b/FreedomStudio/E51FPGA/vectored_interrupts/vectored_interrupts OpenOCD.launch new file mode 100644 index 0000000..b25a5d2 --- /dev/null +++ b/FreedomStudio/E51FPGA/vectored_interrupts/vectored_interrupts OpenOCD.launch @@ -0,0 +1,59 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType"> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/> +<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/> +<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-coreplexip-e51-arty.cfg"/> +<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/> +<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/> +<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/> +<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/vectored_interrupts.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="vectored_interrupts"/> +<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/vectored_interrupts"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"/> "/> +<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/> +</launchConfiguration> @@ -97,7 +97,7 @@ help: @echo " Launch OpenOCD or GDB seperately. Allows Ctrl-C to halt running" @echo " programs." @echo "" - @echo " dasm [PROGRAM=$(BOARD)]:" + @echo " dasm [PROGRAM=$(PROGRAM)]:" @echo " Generates the dissassembly output of 'objdump -D' to stdout." @echo "" @echo " For more information, visit dev.sifive.com" @@ -45,11 +45,11 @@ If your machine has enough resources, you can speed up the build process by addi If you would like to avoid compiling the tools from source, they are available as pre-built binaries from -https://sifive.com/products/tools +https://www.sifive.com/products/tools For OpenOCD and/or RISC-V GNU Toolchain, download the .tar.gz for your platform, and unpack it to -your desired location. Then, use the `RISC_PATH` and `RISCV_OPENOCD_PATH` +your desired location. Then, use the `RISCV_PATH` and `RISCV_OPENOCD_PATH` variables when attempting to use the tools: ``` diff --git a/bsp/env/coreplexip-e31-arty/init.c b/bsp/env/coreplexip-e31-arty/init.c index 84ae09e..888f04f 100644 --- a/bsp/env/coreplexip-e31-arty/init.c +++ b/bsp/env/coreplexip-e31-arty/init.c @@ -10,8 +10,14 @@ #define XSTR(x) #x #define STR(x) XSTR(x) +#ifndef VECT_IRQ + #define TRAP_ENTRY trap_entry +#else + #define TRAP_ENTRY vtrap_entry +#endif + extern int main(int argc, char** argv); -extern void trap_entry(); +extern void TRAP_ENTRY(); static unsigned long get_cpu_freq() { @@ -57,6 +63,7 @@ typedef void (*my_interrupt_function_ptr_t) (void); extern my_interrupt_function_ptr_t localISR[]; #endif +#ifndef VECT_IRQ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) { if (0){ @@ -81,6 +88,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) } return epc; } +#endif void _init() { @@ -89,7 +97,8 @@ void _init() puts("core freq at " STR(CPU_FREQ) " Hz\n"); - write_csr(mtvec, &trap_entry); + write_csr(mtvec, ((unsigned long)&TRAP_ENTRY | MTVEC_VECTORED)); + #endif } diff --git a/bsp/env/coreplexip-e31-arty/platform.h b/bsp/env/coreplexip-e31-arty/platform.h index 42c8887..307a0c6 100644 --- a/bsp/env/coreplexip-e31-arty/platform.h +++ b/bsp/env/coreplexip-e31-arty/platform.h @@ -13,6 +13,11 @@ #define MCAUSE_CAUSE 0x7FFFFFFFFFFFFFFFUL #endif +#ifdef VECT_IRQ + #define MTVEC_VECTORED 0x01 +#else + #define MTVEC_VECTORED 0x00 +#endif #define IRQ_M_LOCAL 16 #define MIP_MLIP(x) (1 << (IRQ_M_LOCAL + x)) diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S new file mode 100644 index 0000000..5c82c48 --- /dev/null +++ b/bsp/env/ventry.S @@ -0,0 +1,288 @@ +// See LICENSE for license details + +#ifndef VENTRY_S +#define VENTRY_S + +#include "encoding.h" +#include "sifive/bits.h" + +#only save caller registers +.macro TRAP_ENTRY + addi sp, sp, -16*REGBYTES + + STORE x1, 0*REGBYTES(sp) + STORE x5, 1*REGBYTES(sp) + STORE x6, 2*REGBYTES(sp) + STORE x7, 3*REGBYTES(sp) + STORE x10, 4*REGBYTES(sp) + STORE x11, 5*REGBYTES(sp) + STORE x12, 6*REGBYTES(sp) + STORE x13, 7*REGBYTES(sp) + STORE x14, 8*REGBYTES(sp) + STORE x15, 9*REGBYTES(sp) + STORE x16, 10*REGBYTES(sp) + STORE x17, 11*REGBYTES(sp) + STORE x28, 12*REGBYTES(sp) + STORE x29, 13*REGBYTES(sp) + STORE x30, 14*REGBYTES(sp) + STORE x31, 15*REGBYTES(sp) +.endm + +#restore caller registers +.macro TRAP_EXIT +# Remain in M-mode after mret + li t0, MSTATUS_MPP + csrs mstatus, t0 + + LOAD x1, 0*REGBYTES(sp) + LOAD x5, 1*REGBYTES(sp) + LOAD x6, 2*REGBYTES(sp) + LOAD x7, 3*REGBYTES(sp) + LOAD x10, 4*REGBYTES(sp) + LOAD x11, 5*REGBYTES(sp) + LOAD x12, 6*REGBYTES(sp) + LOAD x13, 7*REGBYTES(sp) + LOAD x14, 8*REGBYTES(sp) + LOAD x15, 9*REGBYTES(sp) + LOAD x16, 10*REGBYTES(sp) + LOAD x17, 11*REGBYTES(sp) + LOAD x28, 12*REGBYTES(sp) + LOAD x29, 13*REGBYTES(sp) + LOAD x30, 14*REGBYTES(sp) + LOAD x31, 15*REGBYTES(sp) + + addi sp, sp, 16*REGBYTES + mret +.endm + + + +#Vector table for E31/E51 + + .section .text.entry + .align 8 + .global vtrap_entry +vtrap_entry: + j sync_trap + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j vmsi_Handler + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j vmti_Handler + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j vmei_Handler + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j reserved + .align 2 + j vlip_Handler0 + .align 2 + j vlip_Handler1 + .align 2 + j vlip_Handler2 + .align 2 + j vlip_Handler3 + .align 2 + j vlip_Handler4 + .align 2 + j vlip_Handler5 + .align 2 + j vlip_Handler6 + .align 2 + j vlip_Handler7 + .align 2 + j vlip_Handler8 + .align 2 + j vlip_Handler9 + .align 2 + j vlip_Handler10 + .align 2 + j vlip_Handler11 + .align 2 + j vlip_Handler12 + .align 2 + j vlip_Handler13 + .align 2 + j vlip_Handler14 + .align 2 + j vlip_Handler15 + +#synchronous trap +sync_trap: + TRAP_ENTRY + jal handle_sync_trap + TRAP_EXIT + +#Machine Software Interrupt +vmsi_Handler: + TRAP_ENTRY + jal reserved + TRAP_EXIT + +#Machine Timer Interrupt +vmti_Handler: + TRAP_ENTRY + jal handle_m_time_interrupt + TRAP_EXIT + +#Machine External Interrupt +vmei_Handler: + TRAP_ENTRY + jal handle_m_external_interrupt + TRAP_EXIT + +#LIP0 +vlip_Handler0: + TRAP_ENTRY + jal handle_local_interrupt0 + TRAP_EXIT + +#LIP1 +vlip_Handler1: + TRAP_ENTRY + jal handle_local_interrupt1 + TRAP_EXIT + +#LIP2 +vlip_Handler2: + TRAP_ENTRY + jal handle_local_interrupt2 + TRAP_EXIT + +#LIP3 +vlip_Handler3: + TRAP_ENTRY + jal handle_local_interrupt3 + TRAP_EXIT + +#LIP4 +vlip_Handler4: + TRAP_ENTRY + jal handle_local_interrupt4 + TRAP_EXIT + +#LIP5 +vlip_Handler5: + TRAP_ENTRY + jal handle_local_interrupt5 + TRAP_EXIT + +#LIP6 +vlip_Handler6: + TRAP_ENTRY + jal handle_local_interrupt6 + TRAP_EXIT + +#LIP7 +vlip_Handler7: + TRAP_ENTRY + jal handle_local_interrupt7 + TRAP_EXIT + +#LIP8 +vlip_Handler8: + TRAP_ENTRY + jal handle_local_interrupt8 + TRAP_EXIT + +#LIP9 +vlip_Handler9: + TRAP_ENTRY + jal handle_local_interrupt9 + TRAP_EXIT + +#LIP10 +vlip_Handler10: + TRAP_ENTRY + jal handle_local_interrupt10 + TRAP_EXIT + +#LIP11 +vlip_Handler11: + TRAP_ENTRY + jal handle_local_interrupt11 + TRAP_EXIT + +#LIP12 +vlip_Handler12: + TRAP_ENTRY + jal handle_local_interrupt12 + TRAP_EXIT + +#LIP13 +vlip_Handler13: + TRAP_ENTRY + jal handle_local_interrupt13 + TRAP_EXIT + +#LIP14 +vlip_Handler14: + TRAP_ENTRY + jal handle_local_interrupt14 + TRAP_EXIT + +#LIP15 +vlip_Handler15: + TRAP_ENTRY + jal handle_local_interrupt15 + TRAP_EXIT + +#unimplemented ISRs trap here +.weak reserved +reserved: +.weak handle_local_interrupt0 +handle_local_interrupt0: +.weak handle_local_interrupt1 +handle_local_interrupt1: +.weak handle_local_interrupt2 +handle_local_interrupt2: +.weak handle_local_interrupt3 +handle_local_interrupt3: +.weak handle_local_interrupt4 +handle_local_interrupt4: +.weak handle_local_interrupt5 +handle_local_interrupt5: +.weak handle_local_interrupt6 +handle_local_interrupt6: +.weak handle_local_interrupt7 +handle_local_interrupt7: +.weak handle_local_interrupt8 +handle_local_interrupt8: +.weak handle_local_interrupt9 +handle_local_interrupt9: +.weak handle_local_interrupt10 +handle_local_interrupt10: +.weak handle_local_interrupt11 +handle_local_interrupt11: +.weak handle_local_interrupt12 +handle_local_interrupt12: +.weak handle_local_interrupt13 +handle_local_interrupt13: +.weak handle_local_interrupt14 +handle_local_interrupt14: +.weak handle_local_interrupt15 +handle_local_interrupt15: +1: + j 1b + +#endif diff --git a/openocd b/openocd -Subproject 5747469eae56101bd167b450bc4d802162b113c +Subproject 66806aa70dc1e69de748e28c618dd15b1d569ee diff --git a/riscv-gnu-toolchain b/riscv-gnu-toolchain -Subproject f5fae1c27b2365da773816ddcd92f533867f28e +Subproject 65cb174d37e2efe99e094eb317113442c79ed3c diff --git a/software/vectored_interrupts/Makefile b/software/vectored_interrupts/Makefile new file mode 100644 index 0000000..4365038 --- /dev/null +++ b/software/vectored_interrupts/Makefile @@ -0,0 +1,10 @@ +TARGET = vectored_interrupts +CFLAGS += -O2 -fno-builtin-printf -DVECT_IRQ + +BSP_BASE = ../../bsp + +ASM_SRCS += $(ENV_DIR)/ventry.S +C_SRCS += vectored_interrupts.c +C_SRCS += $(BSP_BASE)/drivers/plic/plic_driver.c + +include $(BSP_BASE)/env/common.mk diff --git a/software/vectored_interrupts/vectored_interrupts.c b/software/vectored_interrupts/vectored_interrupts.c new file mode 100644 index 0000000..cb6a864 --- /dev/null +++ b/software/vectored_interrupts/vectored_interrupts.c @@ -0,0 +1,270 @@ +// See LICENSE for license details. + +#include <stdio.h> +#include <stdlib.h> +#include "platform.h" +#include <string.h> +#include "plic/plic_driver.h" +#include "encoding.h" +#include <unistd.h> + +#ifndef _SIFIVE_COREPLEXIP_ARTY_H +#error 'global_interrupts' demo only supported for Coreplex IP Eval Kits +#endif + +// Global Instance data for the PLIC +// for use by the PLIC Driver. +plic_instance_t g_plic; + +// Structures for registering different interrupt handlers +// for different parts of the application. +typedef void (*interrupt_function_ptr_t) (void); +//array of function pointers which contains the PLIC +//interrupt handlers +interrupt_function_ptr_t g_ext_interrupt_handlers[PLIC_NUM_INTERRUPTS]; + +//ecall countdown +uint32_t ecall_countdown; +//ecall macro used to store argument in a0 +#define ECALL(arg) ({ \ + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg); \ + asm volatile ("ecall" \ + : "+r" (a0) \ + : \ + : "memory"); \ + a0; \ +}) + + +const char * instructions_msg = " \ +\n\ + SIFIVE, INC.\n\ +E31/E51 Coreplex IP Eval Kit 'vectored_interrupts' demo. \n\ +\n\ +This demo demonstrates Vectored Interrupts capabilities of\n\ +the E31/E51 Coreplex. The vector table is defined in \n\ +bsp/env/ventry.S \n\ +Button 0 is a global external interrupt routed to the PLIC.\n\ +Button 1 is a local interrupt.\n\ +Every 10 seconds, an ECALL is made. \n\ +\n"; + +void print_instructions() { + + write (STDOUT_FILENO, instructions_msg, strlen(instructions_msg)); + +} + +void set_timer() { + static uint64_t then = 0; + + volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME); + volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP); + if(then != 0) { + //next timer irq is 1 second from previous + then += 1*RTC_FREQ; + } else{ //first time setting the timer + uint64_t now = *mtime; + then = now + 1*RTC_FREQ; + } + *mtimecmp = then; + + set_csr(mie, MIP_MTIP); +} + +/*Entry Point for Machine Timer Interrupt Handler*/ +/*called from bsp/env/ventry.s */ +void handle_m_time_interrupt(){ + static uint32_t onoff=1; + + clear_csr(mie, MIP_MTIP); + + //increment ecall_countdown + ecall_countdown++; + + // Set Green LED + if(onoff) { + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << GREEN_LED_OFFSET) ; + onoff=0; + }else { + GPIO_REG(GPIO_OUTPUT_VAL) &= ~((0x1 << GREEN_LED_OFFSET)) ; + onoff=1; + } + + set_timer(); + //re-enable button1 irq + set_csr(mie, MIP_MLIP(LOCAL_INT_BTN_1)); + +} + +/*Synchronous Trap Handler*/ +/*called from bsp/env/ventry.s */ +void handle_sync_trap(uint32_t arg0) { + uint32_t exception_code = read_csr(mcause); + + //check for machine mode ecall + if(exception_code == CAUSE_MACHINE_ECALL) { + //reset ecall_countdown + ecall_countdown = 0; + + //ecall argument is stored in a0 prior to + //ECALL instruction. + printf("ecall from M-mode: %d\n",arg0); + + //on exceptions, mepc points to the instruction + //which triggered the exception, in order to + //return to the next instruction, increment + //mepc + unsigned long epc = read_csr(mepc); + epc += 4; //return to next instruction + write_csr(mepc, epc); + + } else{ + printf("vUnhandled Trap:\n"); + _exit(1 + read_csr(mcause)); + } +} + +/*Entry Point for PLIC Interrupt Handler*/ +/*called from bsp/env/ventry.s */ +void handle_m_external_interrupt(){ + printf("In PLIC handler\n"); + plic_source int_num = PLIC_claim_interrupt(&g_plic); + if ((int_num >=1 ) && (int_num < PLIC_NUM_INTERRUPTS)) { + g_ext_interrupt_handlers[int_num](); + } + else { + exit(1 + (uintptr_t) int_num); + } + PLIC_complete_interrupt(&g_plic, int_num); +} + +//default empty PLIC handler +void invalid_global_isr() { + printf("Unexpected global interrupt!\n"); +} + +/* b0 global interrupt isr */ +/*called from handle_m_external_interrupt */ +void button_0_handler() { + static uint32_t onoff=1; + // Set Green LED + + printf("In Button 0 handler\n"); + + if(onoff) { + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << BLUE_LED_OFFSET) ; + onoff=0; + }else { + GPIO_REG(GPIO_OUTPUT_VAL) &= ~((0x1 << BLUE_LED_OFFSET)) ; + onoff=1; + } + + //clear irq - interrupt pending register is write 1 to clear + GPIO_REG(GPIO_FALL_IP) |= (1<<BUTTON_0_OFFSET); +} + +/*b1 local vectored irq handler */ +/*called from bsp/env/ventry.s */ +void handle_local_interrupt5() { + static uint32_t onoff=1; + // Set Green LED + + printf("In Button 1 handler\n"); + + if(onoff) { + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << RED_LED_OFFSET) ; + onoff=0; + }else { + GPIO_REG(GPIO_OUTPUT_VAL) &= ~((0x1 << RED_LED_OFFSET)) ; + onoff=1; + } + + //debounce by turning off until next timer tick + clear_csr(mie, MIP_MLIP(LOCAL_INT_BTN_1)); +} + +/*configures Button0 as a global gpio irq*/ +void b0_irq_init() { + + //dissable hw io function + GPIO_REG(GPIO_IOF_EN ) &= ~(1 << BUTTON_0_OFFSET); + + //set to input + GPIO_REG(GPIO_INPUT_EN) |= (1<<BUTTON_0_OFFSET); + GPIO_REG(GPIO_PULLUP_EN) |= (1<<BUTTON_0_OFFSET); + + //set to interrupt on falling edge + GPIO_REG(GPIO_FALL_IE) |= (1<<BUTTON_0_OFFSET); + + PLIC_init(&g_plic, + PLIC_CTRL_ADDR, + PLIC_NUM_INTERRUPTS, + PLIC_NUM_PRIORITIES); + + PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_0); + PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_0, 2); + g_ext_interrupt_handlers[INT_DEVICE_BUTTON_0] = button_0_handler; +} + +/*configures Button1 as a local interrupt*/ +void b1_irq_init() { + + //enable the interrupt + set_csr(mie, MIP_MLIP(LOCAL_INT_BTN_1)); + +} + +/*turn down the brightness, and configure GPIO */ +void led_init() { + // Make sure people aren't blinded by LEDs connected here. + PWM0_REG(PWM_CMP0) = 0xFE; + PWM0_REG(PWM_CMP1) = 0xFF; + PWM0_REG(PWM_CMP2) = 0xFF; + PWM0_REG(PWM_CMP3) = 0xFF; + // Set up RGB LEDs for a visual. + GPIO_REG(GPIO_OUTPUT_EN) |= ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET)| (0x1<< BLUE_LED_OFFSET)); + GPIO_REG(GPIO_OUTPUT_VAL) &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1<< BLUE_LED_OFFSET)); + +} + +int main(int argc, char **argv) +{ + uint32_t ecall_count = 0; + + //setup default global interrupt handler + for (int gisr = 0; gisr < PLIC_NUM_INTERRUPTS; gisr++){ + g_ext_interrupt_handlers[PLIC_NUM_INTERRUPTS] = invalid_global_isr; + } + + print_instructions(); + + led_init(); + b0_irq_init(); + b1_irq_init(); + + //initialize ecall_countdown + ecall_countdown = 0; + + // Set up machine timer interrupt. + set_timer(); + + // Enable Global (PLIC) interrupts. + set_csr(mie, MIP_MEIP); + + // Enable all interrupts + set_csr(mstatus, MSTATUS_MIE); + + + while(1){ + asm volatile ("wfi"); + //check if ecall_countdown is 10 + if(ecall_countdown == 10) { + ECALL(ecall_count++); + } + //otherwise wfi + } + + return 0; + +} diff --git a/software/watchdog/.gitignore b/software/watchdog/.gitignore new file mode 100644 index 0000000..35566c7 --- /dev/null +++ b/software/watchdog/.gitignore @@ -0,0 +1 @@ +demo_gpio diff --git a/software/watchdog/.unsupported-boards b/software/watchdog/.unsupported-boards new file mode 100644 index 0000000..1e65df5 --- /dev/null +++ b/software/watchdog/.unsupported-boards @@ -0,0 +1 @@ +coreplexip-e51-arty diff --git a/software/watchdog/Makefile b/software/watchdog/Makefile new file mode 100644 index 0000000..f614a4e --- /dev/null +++ b/software/watchdog/Makefile @@ -0,0 +1,9 @@ +TARGET = watchdog +CFLAGS += -O2 -fno-builtin-printf -DUSE_PLIC -DUSE_M_TIME + +BSP_BASE = ../../bsp + +C_SRCS += watchdog.c +C_SRCS += $(BSP_BASE)/drivers/plic/plic_driver.c + +include $(BSP_BASE)/env/common.mk diff --git a/software/watchdog/watchdog.c b/software/watchdog/watchdog.c new file mode 100644 index 0000000..672ed68 --- /dev/null +++ b/software/watchdog/watchdog.c @@ -0,0 +1,221 @@ +// See LICENSE for license details. + +#include <stdio.h> +#include <stdlib.h> +#include "platform.h" +#include <string.h> +#include "plic/plic_driver.h" +#include "encoding.h" +#include <unistd.h> +#include "stdatomic.h" + +void reset_demo (void); + +// Structures for registering different interrupt handlers +// for different parts of the application. +typedef void (*function_ptr_t) (void); +void no_interrupt_handler (void) {}; +function_ptr_t g_ext_interrupt_handlers[PLIC_NUM_INTERRUPTS]; + + +// Instance data for the PLIC. +plic_instance_t g_plic; + + +/** +* use mtime to wait for a specified number of ticks. +* async determins if this is a busy wait, or if +* an irq is scheduled +*/ +void mtime_wait( uint64_t ticks, uint32_t async) +{ + + volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME); + uint64_t now = *mtime; + + //if async, schedule irq + if(async) { + volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP); + uint64_t then = now + ticks; + *mtimecmp = then; + set_csr(mie, MIP_MTIP); + + } else { + //else busy wait + uint64_t then = now + ticks; + while(*mtime<then) {} + + } + +} + +/*Entry Point for PLIC Interrupt Handler*/ +void handle_m_ext_interrupt(){ + plic_source int_num = PLIC_claim_interrupt(&g_plic); + if ((int_num >=1 ) && (int_num < PLIC_NUM_INTERRUPTS)) { + g_ext_interrupt_handlers[int_num](); + } + else { + exit(1 + (uintptr_t) int_num); + } + PLIC_complete_interrupt(&g_plic, int_num); +} + +//global countdown timer +static uint32_t countdown = 10; +/*Entry Point for Machine Timer Interrupt Handler*/ +void handle_m_time_interrupt(){ + + //cleare the timer irq + clear_csr(mie, MIP_MTIP); + + //schedule next timer irq for 1 second + mtime_wait(1*RTC_FREQ, 1); + + //flash a led + GPIO_REG(GPIO_OUTPUT_VAL) ^= (0x1 << BLUE_LED_OFFSET); + + //print the count + printf("watchdog reset in %d\n", countdown--); +} + + +const char * instructions_msg = " \ +\n\ + SIFIVE, INC.\n\ +\n\ + 5555555555555555555555555\n\ + 5555 5555\n\ + 5555 5555\n\ + 5555 5555\n\ + 5555 5555555555555555555555\n\ + 5555 555555555555555555555555\n\ + 5555 5555\n\ + 5555 5555\n\ + 5555 5555\n\ +5555555555555555555555555555 55555\n\ + 55555 555555555 55555\n\ + 55555 55555 55555\n\ + 55555 5 55555\n\ + 55555 55555\n\ + 55555 55555\n\ + 55555 55555\n\ + 55555 55555\n\ + 55555 55555\n\ + 555555555\n\ + 55555\n\ + 5\n\ +\n\ +This application demonstrates the functionality of\n\ +the watchdog timer present in the HiFive1 AON peripheral.\n\ +\n\ +The Watchdog timer will expire in 10 seconds resulting in\n\ +a software reset.\n\ +\n\ +Press a key to prevent a reset\n\ +"; + +void print_instructions() { + + write (STDOUT_FILENO, instructions_msg, strlen(instructions_msg)); + +} + + +/** +* Flash the red led for a second, then set up +* blue for blinking during mtime irq +*/ +void led_init() { + + + // Set up the GPIOs such that the LED GPIO + // can be used as both Inputs and Outputs. + GPIO_REG(GPIO_INPUT_EN) &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ; + GPIO_REG(GPIO_OUTPUT_EN) |= ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET)| (0x1<< BLUE_LED_OFFSET)); + GPIO_REG(GPIO_OUTPUT_VAL) |= ((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1<< BLUE_LED_OFFSET)); + + //flash red led to indicate reset + GPIO_REG(GPIO_OUTPUT_VAL) &= ~(0x1 << RED_LED_OFFSET) ; + mtime_wait(1*RTC_FREQ,0); + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << RED_LED_OFFSET) ; +} + +/** +* initialize the watchdog to reset in +* 5 seconds +**/ +void watchdog_init() { + + +//reset in 10 seconds +AON_REG(AON_WDOGKEY) = AON_WDOGKEY_VALUE; +AON_REG(AON_WDOGCMP) = 11; +//wdogconfig: : wdogrsten | enablealways | reset to 0 | max scale +AON_REG(AON_WDOGKEY) = AON_WDOGKEY_VALUE; +AON_REG(AON_WDOGCFG) |= (AON_WDOGCFG_RSTEN | AON_WDOGCFG_ENALWAYS |\ + AON_WDOGCFG_ZEROCMP | AON_WDOGCFG_SCALE) ; + +} + +void reset_demo () { + + // Disable the machine & timer interrupts until setup is done. + clear_csr(mie, MIP_MEIP); + clear_csr(mie, MIP_MTIP); + + //enable uart input + UART0_REG(UART_REG_RXCTRL) = UART_RXEN; + + /************************************************************************** + * Set up the PLIC + *************************************************************************/ + PLIC_init(&g_plic, + PLIC_CTRL_ADDR, + PLIC_NUM_INTERRUPTS, + PLIC_NUM_PRIORITIES); + + for (int ii = 0; ii < PLIC_NUM_INTERRUPTS; ii ++){ + g_ext_interrupt_handlers[ii] = no_interrupt_handler; + } + + + led_init(); + print_instructions(); + watchdog_init(); + + // Enable the Machine-External bit in MIE + set_csr(mie, MIP_MEIP); + // Enable interrupts in general. + set_csr(mstatus, MSTATUS_MIE); +} + +int main(int argc, char **argv) +{ + + reset_demo(); + //schedule a 1 second timer + mtime_wait(1*RTC_FREQ,1); + + + while (1){ + char c; + if(((int32_t) UART0_REG(UART_REG_RXFIFO)) > 0){ + //flash green led to indicate Kick + GPIO_REG(GPIO_OUTPUT_VAL) &= ~(0x1 << GREEN_LED_OFFSET) ; + + printf("Feeding Watchdog.\nHiFive1 will reset in 10 seconds.\n"); + countdown = 10; + AON_REG(AON_WDOGKEY) = AON_WDOGKEY_VALUE; + AON_REG(AON_WDOGFEED) = AON_WDOGFEED_VALUE; + + //busy wait a bit so the user sees the led blink + mtime_wait(5000, 0); + //turn off led + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << GREEN_LED_OFFSET) ; + } + } + + return 0; + +} |