diff options
Diffstat (limited to 'FreedomStudio/E31FPGA')
| -rw-r--r-- | FreedomStudio/E31FPGA/demo_gpio/.cproject | 160 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/demo_gpio/.gitignore | 1 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/demo_gpio/.project | 228 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/demo_gpio/demo_gpio OpenOCD.launch | 59 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/demo_gpio/link.lds | 167 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/demo_gpio/openocd.cfg | 31 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/.cproject | 164 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/.gitignore | 1 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/.project | 363 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/global_interrupts Debug.launch | 59 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/global_interrupts.c | 250 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/link.lds | 167 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/global_interrupts/openocd.cfg | 31 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject | 134 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/wrap-E31FPGA/.gitignore | 1 | ||||
| -rw-r--r-- | FreedomStudio/E31FPGA/wrap-E31FPGA/.project | 153 |
16 files changed, 1969 insertions, 0 deletions
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a/FreedomStudio/E31FPGA/demo_gpio/.gitignore b/FreedomStudio/E31FPGA/demo_gpio/.gitignore new file mode 100644 index 0000000..3df573f --- /dev/null +++ b/FreedomStudio/E31FPGA/demo_gpio/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/FreedomStudio/E31FPGA/demo_gpio/.project b/FreedomStudio/E31FPGA/demo_gpio/.project new file mode 100644 index 0000000..5f5a4f9 --- /dev/null +++ b/FreedomStudio/E31FPGA/demo_gpio/.project @@ -0,0 +1,228 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>demo_gpio</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <triggers>full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>bsp</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>demo_gpio.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/software/demo_gpio/demo_gpio.c</locationURI> + </link> + <link> + <name>bsp/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/.DS_Store</locationURI> + </link> + <link> + <name>bsp/drivers</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/include</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/plic</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/.DS_Store</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/env/encoding.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI> + </link> + <link> + <name>bsp/env/entry.S</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/entry.S</locationURI> + </link> + <link> + <name>bsp/env/hifive1.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/hifive1.h</locationURI> + </link> + <link> + <name>bsp/env/start.S</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI> + </link> + <link> + <name>bsp/include/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/.DS_Store</locationURI> + </link> + <link> + <name>bsp/include/sifive</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci/fe300prci_driver.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.c</locationURI> + </link> + <link> + <name>bsp/drivers/fe300prci/fe300prci_driver.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.h</locationURI> + </link> + <link> + <name>bsp/drivers/plic/plic_driver.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.c</locationURI> + </link> + <link> + <name>bsp/drivers/plic/plic_driver.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/init.c</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/init.c</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/link.lds</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/link.lds</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/openocd.cfg</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/openocd.cfg</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/platform.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/platform.h</locationURI> + </link> + <link> + <name>bsp/env/coreplexip-e31-arty/settings.mk</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e31-arty/settings.mk</locationURI> + </link> + <link> + <name>bsp/include/sifive/.DS_Store</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/.DS_Store</locationURI> + </link> + <link> + <name>bsp/include/sifive/bits.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/const.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>bsp/include/sifive/sections.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/smp.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/aon.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/clint.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/gpio.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/otp.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/plic.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/prci.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/pwm.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/spi.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI> + </link> + <link> + <name>bsp/include/sifive/devices/uart.h</name> + <type>1</type> + <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/FreedomStudio/E31FPGA/demo_gpio/demo_gpio OpenOCD.launch b/FreedomStudio/E31FPGA/demo_gpio/demo_gpio OpenOCD.launch new file mode 100644 index 0000000..1e7b0d5 --- /dev/null +++ b/FreedomStudio/E31FPGA/demo_gpio/demo_gpio OpenOCD.launch @@ -0,0 +1,59 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="ilg.gnuarmeclipse.debug.gdbjtag.openocd.launchConfigurationType"> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doContinue" value="true"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/> +<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.firstResetType" value="init"/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off set arch riscv:rv32"/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${FSBINDIR}/${openocd_executable}"/> +<intAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f openocd.cfg"/> +<intAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/> +<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU ARM OpenOCD"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/> +<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/> +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/> +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${FSBINDIR}/${cross_prefix}gdb${cross_suffix}"/> +<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/demo_gpio.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="demo_gpio"/> +<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/demo_gpio"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"/> "/> +<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/> +</launchConfiguration> diff --git a/FreedomStudio/E31FPGA/demo_gpio/link.lds b/FreedomStudio/E31FPGA/demo_gpio/link.lds new file mode 100644 index 0000000..45a82d7 --- /dev/null +++ b/FreedomStudio/E31FPGA/demo_gpio/link.lds @@ -0,0 +1,167 @@ +OUTPUT_ARCH( "riscv" ) + +ENTRY( _start ) + +MEMORY +{ + flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 512M + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K +} + +PHDRS +{ + flash PT_LOAD; + ram_init PT_LOAD; + ram PT_NULL; +} + +SECTIONS +{ + __stack_size = DEFINED(__stack_size) ? __stack_size : 2K; + + .init : + { + KEEP (*(SORT_NONE(.init))) + } >flash AT>flash :flash + + .text : + { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >flash AT>flash :flash + + .fini : + { + KEEP (*(SORT_NONE(.fini))) + } >flash AT>flash :flash + + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + + .rodata : + { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + } >flash AT>flash :flash + + . = ALIGN(4); + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >flash AT>flash :flash + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } >flash AT>flash :flash + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >flash AT>flash :flash + + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >flash AT>flash :flash + + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >flash AT>flash :flash + + .lalign : + { + . = ALIGN(4); + PROVIDE( _data_lma = . ); + } >flash AT>flash :flash + + .dalign : + { + . = ALIGN(4); + PROVIDE( _data = . ); + } >ram AT>flash :ram_init + + .data : + { + *(.data .data.*) + *(.gnu.linkonce.d.*) + } >ram AT>flash :ram_init + + .srodata : + { + PROVIDE( _gp = . + 0x800 ); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >ram AT>flash :ram_init + + .sdata : + { + *(.sdata .sdata.*) + *(.gnu.linkonce.s.*) + } >ram AT>flash :ram_init + + . = ALIGN(4); + PROVIDE( _edata = . ); + PROVIDE( edata = . ); + + PROVIDE( _fbss = . ); + PROVIDE( __bss_start = . ); + .bss : + { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + } >ram AT>ram :ram + + . = ALIGN(8); + PROVIDE( _end = . ); + PROVIDE( end = . ); + + .stack ORIGIN(ram) + LENGTH(ram) - __stack_size : + { + PROVIDE( _heap_end = . ); + . = __stack_size; + PROVIDE( _sp = . ); + } >ram AT>ram :ram +} diff --git a/FreedomStudio/E31FPGA/demo_gpio/openocd.cfg b/FreedomStudio/E31FPGA/demo_gpio/openocd.cfg new file mode 100644 index 0000000..8b382dc --- /dev/null +++ b/FreedomStudio/E31FPGA/demo_gpio/openocd.cfg @@ -0,0 +1,31 @@ +# JTAG adapter setup +adapter_khz 10000 + +interface ftdi +ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ftdi_vid_pid 0x15ba 0x002a + +ftdi_layout_init 0x0808 0x0a1b +ftdi_layout_signal nSRST -oe 0x0200 +#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi_layout_signal LED -data 0x0800 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 + +# Un-comment these two flash lines if you have a SPI flash and want to write +# it. +flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 +init +if {[ info exists pulse_srst]} { + ftdi_set_signal nSRST 0 + ftdi_set_signal nSRST z +} +halt +flash protect 0 64 last off +echo "Ready for Remote Connections" diff --git a/FreedomStudio/E31FPGA/global_interrupts/.cproject b/FreedomStudio/E31FPGA/global_interrupts/.cproject new file mode 100644 index 0000000..2dd3494 --- /dev/null +++ b/FreedomStudio/E31FPGA/global_interrupts/.cproject @@ -0,0 +1,164 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="org.eclipse.cdt.cross.riscv.gnu.linux.elf.debug.83943911"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="org.eclipse.cdt.cross.riscv.gnu.linux.elf.debug.83943911" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + <externalSettings/> + <extensions> + <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/> + <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> 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key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/> +</launchConfiguration> diff --git a/FreedomStudio/E31FPGA/global_interrupts/global_interrupts.c b/FreedomStudio/E31FPGA/global_interrupts/global_interrupts.c new file mode 100644 index 0000000..4d3a554 --- /dev/null +++ b/FreedomStudio/E31FPGA/global_interrupts/global_interrupts.c @@ -0,0 +1,250 @@ +// See LICENSE for license details. + +#include <stdio.h> +#include <stdlib.h> +#include "platform.h" +#include <string.h> +#include "plic/plic_driver.h" +#include "encoding.h" +#include <unistd.h> + +#ifndef _SIFIVE_COREPLEXIP_ARTY_H +#error 'global_interrupts' demo only supported for Coreplex IP Eval Kits +#endif + +// Global Instance data for the PLIC +// for use by the PLIC Driver. +plic_instance_t g_plic; + +// Flag for state +int g_switch1Wins; + +// Debounce counter (PWM can't go slow enough) +int g_debounce; + +void debounce(); + +// Structures for registering different interrupt handlers +// for different parts of the application. +typedef void (*interrupt_function_ptr_t) (void); + +// See bsp/env/<BOARD>/init.c for how this +// interrupt vector is used. +interrupt_function_ptr_t localISR[32]; + +interrupt_function_ptr_t g_ext_interrupt_handlers[PLIC_NUM_INTERRUPTS]; + +void set_timer() { + + volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME); + volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP); + uint64_t now = *mtime; + uint64_t then = now + 10*RTC_FREQ; + *mtimecmp = then; + +} + +/*Entry Point for Machine Timer Interrupt Handler*/ +void mti_isr(){ + + if (g_switch1Wins) { + printf("#### Giving Switch 1 Priority for 10 seconds ####\n"); + // All other things being equal, lower IDs have + // higher priority. We have already set + // Switch 1 to priority 2 + // in the setup, so by giving these equal priority Switch 1 will win. + PLIC_set_priority(&g_plic, INT_EXT_DEVICE_SW_2, 2); + } else { + printf("**** Giving Switch 2 Priority for 10 seconds ****\n"); + // By setting Switch 2 a higher integer priority, it will win over switch 1. + PLIC_set_priority(&g_plic, INT_EXT_DEVICE_SW_2, 3); + } + g_switch1Wins ^= 0x1; + + set_timer(); + +} + +/*Entry Point for PLIC Interrupt Handler*/ +void mei_isr(){ + plic_source int_num = PLIC_claim_interrupt(&g_plic); + if ((int_num >=1 ) && (int_num < PLIC_NUM_INTERRUPTS)) { + g_ext_interrupt_handlers[int_num](); + } + else { + exit(1 + (uintptr_t) int_num); + } + PLIC_complete_interrupt(&g_plic, int_num); +} + +const char * instructions_msg = " \ +\n\ + SIFIVE, INC.\n\ +E31/E51 Coreplex IP Eval Kit 'global_interrupts' demo.\n\ +\n\ +Switches 1 and 2 are enabled as External Global Interrupts \n\ +(they don't go through the PLIC). You an observe priorities.\n\ +Priorities invert every few seconds, which is driven by the \n\ +PWM0 global interrupt. \n\ +\n"; + +void print_instructions() { + + write (STDOUT_FILENO, instructions_msg, strlen(instructions_msg)); + +} + +void invalid_global_isr() { + printf("Unexpected global interrupt!\n"); +} + +void invalid_local_isr() { + printf ("Unexpected local interrupt!\n"); +} + +void switch_1_handler() { + + printf("Switch 1 is on! Even if Switch 2 is on, Switch 1 must have higher priority right now.\n"); + + // Set Green LED + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << GREEN_LED_OFFSET) ; + GPIO_REG(GPIO_OUTPUT_VAL) &= ~((0x1<< RED_LED_OFFSET)); + + debounce(); + +} + +void switch_2_handler() { + printf("Switch 2 is on! Even if Switch 1 is on, Switch 2 must have higher priority right now.\n"); + + // Set RED LED + GPIO_REG(GPIO_OUTPUT_VAL) &= ~(0x1 << GREEN_LED_OFFSET) ; + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1<< RED_LED_OFFSET); + + debounce(); +} + +// We use PWM 0 as a +// timer interrupt for debouncing. + +void pwm_0_handler() { + + + if (g_debounce == 0) { + printf(" Done debouncing.\n"); + + //Lower the threshold s.t. the switches can hit. + PLIC_set_threshold(&g_plic, 1); + + // Clear the PWM interrupt + PWM0_REG(PWM_CFG) = 0; + + } else { + // Keep waiting + g_debounce --; + // This clears out the interrupt and re-arms the timer. + PWM0_REG(PWM_CFG) = ((PWM_CFG_ONESHOT) | (PWM_CFG_ZEROCMP)| 0x7 | (PWM_CFG_STICKY)); + + } + +} + +void debounce(int local_interrupt_num) { + + printf(" Starting a debounce.\n"); + + g_debounce = 600; + + // This clears out the interrupt and re-arms the timer. + PWM0_REG(PWM_CFG) = ((PWM_CFG_ONESHOT) | (PWM_CFG_ZEROCMP)| 0x7 | (PWM_CFG_STICKY)); + + // Set the threshold high enough that the + // switches won't cause the interrupt to fire, + // only the PWM or timer interrupts. + PLIC_set_threshold(&g_plic, 4); + +} + +int main(int argc, char **argv) +{ + + for (int gisr = 0; gisr < PLIC_NUM_INTERRUPTS; gisr++){ + g_ext_interrupt_handlers[PLIC_NUM_INTERRUPTS] = invalid_global_isr; + } + g_ext_interrupt_handlers[PWM0_INT_BASE + 0] = pwm_0_handler; + g_ext_interrupt_handlers[INT_EXT_DEVICE_SW_1] = switch_1_handler; + g_ext_interrupt_handlers[INT_EXT_DEVICE_SW_2] = switch_2_handler; + + for (int lisr = 0; lisr < 32; lisr++){ + localISR[lisr] = invalid_local_isr; + } + + localISR[IRQ_M_TIMER] = mti_isr; + localISR[IRQ_M_EXT] = mei_isr; + + print_instructions(); + + // Set up RGB LEDs for a visual. + + GPIO_REG(GPIO_OUTPUT_EN) |= ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET)); + GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << GREEN_LED_OFFSET) ; + GPIO_REG(GPIO_OUTPUT_VAL) &= ~(0x1<< RED_LED_OFFSET); + + /************************************************************************** + * Set up the PLIC + * + *************************************************************************/ + PLIC_init(&g_plic, + PLIC_CTRL_ADDR, + PLIC_NUM_INTERRUPTS, + PLIC_NUM_PRIORITIES); + + /************************************************************************** + * Give Switch 1 and Switch 2 Equal priority of 2. + * + *************************************************************************/ + + PLIC_enable_interrupt (&g_plic, PWM0_INT_BASE + 0); + PLIC_enable_interrupt (&g_plic, INT_EXT_DEVICE_SW_1); + PLIC_enable_interrupt (&g_plic, INT_EXT_DEVICE_SW_2); + + // PWM always beats the switches, because we use it + // as a debouncer, and we lower the threshold + // to do so. + + PWM0_REG(PWM_CFG) = 0; + + // Make sure people aren't blinded by LEDs connected here. + PWM0_REG(PWM_CMP0) = 0xFE; + PWM0_REG(PWM_CMP1) = 0xFF; + PWM0_REG(PWM_CMP2) = 0xFF; + PWM0_REG(PWM_CMP3) = 0xFF; + PLIC_set_priority(&g_plic, PWM0_INT_BASE + 0 , 5); + + // Start the switches out at the same priority. Switch1 + // would win. + PLIC_set_priority(&g_plic, INT_EXT_DEVICE_SW_1, 2); + PLIC_set_priority(&g_plic, INT_EXT_DEVICE_SW_2, 2); + + // Set up machine timer interrupt. Every few seconds it + // will invert the switch priorities. + set_timer(); + + // Enable timer interrupts. + set_csr(mie, MIP_MTIP); + + // Enable Global (PLIC) interrupts. + set_csr(mie, MIP_MEIP); + + g_switch1Wins = 1; + + // Enable all interrupts + set_csr(mstatus, MSTATUS_MIE); + + while(1){ + asm volatile ("wfi"); + } + + return 0; + +} diff --git a/FreedomStudio/E31FPGA/global_interrupts/link.lds b/FreedomStudio/E31FPGA/global_interrupts/link.lds new file mode 100644 index 0000000..45a82d7 --- /dev/null +++ b/FreedomStudio/E31FPGA/global_interrupts/link.lds @@ -0,0 +1,167 @@ +OUTPUT_ARCH( "riscv" ) + +ENTRY( _start ) + +MEMORY +{ + flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 512M + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K +} + +PHDRS +{ + flash PT_LOAD; + ram_init PT_LOAD; + ram PT_NULL; +} + +SECTIONS +{ + __stack_size = DEFINED(__stack_size) ? __stack_size : 2K; + + .init : + { + KEEP (*(SORT_NONE(.init))) + } >flash AT>flash :flash + + .text : + { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >flash AT>flash :flash + + .fini : + { + KEEP (*(SORT_NONE(.fini))) + } >flash AT>flash :flash + + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + + .rodata : + { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + } >flash AT>flash :flash + + . = ALIGN(4); + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >flash AT>flash :flash + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } >flash AT>flash :flash + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >flash AT>flash :flash + + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >flash AT>flash :flash + + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >flash AT>flash :flash + + .lalign : + { + . = ALIGN(4); + PROVIDE( _data_lma = . ); + } >flash AT>flash :flash + + .dalign : + { + . = ALIGN(4); + PROVIDE( _data = . ); + } >ram AT>flash :ram_init + + .data : + { + *(.data .data.*) + *(.gnu.linkonce.d.*) + } >ram AT>flash :ram_init + + .srodata : + { + PROVIDE( _gp = . + 0x800 ); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >ram AT>flash :ram_init + + .sdata : + { + *(.sdata .sdata.*) + *(.gnu.linkonce.s.*) + } >ram AT>flash :ram_init + + . = ALIGN(4); + PROVIDE( _edata = . ); + PROVIDE( edata = . ); + + PROVIDE( _fbss = . ); + PROVIDE( __bss_start = . ); + .bss : + { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + } >ram AT>ram :ram + + . = ALIGN(8); + PROVIDE( _end = . ); + PROVIDE( end = . ); + + .stack ORIGIN(ram) + LENGTH(ram) - __stack_size : + { + PROVIDE( _heap_end = . ); + . = __stack_size; + PROVIDE( _sp = . ); + } >ram AT>ram :ram +} diff --git a/FreedomStudio/E31FPGA/global_interrupts/openocd.cfg b/FreedomStudio/E31FPGA/global_interrupts/openocd.cfg new file mode 100644 index 0000000..8b382dc --- /dev/null +++ b/FreedomStudio/E31FPGA/global_interrupts/openocd.cfg @@ -0,0 +1,31 @@ +# JTAG adapter setup +adapter_khz 10000 + +interface ftdi +ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ftdi_vid_pid 0x15ba 0x002a + +ftdi_layout_init 0x0808 0x0a1b +ftdi_layout_signal nSRST -oe 0x0200 +#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi_layout_signal LED -data 0x0800 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 + +# Un-comment these two flash lines if you have a SPI flash and want to write +# it. +flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 +init +if {[ info exists pulse_srst]} { + ftdi_set_signal nSRST 0 + ftdi_set_signal nSRST z +} +halt +flash protect 0 64 last off +echo "Ready for Remote Connections" diff --git a/FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject b/FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject new file mode 100644 index 0000000..5c8b71e --- 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