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-rw-r--r--FreedomStudio/E31FPGA/coreplexip_welcome/.cproject1
-rw-r--r--FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome JLINK.launch80
-rw-r--r--FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch (renamed from FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome Debug.launch)6
-rw-r--r--FreedomStudio/E31FPGA/coreplexip_welcome/e31arty-xsvd.json1250
-rw-r--r--FreedomStudio/E31FPGA/global_interrupts/.cproject28
-rw-r--r--FreedomStudio/E31FPGA/global_interrupts/e31arty-xsvd.json1250
-rw-r--r--FreedomStudio/E31FPGA/global_interrupts/global_interrupts JLINK.launch80
-rw-r--r--FreedomStudio/E31FPGA/global_interrupts/global_interrupts OpenOCD.launch (renamed from FreedomStudio/E31FPGA/global_interrupts/global_interrupts Debug.launch)121
-rw-r--r--FreedomStudio/E31FPGA/local_interrupts/.cproject3
-rw-r--r--FreedomStudio/E31FPGA/local_interrupts/e31arty-xsvd.json1250
-rw-r--r--FreedomStudio/E31FPGA/local_interrupts/local_interrupts JLINK.launch80
-rw-r--r--FreedomStudio/E31FPGA/local_interrupts/local_interrupts OpenOCD.launch (renamed from FreedomStudio/E31FPGA/local_interrupts/local_interrupts Debug.launch)5
-rw-r--r--FreedomStudio/E31FPGA/performance_counters/.cproject3
-rw-r--r--FreedomStudio/E31FPGA/performance_counters/e31arty-xsvd.json1250
-rw-r--r--FreedomStudio/E31FPGA/performance_counters/performance_counters JLINK.launch80
-rw-r--r--FreedomStudio/E31FPGA/performance_counters/performance_counters OpenOCD.launch (renamed from FreedomStudio/E31FPGA/performance_counters/performance_counters Debug.launch)1
-rw-r--r--FreedomStudio/E31FPGA/vectored_interrupts/.cproject3
-rw-r--r--FreedomStudio/E31FPGA/vectored_interrupts/e31arty-xsvd.json1250
-rw-r--r--FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts JLINK.launch80
-rw-r--r--FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts OpenOCD.launch (renamed from FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts Debug.launch)1
-rw-r--r--FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject28
-rw-r--r--FreedomStudio/E31FPGA/wrap-E31FPGA/.project93
22 files changed, 6765 insertions, 178 deletions
diff --git a/FreedomStudio/E31FPGA/coreplexip_welcome/.cproject b/FreedomStudio/E31FPGA/coreplexip_welcome/.cproject
index 53908ce..80413f4 100644
--- a/FreedomStudio/E31FPGA/coreplexip_welcome/.cproject
+++ b/FreedomStudio/E31FPGA/coreplexip_welcome/.cproject
@@ -93,6 +93,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1308651449" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/coreplexip-e31-arty/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.221590263" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1622617219" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
diff --git a/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome JLINK.launch b/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome JLINK.launch
new file mode 100644
index 0000000..dad28c2
--- /dev/null
+++ b/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome JLINK.launch
@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="FE310"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/coreplexip_welcome.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="coreplexip_welcome"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/coreplexip_welcome"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome Debug.launch b/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch
index 0bad4ba..b416a5c 100644
--- a/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome Debug.launch
+++ b/FreedomStudio/E31FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch
@@ -1,11 +1,13 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
@@ -16,10 +18,12 @@
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-coreplexip-e31-arty.cfg"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
@@ -47,7 +51,7 @@
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/coreplexip_welcome.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="coreplexip_welcome"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/coreplexip_welcome"/>
</listAttribute>
diff --git a/FreedomStudio/E31FPGA/coreplexip_welcome/e31arty-xsvd.json b/FreedomStudio/E31FPGA/coreplexip_welcome/e31arty-xsvd.json
new file mode 100644
index 0000000..4879d45
--- /dev/null
+++ b/FreedomStudio/E31FPGA/coreplexip_welcome/e31arty-xsvd.json
@@ -0,0 +1,1250 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "e31arty": {
+ "displayName": "Core Complex E31 Arty",
+ "description": "SiFive’s E31 is a synthesised version of Core Complex E31 running on the Arty board.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_ARTY_E31_",
+ "headerTypePrefix": "sifive_e31arty_",
+ "headerInterruptPrefix": "sifive_e31arty_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "26",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ },
+ "0": {
+ "description": "Local Interrupt 0",
+ "value": "16"
+ },
+ "1": {
+ "description": "Local Interrupt 1",
+ "value": "17"
+ },
+ "2": {
+ "description": "Local Interrupt 2",
+ "value": "18"
+ },
+ "3": {
+ "description": "Local Interrupt 3",
+ "value": "19"
+ },
+ "4": {
+ "description": "Local Interrupt 4",
+ "value": "20"
+ },
+ "5": {
+ "description": "Local Interrupt 5",
+ "value": "21"
+ },
+ "6": {
+ "description": "Local Interrupt 6",
+ "value": "22"
+ },
+ "7": {
+ "description": "Local Interrupt 7",
+ "value": "23"
+ },
+ "8": {
+ "description": "Local Interrupt 8",
+ "value": "24"
+ },
+ "9": {
+ "description": "Local Interrupt 9",
+ "value": "25"
+ },
+ "10": {
+ "description": "Local Interrupt 10",
+ "value": "26"
+ },
+ "11": {
+ "description": "Local Interrupt 11",
+ "value": "27"
+ },
+ "12": {
+ "description": "Local Interrupt 12",
+ "value": "28"
+ },
+ "13": {
+ "description": "Local Interrupt 13",
+ "value": "29"
+ },
+ "14": {
+ "description": "Local Interrupt 14",
+ "value": "30"
+ },
+ "15": {
+ "description": "Local Interrupt 15",
+ "value": "31"
+ }
+ },
+ "numLocalInterrupts": "16"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "27",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "8",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "8",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "switch0": {
+ "description": "SWITCH 0 Interrupt",
+ "value": "2"
+ },
+ "switch1": {
+ "description": "SWITCH 1 Interrupt",
+ "value": "3"
+ },
+ "switch2": {
+ "description": "SWITCH 2 Interrupt",
+ "value": "4"
+ },
+ "switch3": {
+ "description": "SWITCH 3 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x20002000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "7"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "8"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "9"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "10"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "11"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "12"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "13"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "14"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "15"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "16"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "17"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "18"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "19"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "20"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "21"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "22"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x20000000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x20004000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x20005000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "23"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "24"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "25"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "26"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/E31FPGA/global_interrupts/.cproject b/FreedomStudio/E31FPGA/global_interrupts/.cproject
index 4c984ec..971ceb4 100644
--- a/FreedomStudio/E31FPGA/global_interrupts/.cproject
+++ b/FreedomStudio/E31FPGA/global_interrupts/.cproject
@@ -14,9 +14,9 @@
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug">
+ <configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" errorParsers="org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.CWDLocator;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug" postannouncebuildStep="" postbuildStep="" preannouncebuildStep="" prebuildStep="">
<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722." name="/" resourcePath="">
- <toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.debug.1407212463" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.debug">
+ <toolChain errorParsers="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.debug.1407212463" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.debug">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1442629066" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting.1304654652" name="Create extended listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting" useByScannerDiscovery="false"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.952377303" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" useByScannerDiscovery="false" value="true" valueType="boolean"/>
@@ -43,9 +43,10 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed.1722118225" name="Compressed extension (RVC)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer.281117582" name="Integer ABI" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.abi.integer.ilp32" valueType="enumerated"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel.427474672" name="Code model" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel.any" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.nobuiltin.120978954" name="Disable builtin (-fno-builtin)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.nobuiltin" useByScannerDiscovery="true" value="true" valueType="boolean"/>
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.2059749159" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
- <builder buildPath="${workspace_loc:/coreplexip_welcome}/Debug" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.964786236" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1772574500" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
+ <builder buildPath="${workspace_loc:/coreplexip_welcome}/Debug" errorParsers="org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.CWDLocator" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.964786236" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+ <tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} -c ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1772574500" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.1451354185" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths.2050116277" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
<listOptionValue builtIn="false" value="../../../../bsp/include"/>
@@ -60,7 +61,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.other.1801720442" name="Other assembler flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.other" useByScannerDiscovery="false" value="-c" valueType="string"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.31099272" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
</tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.424460842" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
+ <tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} -c ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.424460842" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.1682056018" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
<listOptionValue builtIn="false" value="USE_LOCAL_ISR"/>
</option>
@@ -74,25 +75,29 @@
<listOptionValue builtIn="false" value="../../../../bsp/env/coreplexip-e31-arty"/>
<listOptionValue builtIn="false" value="../../../../bsp/drivers"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other.2042911660" name="Other compiler flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other" useByScannerDiscovery="true" value="-include sys/cdefs.h -fno-builtin-printf -c" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other.2042911660" name="Other compiler flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other" useByScannerDiscovery="true" value="-include sys/cdefs.h -c" valueType="string"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1695943366" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.1929533144" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.289860176" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+ <tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.289860176" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.829017513" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" useByScannerDiscovery="false" value="false" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.411410557" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.1839746398" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
- <listOptionValue builtIn="false" value="c"/>
<listOptionValue builtIn="false" value="wrap-E31FPGA"/>
+ <listOptionValue builtIn="false" value="c"/>
</option>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.1780520059" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
<listOptionValue builtIn="false" value="../../wrap-E31FPGA/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1308651449" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/coreplexip-e31-arty/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.1466466974" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnosys.1236398625" name="Do not use syscalls (--specs=nosys.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnosys" useByScannerDiscovery="false" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.useprintffloat.1401165837" name="Use float with nano printf (-u _printf_float)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.useprintffloat" useByScannerDiscovery="false" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usescanffloat.1354938439" name="Use float with nano scanf (-u _scanf_float)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usescanffloat" useByScannerDiscovery="false" value="false" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1622617219" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@@ -102,7 +107,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.1728896073" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1440702077" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.72955671" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+ <tool command="${cross_prefix}${cross_objcopy}${cross_suffix}" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT}" errorParsers="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.72955671" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.896585596" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1085159845" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.1809323208" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
@@ -110,7 +115,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.197772274" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.2070658666" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
</tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1974544044" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+ <tool command="${cross_prefix}${cross_size}${cross_suffix}" commandLinePattern="${COMMAND} ${FLAGS}" errorParsers="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1974544044" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1826132396" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false"/>
</tool>
</toolChain>
@@ -118,6 +123,7 @@
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ <storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs"/>
</cconfiguration>
<cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491" moduleId="org.eclipse.cdt.core.settings" name="Release">
diff --git a/FreedomStudio/E31FPGA/global_interrupts/e31arty-xsvd.json b/FreedomStudio/E31FPGA/global_interrupts/e31arty-xsvd.json
new file mode 100644
index 0000000..4879d45
--- /dev/null
+++ b/FreedomStudio/E31FPGA/global_interrupts/e31arty-xsvd.json
@@ -0,0 +1,1250 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "e31arty": {
+ "displayName": "Core Complex E31 Arty",
+ "description": "SiFive’s E31 is a synthesised version of Core Complex E31 running on the Arty board.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_ARTY_E31_",
+ "headerTypePrefix": "sifive_e31arty_",
+ "headerInterruptPrefix": "sifive_e31arty_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "26",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ },
+ "0": {
+ "description": "Local Interrupt 0",
+ "value": "16"
+ },
+ "1": {
+ "description": "Local Interrupt 1",
+ "value": "17"
+ },
+ "2": {
+ "description": "Local Interrupt 2",
+ "value": "18"
+ },
+ "3": {
+ "description": "Local Interrupt 3",
+ "value": "19"
+ },
+ "4": {
+ "description": "Local Interrupt 4",
+ "value": "20"
+ },
+ "5": {
+ "description": "Local Interrupt 5",
+ "value": "21"
+ },
+ "6": {
+ "description": "Local Interrupt 6",
+ "value": "22"
+ },
+ "7": {
+ "description": "Local Interrupt 7",
+ "value": "23"
+ },
+ "8": {
+ "description": "Local Interrupt 8",
+ "value": "24"
+ },
+ "9": {
+ "description": "Local Interrupt 9",
+ "value": "25"
+ },
+ "10": {
+ "description": "Local Interrupt 10",
+ "value": "26"
+ },
+ "11": {
+ "description": "Local Interrupt 11",
+ "value": "27"
+ },
+ "12": {
+ "description": "Local Interrupt 12",
+ "value": "28"
+ },
+ "13": {
+ "description": "Local Interrupt 13",
+ "value": "29"
+ },
+ "14": {
+ "description": "Local Interrupt 14",
+ "value": "30"
+ },
+ "15": {
+ "description": "Local Interrupt 15",
+ "value": "31"
+ }
+ },
+ "numLocalInterrupts": "16"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "27",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "8",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "8",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "switch0": {
+ "description": "SWITCH 0 Interrupt",
+ "value": "2"
+ },
+ "switch1": {
+ "description": "SWITCH 1 Interrupt",
+ "value": "3"
+ },
+ "switch2": {
+ "description": "SWITCH 2 Interrupt",
+ "value": "4"
+ },
+ "switch3": {
+ "description": "SWITCH 3 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x20002000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "7"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "8"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "9"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "10"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "11"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "12"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "13"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "14"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "15"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "16"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "17"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "18"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "19"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "20"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "21"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "22"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x20000000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x20004000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x20005000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "23"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "24"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "25"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "26"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/E31FPGA/global_interrupts/global_interrupts JLINK.launch b/FreedomStudio/E31FPGA/global_interrupts/global_interrupts JLINK.launch
new file mode 100644
index 0000000..fbeda90
--- /dev/null
+++ b/FreedomStudio/E31FPGA/global_interrupts/global_interrupts JLINK.launch
@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="FE310"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/global_interrupts.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="global_interrupts"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/global_interrupts"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/E31FPGA/global_interrupts/global_interrupts Debug.launch b/FreedomStudio/E31FPGA/global_interrupts/global_interrupts OpenOCD.launch
index e197508..4d8b73a 100644
--- a/FreedomStudio/E31FPGA/global_interrupts/global_interrupts Debug.launch
+++ b/FreedomStudio/E31FPGA/global_interrupts/global_interrupts OpenOCD.launch
@@ -1,59 +1,62 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32&#10;set remotetimeout 250"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
-<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-coreplexip-e31-arty.cfg"/>
-<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
-<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
-<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
-<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
-<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
-<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/global_interrupts.elf"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="global_interrupts"/>
-<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
-<listEntry value="/global_interrupts"/>
-</listAttribute>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
-<listEntry value="4"/>
-</listAttribute>
-<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
-<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
-</launchConfiguration>
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set arch riscv:rv32&#13;&#10;set remotetimeout 250"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-coreplexip-e31-arty.cfg"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/global_interrupts.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="global_interrupts"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/global_interrupts"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/E31FPGA/local_interrupts/.cproject b/FreedomStudio/E31FPGA/local_interrupts/.cproject
index 4c984ec..b5014ab 100644
--- a/FreedomStudio/E31FPGA/local_interrupts/.cproject
+++ b/FreedomStudio/E31FPGA/local_interrupts/.cproject
@@ -89,10 +89,11 @@
<listOptionValue builtIn="false" value="../../wrap-E31FPGA/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1308651449" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/coreplexip-e31-arty/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.314642136" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1622617219" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
diff --git a/FreedomStudio/E31FPGA/local_interrupts/e31arty-xsvd.json b/FreedomStudio/E31FPGA/local_interrupts/e31arty-xsvd.json
new file mode 100644
index 0000000..4879d45
--- /dev/null
+++ b/FreedomStudio/E31FPGA/local_interrupts/e31arty-xsvd.json
@@ -0,0 +1,1250 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "e31arty": {
+ "displayName": "Core Complex E31 Arty",
+ "description": "SiFive’s E31 is a synthesised version of Core Complex E31 running on the Arty board.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_ARTY_E31_",
+ "headerTypePrefix": "sifive_e31arty_",
+ "headerInterruptPrefix": "sifive_e31arty_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "26",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ },
+ "0": {
+ "description": "Local Interrupt 0",
+ "value": "16"
+ },
+ "1": {
+ "description": "Local Interrupt 1",
+ "value": "17"
+ },
+ "2": {
+ "description": "Local Interrupt 2",
+ "value": "18"
+ },
+ "3": {
+ "description": "Local Interrupt 3",
+ "value": "19"
+ },
+ "4": {
+ "description": "Local Interrupt 4",
+ "value": "20"
+ },
+ "5": {
+ "description": "Local Interrupt 5",
+ "value": "21"
+ },
+ "6": {
+ "description": "Local Interrupt 6",
+ "value": "22"
+ },
+ "7": {
+ "description": "Local Interrupt 7",
+ "value": "23"
+ },
+ "8": {
+ "description": "Local Interrupt 8",
+ "value": "24"
+ },
+ "9": {
+ "description": "Local Interrupt 9",
+ "value": "25"
+ },
+ "10": {
+ "description": "Local Interrupt 10",
+ "value": "26"
+ },
+ "11": {
+ "description": "Local Interrupt 11",
+ "value": "27"
+ },
+ "12": {
+ "description": "Local Interrupt 12",
+ "value": "28"
+ },
+ "13": {
+ "description": "Local Interrupt 13",
+ "value": "29"
+ },
+ "14": {
+ "description": "Local Interrupt 14",
+ "value": "30"
+ },
+ "15": {
+ "description": "Local Interrupt 15",
+ "value": "31"
+ }
+ },
+ "numLocalInterrupts": "16"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "27",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "8",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "8",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "switch0": {
+ "description": "SWITCH 0 Interrupt",
+ "value": "2"
+ },
+ "switch1": {
+ "description": "SWITCH 1 Interrupt",
+ "value": "3"
+ },
+ "switch2": {
+ "description": "SWITCH 2 Interrupt",
+ "value": "4"
+ },
+ "switch3": {
+ "description": "SWITCH 3 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x20002000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "7"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "8"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "9"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "10"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "11"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "12"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "13"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "14"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "15"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "16"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "17"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "18"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "19"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "20"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "21"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "22"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x20000000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x20004000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x20005000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "23"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "24"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "25"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "26"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/E31FPGA/local_interrupts/local_interrupts JLINK.launch b/FreedomStudio/E31FPGA/local_interrupts/local_interrupts JLINK.launch
new file mode 100644
index 0000000..7ea0908
--- /dev/null
+++ b/FreedomStudio/E31FPGA/local_interrupts/local_interrupts JLINK.launch
@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="FE310"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/local_interrupts.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="local_interrupts"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/local_interrupts"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/E31FPGA/local_interrupts/local_interrupts Debug.launch b/FreedomStudio/E31FPGA/local_interrupts/local_interrupts OpenOCD.launch
index 192ffc6..35d484b 100644
--- a/FreedomStudio/E31FPGA/local_interrupts/local_interrupts Debug.launch
+++ b/FreedomStudio/E31FPGA/local_interrupts/local_interrupts OpenOCD.launch
@@ -6,6 +6,7 @@
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
@@ -16,10 +17,12 @@
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-coreplexip-e31-arty.cfg"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
@@ -47,7 +50,7 @@
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/local_interrupts.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="local_interrupts"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/local_interrupts"/>
</listAttribute>
diff --git a/FreedomStudio/E31FPGA/performance_counters/.cproject b/FreedomStudio/E31FPGA/performance_counters/.cproject
index 12de282..96dd4be 100644
--- a/FreedomStudio/E31FPGA/performance_counters/.cproject
+++ b/FreedomStudio/E31FPGA/performance_counters/.cproject
@@ -87,10 +87,11 @@
<listOptionValue builtIn="false" value="../../wrap-E31FPGA/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1308651449" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/coreplexip-e31-arty/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.205997618" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1622617219" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
diff --git a/FreedomStudio/E31FPGA/performance_counters/e31arty-xsvd.json b/FreedomStudio/E31FPGA/performance_counters/e31arty-xsvd.json
new file mode 100644
index 0000000..4879d45
--- /dev/null
+++ b/FreedomStudio/E31FPGA/performance_counters/e31arty-xsvd.json
@@ -0,0 +1,1250 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "e31arty": {
+ "displayName": "Core Complex E31 Arty",
+ "description": "SiFive’s E31 is a synthesised version of Core Complex E31 running on the Arty board.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_ARTY_E31_",
+ "headerTypePrefix": "sifive_e31arty_",
+ "headerInterruptPrefix": "sifive_e31arty_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "26",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ },
+ "0": {
+ "description": "Local Interrupt 0",
+ "value": "16"
+ },
+ "1": {
+ "description": "Local Interrupt 1",
+ "value": "17"
+ },
+ "2": {
+ "description": "Local Interrupt 2",
+ "value": "18"
+ },
+ "3": {
+ "description": "Local Interrupt 3",
+ "value": "19"
+ },
+ "4": {
+ "description": "Local Interrupt 4",
+ "value": "20"
+ },
+ "5": {
+ "description": "Local Interrupt 5",
+ "value": "21"
+ },
+ "6": {
+ "description": "Local Interrupt 6",
+ "value": "22"
+ },
+ "7": {
+ "description": "Local Interrupt 7",
+ "value": "23"
+ },
+ "8": {
+ "description": "Local Interrupt 8",
+ "value": "24"
+ },
+ "9": {
+ "description": "Local Interrupt 9",
+ "value": "25"
+ },
+ "10": {
+ "description": "Local Interrupt 10",
+ "value": "26"
+ },
+ "11": {
+ "description": "Local Interrupt 11",
+ "value": "27"
+ },
+ "12": {
+ "description": "Local Interrupt 12",
+ "value": "28"
+ },
+ "13": {
+ "description": "Local Interrupt 13",
+ "value": "29"
+ },
+ "14": {
+ "description": "Local Interrupt 14",
+ "value": "30"
+ },
+ "15": {
+ "description": "Local Interrupt 15",
+ "value": "31"
+ }
+ },
+ "numLocalInterrupts": "16"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "27",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "8",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "8",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "switch0": {
+ "description": "SWITCH 0 Interrupt",
+ "value": "2"
+ },
+ "switch1": {
+ "description": "SWITCH 1 Interrupt",
+ "value": "3"
+ },
+ "switch2": {
+ "description": "SWITCH 2 Interrupt",
+ "value": "4"
+ },
+ "switch3": {
+ "description": "SWITCH 3 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x20002000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "7"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "8"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "9"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "10"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "11"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "12"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "13"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "14"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "15"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "16"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "17"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "18"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "19"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "20"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "21"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "22"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x20000000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x20004000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x20005000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "23"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "24"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "25"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "26"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/E31FPGA/performance_counters/performance_counters JLINK.launch b/FreedomStudio/E31FPGA/performance_counters/performance_counters JLINK.launch
new file mode 100644
index 0000000..d3f38d9
--- /dev/null
+++ b/FreedomStudio/E31FPGA/performance_counters/performance_counters JLINK.launch
@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="FE310"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/performance_counters.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="performance_counters"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/performance_counters"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/E31FPGA/performance_counters/performance_counters Debug.launch b/FreedomStudio/E31FPGA/performance_counters/performance_counters OpenOCD.launch
index b747520..8b9c5cb 100644
--- a/FreedomStudio/E31FPGA/performance_counters/performance_counters Debug.launch
+++ b/FreedomStudio/E31FPGA/performance_counters/performance_counters OpenOCD.launch
@@ -20,6 +20,7 @@
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/.cproject b/FreedomStudio/E31FPGA/vectored_interrupts/.cproject
index 8d8ac7e..92d312b 100644
--- a/FreedomStudio/E31FPGA/vectored_interrupts/.cproject
+++ b/FreedomStudio/E31FPGA/vectored_interrupts/.cproject
@@ -89,10 +89,11 @@
<listOptionValue builtIn="false" value="../../wrap-E31FPGA/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1308651449" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/coreplexip-e31-arty/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.440195887" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1622617219" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/e31arty-xsvd.json b/FreedomStudio/E31FPGA/vectored_interrupts/e31arty-xsvd.json
new file mode 100644
index 0000000..4879d45
--- /dev/null
+++ b/FreedomStudio/E31FPGA/vectored_interrupts/e31arty-xsvd.json
@@ -0,0 +1,1250 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "e31arty": {
+ "displayName": "Core Complex E31 Arty",
+ "description": "SiFive’s E31 is a synthesised version of Core Complex E31 running on the Arty board.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_ARTY_E31_",
+ "headerTypePrefix": "sifive_e31arty_",
+ "headerInterruptPrefix": "sifive_e31arty_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "26",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ },
+ "0": {
+ "description": "Local Interrupt 0",
+ "value": "16"
+ },
+ "1": {
+ "description": "Local Interrupt 1",
+ "value": "17"
+ },
+ "2": {
+ "description": "Local Interrupt 2",
+ "value": "18"
+ },
+ "3": {
+ "description": "Local Interrupt 3",
+ "value": "19"
+ },
+ "4": {
+ "description": "Local Interrupt 4",
+ "value": "20"
+ },
+ "5": {
+ "description": "Local Interrupt 5",
+ "value": "21"
+ },
+ "6": {
+ "description": "Local Interrupt 6",
+ "value": "22"
+ },
+ "7": {
+ "description": "Local Interrupt 7",
+ "value": "23"
+ },
+ "8": {
+ "description": "Local Interrupt 8",
+ "value": "24"
+ },
+ "9": {
+ "description": "Local Interrupt 9",
+ "value": "25"
+ },
+ "10": {
+ "description": "Local Interrupt 10",
+ "value": "26"
+ },
+ "11": {
+ "description": "Local Interrupt 11",
+ "value": "27"
+ },
+ "12": {
+ "description": "Local Interrupt 12",
+ "value": "28"
+ },
+ "13": {
+ "description": "Local Interrupt 13",
+ "value": "29"
+ },
+ "14": {
+ "description": "Local Interrupt 14",
+ "value": "30"
+ },
+ "15": {
+ "description": "Local Interrupt 15",
+ "value": "31"
+ }
+ },
+ "numLocalInterrupts": "16"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "27",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "8",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "8",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "switch0": {
+ "description": "SWITCH 0 Interrupt",
+ "value": "2"
+ },
+ "switch1": {
+ "description": "SWITCH 1 Interrupt",
+ "value": "3"
+ },
+ "switch2": {
+ "description": "SWITCH 2 Interrupt",
+ "value": "4"
+ },
+ "switch3": {
+ "description": "SWITCH 3 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x20002000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "7"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "8"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "9"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "10"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "11"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "12"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "13"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "14"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "15"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "16"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "17"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "18"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "19"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "20"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "21"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "22"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x20000000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x20004000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x20005000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "23"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "24"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "25"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "26"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts JLINK.launch b/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts JLINK.launch
new file mode 100644
index 0000000..0723d26
--- /dev/null
+++ b/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts JLINK.launch
@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="FE310"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="4000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/vectored_interrupts.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="vectored_interrupts"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/vectored_interrupts"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts Debug.launch b/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts OpenOCD.launch
index 73f5aaa..df86386 100644
--- a/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts Debug.launch
+++ b/FreedomStudio/E31FPGA/vectored_interrupts/vectored_interrupts OpenOCD.launch
@@ -20,6 +20,7 @@
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/e31arty-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
diff --git a/FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject b/FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject
index baabe6e..22397de 100644
--- a/FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject
+++ b/FreedomStudio/E31FPGA/wrap-E31FPGA/.cproject
@@ -5,9 +5,9 @@
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1605886310" moduleId="org.eclipse.cdt.core.settings" name="Debug">
<externalSettings>
<externalSetting>
- <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/wrap-E51FPGA"/>
- <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/wrap-E51FPGA/Debug"/>
- <entry flags="RESOLVED" kind="libraryFile" name="wrap-E51FPGA" srcPrefixMapping="" srcRootPath=""/>
+ <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/wrap-E31FPGA"/>
+ <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/wrap-E31FPGA/Debug"/>
+ <entry flags="RESOLVED" kind="libraryFile" name="wrap-E31FPGA" srcPrefixMapping="" srcRootPath=""/>
</externalSetting>
</externalSettings>
<extensions>
@@ -23,7 +23,7 @@
<configuration artifactExtension="a" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.staticLib" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.staticLib,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1605886310" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug">
<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1605886310." name="/" resourcePath="">
<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.lib.debug.2048025188" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.lib.debug">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.819596380" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.none" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.819596380" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.more" valueType="enumerated"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.530791296" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" useByScannerDiscovery="true" value="false" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.1286796403" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" useByScannerDiscovery="true" value="false" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.896631514" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
@@ -49,7 +49,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer.1947169168" name="Integer ABI" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.abi.integer.ilp32" valueType="enumerated"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel.1938916358" name="Code model" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel.any" valueType="enumerated"/>
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.699758630" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
- <builder buildPath="${workspace_loc:/wrap-E51FPGA}/Debug" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1315668301" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+ <builder buildPath="${workspace_loc:/wrap-E31FPGA}/Debug" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1315668301" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.591864289" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.1857953841" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.624389828" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
@@ -58,8 +58,8 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1859797200" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
<listOptionValue builtIn="false" value="../bsp/include"/>
<listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/coreplexip-e51-arty"/>
- <listOptionValue builtIn="false" value="../../../../bsp/env/coreplexip-e51-arty"/>
+ <listOptionValue builtIn="false" value="../bsp/env/coreplexip-e31-arty"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/env/coreplexip-e31-arty"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/include"/>
</option>
@@ -96,9 +96,9 @@
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1481618207" moduleId="org.eclipse.cdt.core.settings" name="Release">
<externalSettings>
<externalSetting>
- <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/wrap-E51FPGA"/>
- <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/wrap-E51FPGA/Release"/>
- <entry flags="RESOLVED" kind="libraryFile" name="wrap-E51FPGA" srcPrefixMapping="" srcRootPath=""/>
+ <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/wrap-E31FPGA"/>
+ <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/wrap-E31FPGA/Release"/>
+ <entry flags="RESOLVED" kind="libraryFile" name="wrap-E31FPGA" srcPrefixMapping="" srcRootPath=""/>
</externalSetting>
</externalSettings>
<extensions>
@@ -134,7 +134,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1427569836" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.526661695" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" value="true" valueType="boolean"/>
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1319613729" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
- <builder buildPath="${workspace_loc:/wrap-E51FPGA}/Release" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1658545344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+ <builder buildPath="${workspace_loc:/wrap-E31FPGA}/Release" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1658545344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.27516243" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.678880548" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.2056399714" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
@@ -169,7 +169,7 @@
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <project id="wrap-E51FPGA.ilg.gnumcueclipse.managedbuild.cross.riscv.target.lib.109943252" name="Static Library" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.lib"/>
+ <project id="wrap-E31FPGA.ilg.gnumcueclipse.managedbuild.cross.riscv.target.lib.109943252" name="Static Library" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.lib"/>
</storageModule>
<storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
@@ -183,10 +183,10 @@
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="refreshScope" versionNumber="2">
<configuration configurationName="Debug">
- <resource resourceType="PROJECT" workspacePath="/wrap-E51FPGA"/>
+ <resource resourceType="PROJECT" workspacePath="/wrap-E31FPGA"/>
</configuration>
<configuration configurationName="Release">
- <resource resourceType="PROJECT" workspacePath="/wrap-E51FPGA"/>
+ <resource resourceType="PROJECT" workspacePath="/wrap-E31FPGA"/>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
diff --git a/FreedomStudio/E31FPGA/wrap-E31FPGA/.project b/FreedomStudio/E31FPGA/wrap-E31FPGA/.project
index 8fd5136..ca18fb9 100644
--- a/FreedomStudio/E31FPGA/wrap-E31FPGA/.project
+++ b/FreedomStudio/E31FPGA/wrap-E31FPGA/.project
@@ -65,124 +65,69 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
</link>
<link>
- <name>sys/_exit.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.o</locationURI>
- </link>
- <link>
<name>sys/close.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
</link>
<link>
- <name>sys/close.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.o</locationURI>
- </link>
- <link>
<name>sys/execve.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
</link>
<link>
- <name>sys/execve.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.o</locationURI>
- </link>
- <link>
<name>sys/fork.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
</link>
<link>
- <name>sys/fork.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.o</locationURI>
- </link>
- <link>
<name>sys/fstat.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
</link>
<link>
- <name>sys/fstat.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.o</locationURI>
- </link>
- <link>
<name>sys/getpid.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
</link>
<link>
- <name>sys/getpid.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.o</locationURI>
- </link>
- <link>
<name>sys/isatty.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
</link>
<link>
- <name>sys/isatty.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.o</locationURI>
- </link>
- <link>
<name>sys/kill.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
</link>
<link>
- <name>sys/kill.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.o</locationURI>
- </link>
- <link>
<name>sys/link.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
</link>
<link>
- <name>sys/link.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.o</locationURI>
- </link>
- <link>
<name>sys/lseek.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
</link>
<link>
- <name>sys/lseek.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.o</locationURI>
- </link>
- <link>
<name>sys/open.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
</link>
<link>
- <name>sys/open.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.o</locationURI>
- </link>
- <link>
<name>sys/openat.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
</link>
<link>
- <name>sys/read.c</name>
+ <name>sys/puts.c</name>
<type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
</link>
<link>
- <name>sys/read.o</name>
+ <name>sys/read.c</name>
<type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.o</locationURI>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
</link>
<link>
<name>sys/sbrk.c</name>
@@ -190,21 +135,11 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
</link>
<link>
- <name>sys/sbrk.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.o</locationURI>
- </link>
- <link>
<name>sys/stat.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
</link>
<link>
- <name>sys/stat.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.o</locationURI>
- </link>
- <link>
<name>sys/stub.h</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
@@ -215,39 +150,19 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
</link>
<link>
- <name>sys/times.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.o</locationURI>
- </link>
- <link>
<name>sys/unlink.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
</link>
<link>
- <name>sys/unlink.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.o</locationURI>
- </link>
- <link>
<name>sys/wait.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
</link>
<link>
- <name>sys/wait.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.o</locationURI>
- </link>
- <link>
<name>sys/write.c</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
</link>
- <link>
- <name>sys/write.o</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.o</locationURI>
- </link>
</linkedResources>
</projectDescription>