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-rw-r--r--FreedomStudio/HiFive1/demo_gpio/.cproject13
-rw-r--r--FreedomStudio/HiFive1/demo_gpio/.project158
-rw-r--r--FreedomStudio/HiFive1/demo_gpio/demo_gpio OpenOCD.launch6
-rw-r--r--FreedomStudio/HiFive1/demo_gpio/fe310-xsvd.json2325
-rw-r--r--FreedomStudio/HiFive1/dhrystone/.cproject211
-rw-r--r--FreedomStudio/HiFive1/dhrystone/.gitignore (renamed from FreedomStudio/HiFive1/wrap-hifive1/.gitignore)0
-rw-r--r--FreedomStudio/HiFive1/dhrystone/.project368
-rw-r--r--FreedomStudio/HiFive1/dhrystone/dhrystone.launch61
-rw-r--r--FreedomStudio/HiFive1/dhrystone/fe310-xsvd.json2325
-rw-r--r--FreedomStudio/HiFive1/dhrystone/sifive-freedom-e300-hifive1.cfg34
-rw-r--r--FreedomStudio/HiFive1/hello/.cproject13
-rw-r--r--FreedomStudio/HiFive1/hello/.project158
-rw-r--r--FreedomStudio/HiFive1/hello/fe310-xsvd.json2325
-rw-r--r--FreedomStudio/HiFive1/hello/hello OpenOCD.launch (renamed from FreedomStudio/HiFive1/hello/hello Debug.launch)1
-rw-r--r--FreedomStudio/HiFive1/led_fade/.cproject13
-rw-r--r--FreedomStudio/HiFive1/led_fade/.project158
-rw-r--r--FreedomStudio/HiFive1/led_fade/fe310-xsvd.json2325
-rw-r--r--FreedomStudio/HiFive1/led_fade/led_fade OpenOCD.launch (renamed from FreedomStudio/HiFive1/led_fade/led_fade Debug.launch)1
-rw-r--r--FreedomStudio/HiFive1/wrap-hifive1/.cproject192
-rw-r--r--FreedomStudio/HiFive1/wrap-hifive1/.project153
20 files changed, 10418 insertions, 422 deletions
diff --git a/FreedomStudio/HiFive1/demo_gpio/.cproject b/FreedomStudio/HiFive1/demo_gpio/.cproject
index f23cfc4..ab6f99e 100644
--- a/FreedomStudio/HiFive1/demo_gpio/.cproject
+++ b/FreedomStudio/HiFive1/demo_gpio/.cproject
@@ -48,10 +48,6 @@
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1472778604" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.874608690" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths.545620458" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/include"/>
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../bsp/drivers"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/include"/>
<listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
@@ -62,10 +58,6 @@
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1632260763" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1464742435" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/drivers"/>
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../bsp/include"/>
<listOptionValue builtIn="false" value="../../../../bsp/drivers"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
@@ -84,16 +76,15 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.2092172057" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.1930877742" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
<listOptionValue builtIn="false" value="c"/>
- <listOptionValue builtIn="false" value="wrap-hifive1"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.1748443680" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts -Wl,--wrap=_malloc -Wl,--wrap=_free -Wl,--wrap=_open -Wl,--wrap=_lseek -Wl,--wrap=_read -Wl,--wrap=_write -Wl,--wrap=_fstat -Wl,--wrap=_stat -Wl,--wrap=_close -Wl,--wrap=_link -Wl,--wrap=_unlink -Wl,--wrap=_execve -Wl,--wrap=_fork -Wl,--wrap=_getpid -Wl,--wrap=_kill -Wl,--wrap=_wait -Wl,--wrap=_isatty -Wl,--wrap=_times -Wl,--wrap=_sbrk -Wl,--wrap=__exit -Wl,--wrap=_puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.1340277823" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
- <listOptionValue builtIn="false" value="../../wrap-hifive1/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.535033372" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/freedom-e300-hifive1/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.221590263" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.170776044" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
diff --git a/FreedomStudio/HiFive1/demo_gpio/.project b/FreedomStudio/HiFive1/demo_gpio/.project
index 0557f56..0e42de2 100644
--- a/FreedomStudio/HiFive1/demo_gpio/.project
+++ b/FreedomStudio/HiFive1/demo_gpio/.project
@@ -35,11 +35,6 @@
<locationURI>PARENT-3-PROJECT_LOC/software/demo_gpio/demo_gpio.c</locationURI>
</link>
<link>
- <name>bsp/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/.DS_Store</locationURI>
- </link>
- <link>
<name>bsp/drivers</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
@@ -55,19 +50,19 @@
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/drivers/fe300prci</name>
+ <name>bsp/libwrap</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/drivers/plic</name>
+ <name>bsp/drivers/fe300prci</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/env/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/env/.DS_Store</locationURI>
+ <name>bsp/drivers/plic</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>bsp/env/encoding.h</name>
@@ -95,12 +90,22 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
</link>
<link>
- <name>bsp/include/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/include/.DS_Store</locationURI>
+ <name>bsp/include/sifive</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/include/sifive</name>
+ <name>bsp/libwrap/misc</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
@@ -125,6 +130,11 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI>
</link>
<link>
+ <name>bsp/env/freedom-e300-hifive1/dhrystone.lds</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/dhrystone.lds</locationURI>
+ </link>
+ <link>
<name>bsp/env/freedom-e300-hifive1/flash.lds</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/flash.lds</locationURI>
@@ -170,6 +180,126 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
</link>
<link>
+ <name>bsp/libwrap/misc/write_hex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib/malloc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/_exit.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/close.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/execve.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fork.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fstat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/getpid.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/isatty.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/kill.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/link.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/lseek.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/open.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/openat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/puts.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/read.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/sbrk.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stub.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/times.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/unlink.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/wait.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/weak_under_alias.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/write.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+ </link>
+ <link>
<name>bsp/include/sifive/devices/aon.h</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
diff --git a/FreedomStudio/HiFive1/demo_gpio/demo_gpio OpenOCD.launch b/FreedomStudio/HiFive1/demo_gpio/demo_gpio OpenOCD.launch
index b082d2a..daada7b 100644
--- a/FreedomStudio/HiFive1/demo_gpio/demo_gpio OpenOCD.launch
+++ b/FreedomStudio/HiFive1/demo_gpio/demo_gpio OpenOCD.launch
@@ -6,6 +6,7 @@
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
@@ -16,10 +17,12 @@
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-freedom-e300-hifive1.cfg"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/fe310-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
@@ -40,10 +43,9 @@
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
-<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/demo_gpio.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="demo_gpio"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
diff --git a/FreedomStudio/HiFive1/demo_gpio/fe310-xsvd.json b/FreedomStudio/HiFive1/demo_gpio/fe310-xsvd.json
new file mode 100644
index 0000000..1722e54
--- /dev/null
+++ b/FreedomStudio/HiFive1/demo_gpio/fe310-xsvd.json
@@ -0,0 +1,2325 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "fe310": {
+ "displayName": "Freedom E310-G000",
+ "description": "The FE310-G000 is the first Freedom E300 SoC, and is the industry's first commercially available RISC-V SoC. The FE310-G000 is built around the E31 Core Complex instantiated in the Freedom E300 platform.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_FE310_",
+ "headerTypePrefix": "sifive_fe310_",
+ "headerInterruptPrefix": "sifive_fe310_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "51",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ }
+ },
+ "numLocalInterrupts": "0"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "52",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "2",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "2",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "wdog": {
+ "description": "Watchdog Timer (WDT), part of Always-On Domain",
+ "baseAddress": "0x10000000",
+ "size": "0x0040",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Watchdog Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "Watchdog counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "rsten": {
+ "description": "Watchdog full reset enable",
+ "bitOffset": "8",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "zerocmp": {
+ "description": "Watchdog zero on comparator",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Watchdog enable counter always",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "encoreawake": {
+ "description": "Watchdog counter only when awake",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "Watchdog interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Watchdog Count Register",
+ "addressOffset": "0x0008"
+ },
+ "scale": {
+ "description": "Watchdog Scale Register",
+ "addressOffset": "0x0010",
+ "fields": {
+ "value": {
+ "description": "Watchdog scale value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "feed": {
+ "description": "Watchdog Feed Address Register",
+ "addressOffset": "0x0018"
+ },
+ "key": {
+ "description": "Watchdog Key Register",
+ "addressOffset": "0x001C"
+ },
+ "cmp": {
+ "description": "Watchdog Compare Register",
+ "addressOffset": "0x0020",
+ "fields": {
+ "value": {
+ "description": "Watchdog compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "wdogcmp": {
+ "description": "Watchdog Compare Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "rtc": {
+ "description": "Real-Time Clock (RTC), part of Always-On Domain",
+ "baseAddress": "0x10000040",
+ "size": "0x0030",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "RTC Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "RTC clock rate scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "enalways": {
+ "description": "RTC counter enable",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "RTC comparator interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "low": {
+ "description": "RTC Counter Register Low",
+ "addressOffset": "0x0008"
+ },
+ "high": {
+ "description": "RTC Counter Register High",
+ "addressOffset": "0x000C",
+ "fields": {
+ "value": {
+ "description": "RTC counter register, high bits",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "scale": {
+ "description": "RTC Scale Register",
+ "addressOffset": "0x0010"
+ },
+ "cmp": {
+ "description": "RTC Compare Register",
+ "addressOffset": "0x0020"
+ }
+ },
+ "interrupts": {
+ "rtccmp": {
+ "description": "RTC Compare Interrupt",
+ "value": "2"
+ }
+ }
+ },
+ "pmu": {
+ "description": "Power-Management Unit (PMU), part of Always-On Domain",
+ "baseAddress": "0x10000100",
+ "size": "0x0050",
+ "resetMask": "none",
+ "registers": {
+ "wakeupi": {
+ "description": "Wakeup program instruction Registers",
+ "addressOffset": "0x0000",
+ "arraySize": "8"
+ },
+ "sleepi": {
+ "description": "Sleep Program Instruction Registers",
+ "addressOffset": "0x0020",
+ "arraySize": "8"
+ },
+ "ie": {
+ "description": "PMU Interrupt Enables Register",
+ "addressOffset": "0x0040",
+ "fields": {
+ "rtc": {
+ "description": "RTC Comparator active",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ },
+ "dwakeup": {
+ "description": "dwakeup_n pin active",
+ "bitOffset": "2",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "cause": {
+ "description": "PMU Wakeup Cause Register",
+ "addressOffset": "0x0044",
+ "fields": {
+ "wakeupcause": {
+ "description": "Wakeup cause",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "wakeupcause-enum": {
+ "description": "Wakeup Cause Values Enumeration",
+ "values": {
+ "0": {
+ "displayName": "reset",
+ "description": "Reset Wakeup"
+ },
+ "1": {
+ "displayName": "rtc",
+ "description": "RTC Wakeup"
+ },
+ "2": {
+ "displayName": "dwakeup",
+ "description": "Digital input Wakeup"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ },
+ "resetcause": {
+ "description": "Reset cause",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "resetcause-enum": {
+ "description": "Reset Cause Values Enumeration",
+ "values": {
+ "1": {
+ "displayName": "external",
+ "description": "External reset"
+ },
+ "2": {
+ "displayName": "watchdog",
+ "description": "Watchdog timer reset"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "sleep": {
+ "description": "PMU Initiate Sleep Sequence Register",
+ "addressOffset": "0x0048"
+ },
+ "key": {
+ "description": "PMU Key Register",
+ "addressOffset": "0x004C"
+ }
+ }
+ },
+ "aon": {
+ "description": "Always-On (AON) Domain",
+ "baseAddress": "0x10000070",
+ "size": "0x0090",
+ "resetMask": "none",
+ "registers": {
+ "lfrosccfg": {
+ "description": "Internal Programmable Low-Frequency Ring Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "LFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "LFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "LFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "LFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "backup": {
+ "description": "Backup Registers",
+ "addressOffset": "0x0010",
+ "arraySize": "32"
+ }
+ }
+ },
+ "prci": {
+ "description": "Power, Reset, Clock, Interrupt (PRCI) Peripheral",
+ "baseAddress": "0x10008000",
+ "size": "0x8000",
+ "registers": {
+ "hfrosccfg": {
+ "description": "Internal Trimmable Programmable 72 MHz Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "HFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "HFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "HFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "hfxosccfg": {
+ "description": "External 16 MHz Crystal Oscillator Register",
+ "addressOffset": "0x0004",
+ "fields": {
+ "en": {
+ "description": "HFXOSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFXOSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "pllcfg": {
+ "description": "Internal High-Frequency PLL (HFPLL) Register",
+ "addressOffset": "0x0008",
+ "fields": {
+ "r": {
+ "description": "PLL R input divider value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "pllr-enum": {
+ "description": "Reference Clock R Divide Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "/1",
+ "headerName": "div1",
+ "description": "Unchanged"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/3",
+ "headerName": "div3",
+ "description": "Divided by 3"
+ },
+ "3": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ }
+ }
+ }
+ }
+ },
+ "f": {
+ "description": "PLL F multiplier value",
+ "bitOffset": "4",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x1F",
+ "enumerations": {
+ "pllf-enum": {
+ "description": "Reference Clock F Multiplier Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "*2",
+ "headerName": "mul2",
+ "description": "Multiplied by 2"
+ },
+ "1": {
+ "displayName": "*4",
+ "headerName": "mul4",
+ "description": "Multiplied by 4"
+ },
+ "2": {
+ "displayName": "*6",
+ "headerName": "mul6",
+ "description": "Multiplied by 6"
+ },
+ "3": {
+ "displayName": "*8",
+ "headerName": "mul8",
+ "description": "Multiplied by 8"
+ },
+ "4": {
+ "displayName": "*10",
+ "headerName": "mul10",
+ "description": "Multiplied by 10"
+ },
+ "5": {
+ "displayName": "*12",
+ "headerName": "mul12",
+ "description": "Multiplied by 12"
+ },
+ "6": {
+ "displayName": "*14",
+ "headerName": "mul14",
+ "description": "Multiplied by 14"
+ },
+ "7": {
+ "displayName": "*16",
+ "headerName": "mul16",
+ "description": "Multiplied by 16"
+ },
+ "8": {
+ "displayName": "*18",
+ "headerName": "mul18",
+ "description": "Multiplied by 18"
+ },
+ "9": {
+ "displayName": "*20",
+ "headerName": "mul20",
+ "description": "Multiplied by 20"
+ },
+ "10": {
+ "displayName": "*22",
+ "headerName": "mul22",
+ "description": "Multiplied by 22"
+ },
+ "11": {
+ "displayName": "*24",
+ "headerName": "mul24",
+ "description": "Multiplied by 24"
+ },
+ "12": {
+ "displayName": "*26",
+ "headerName": "mul26",
+ "description": "Multiplied by 26"
+ },
+ "13": {
+ "displayName": "*28",
+ "headerName": "mul28",
+ "description": "Multiplied by 28"
+ },
+ "14": {
+ "displayName": "*30",
+ "headerName": "mul30",
+ "description": "Multiplied by 30"
+ },
+ "15": {
+ "displayName": "*32",
+ "headerName": "mul32",
+ "description": "Multiplied by 32"
+ },
+ "16": {
+ "displayName": "*34",
+ "headerName": "mul34",
+ "description": "Multiplied by 34"
+ },
+ "17": {
+ "displayName": "*36",
+ "headerName": "mul36",
+ "description": "Multiplied by 36"
+ },
+ "18": {
+ "displayName": "*38",
+ "headerName": "mul38",
+ "description": "Multiplied by 38"
+ },
+ "19": {
+ "displayName": "*40",
+ "headerName": "mul40",
+ "description": "Multiplied by 40"
+ },
+ "20": {
+ "displayName": "*42",
+ "headerName": "mul42",
+ "description": "Multiplied by 42"
+ },
+ "21": {
+ "displayName": "*44",
+ "headerName": "mul44",
+ "description": "Multiplied by 44"
+ },
+ "22": {
+ "displayName": "*46",
+ "headerName": "mul46",
+ "description": "Multiplied by 46"
+ },
+ "23": {
+ "displayName": "*48",
+ "headerName": "mul48",
+ "description": "Multiplied by 48"
+ },
+ "24": {
+ "displayName": "*50",
+ "headerName": "mul50",
+ "description": "Multiplied by 50"
+ },
+ "25": {
+ "displayName": "*52",
+ "headerName": "mul52",
+ "description": "Multiplied by 52"
+ },
+ "26": {
+ "displayName": "*54",
+ "headerName": "mul54",
+ "description": "Multiplied by 54"
+ },
+ "27": {
+ "displayName": "*56",
+ "headerName": "mul56",
+ "description": "Multiplied by 56"
+ },
+ "28": {
+ "displayName": "*58",
+ "headerName": "mul58",
+ "description": "Multiplied by 58"
+ },
+ "29": {
+ "displayName": "*60",
+ "headerName": "mul60",
+ "description": "Multiplied by 60"
+ },
+ "30": {
+ "displayName": "*62",
+ "headerName": "mul62",
+ "description": "Multiplied by 62"
+ },
+ "31": {
+ "displayName": "*64",
+ "headerName": "mul64",
+ "description": "Multiplied by 64"
+ },
+ "32": {
+ "displayName": "*66",
+ "headerName": "mul66",
+ "description": "Multiplied by 66"
+ },
+ "33": {
+ "displayName": "*68",
+ "headerName": "mul68",
+ "description": "Multiplied by 68"
+ },
+ "34": {
+ "displayName": "*70",
+ "headerName": "mul70",
+ "description": "Multiplied by 70"
+ },
+ "35": {
+ "displayName": "*72",
+ "headerName": "mul72",
+ "description": "Multiplied by 72"
+ },
+ "36": {
+ "displayName": "*74",
+ "headerName": "mul74",
+ "description": "Multiplied by 74"
+ },
+ "37": {
+ "displayName": "*76",
+ "headerName": "mul76",
+ "description": "Multiplied by 76"
+ },
+ "38": {
+ "displayName": "*78",
+ "headerName": "mul78",
+ "description": "Multiplied by 78"
+ },
+ "39": {
+ "displayName": "*80",
+ "headerName": "mul80",
+ "description": "Multiplied by 80"
+ },
+ "40": {
+ "displayName": "*82",
+ "headerName": "mul82",
+ "description": "Multiplied by 82"
+ },
+ "41": {
+ "displayName": "*84",
+ "headerName": "mul84",
+ "description": "Multiplied by 84"
+ },
+ "42": {
+ "displayName": "*86",
+ "headerName": "mul86",
+ "description": "Multiplied by 86"
+ },
+ "43": {
+ "displayName": "*88",
+ "headerName": "mul88",
+ "description": "Multiplied by 88"
+ },
+ "44": {
+ "displayName": "*90",
+ "headerName": "mul90",
+ "description": "Multiplied by 90"
+ },
+ "45": {
+ "displayName": "*92",
+ "headerName": "mul92",
+ "description": "Multiplied by 92"
+ },
+ "46": {
+ "displayName": "*94",
+ "headerName": "mul94",
+ "description": "Multiplied by 94"
+ },
+ "47": {
+ "displayName": "*96",
+ "headerName": "mul96",
+ "description": "Multiplied by 96"
+ },
+ "48": {
+ "displayName": "*98",
+ "headerName": "mul98",
+ "description": "Multiplied by 98"
+ },
+ "49": {
+ "displayName": "*100",
+ "headerName": "mul100",
+ "description": "Multiplied by 100"
+ },
+ "50": {
+ "displayName": "*102",
+ "headerName": "mul102",
+ "description": "Multiplied by 102"
+ },
+ "51": {
+ "displayName": "*104",
+ "headerName": "mul104",
+ "description": "Multiplied by 104"
+ },
+ "52": {
+ "displayName": "*106",
+ "headerName": "mul106",
+ "description": "Multiplied by 106"
+ },
+ "53": {
+ "displayName": "*108",
+ "headerName": "mul108",
+ "description": "Multiplied by 108"
+ },
+ "54": {
+ "displayName": "*110",
+ "headerName": "mul110",
+ "description": "Multiplied by 110"
+ },
+ "55": {
+ "displayName": "*112",
+ "headerName": "mul112",
+ "description": "Multiplied by 112"
+ },
+ "56": {
+ "displayName": "*114",
+ "headerName": "mul114",
+ "description": "Multiplied by 114"
+ },
+ "57": {
+ "displayName": "*116",
+ "headerName": "mul116",
+ "description": "Multiplied by 116"
+ },
+ "58": {
+ "displayName": "*118",
+ "headerName": "mul118",
+ "description": "Multiplied by 118"
+ },
+ "59": {
+ "displayName": "*120",
+ "headerName": "mul120",
+ "description": "Multiplied by 120"
+ },
+ "60": {
+ "displayName": "*122",
+ "headerName": "mul122",
+ "description": "Multiplied by 122"
+ },
+ "61": {
+ "displayName": "*124",
+ "headerName": "mul124",
+ "description": "Multiplied by 124"
+ },
+ "62": {
+ "displayName": "*126",
+ "headerName": "mul126",
+ "description": "Multiplied by 126"
+ },
+ "63": {
+ "displayName": "*128",
+ "headerName": "mul128",
+ "description": "Multiplied by 128"
+ }
+ }
+ }
+ }
+ },
+ "q": {
+ "description": "PLL Q output divider value",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x3",
+ "enumerations": {
+ "pllq-enum": {
+ "description": "Reference Clock Q Divide Ratio Enumeration",
+ "values": {
+ "*": {
+ "displayName": "n/a",
+ "description": "Not supported"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ },
+ "3": {
+ "displayName": "/8",
+ "headerName": "div8",
+ "description": "Divided by 8"
+ }
+ }
+ }
+ }
+ },
+ "sel": {
+ "description": "PLL select",
+ "bitOffset": "16",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "refsel": {
+ "description": "PLL reference select",
+ "bitOffset": "17",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "bypass": {
+ "description": "PLL bypass",
+ "bitOffset": "18",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "lock": {
+ "description": "PLL lock indicator",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "plloutdiv": {
+ "description": "PLL Output Divider",
+ "addressOffset": "0x000C"
+ }
+ }
+ },
+ "otp": {
+ "description": "One-Time Programmable Memory (OTP) Peripheral",
+ "baseAddress": "0x10010000",
+ "size": "0x1000",
+ "registers": {
+ "lock": {
+ "description": "Programmed-I/O Lock Register",
+ "addressOffset": "0x0000"
+ },
+ "ck": {
+ "description": "Device Clock Signal Register",
+ "addressOffset": "0x0004"
+ },
+ "oe": {
+ "description": "Device Output-Enable Signal Register",
+ "addressOffset": "0x0008"
+ },
+ "sel": {
+ "description": "Device Chip-Select Signal Register",
+ "addressOffset": "0x000C"
+ },
+ "we": {
+ "description": "Device Write-Enable Signal Register",
+ "addressOffset": "0x0010"
+ },
+ "mr": {
+ "description": "Device Mode Register",
+ "addressOffset": "0x0014"
+ },
+ "mrr": {
+ "description": "Read-Voltage Regulator Control Register",
+ "addressOffset": "0x0018"
+ },
+ "mpp": {
+ "description": "Write-Voltage Charge Pump Control Register",
+ "addressOffset": "0x001C"
+ },
+ "vrren": {
+ "description": "Read-Voltage Enable Register",
+ "addressOffset": "0x0020"
+ },
+ "vppen": {
+ "description": "Write-Voltage Enable Register",
+ "addressOffset": "0x0024"
+ },
+ "a": {
+ "description": "Device Address Register",
+ "addressOffset": "0x0028"
+ },
+ "d": {
+ "description": "Device Data Input Register",
+ "addressOffset": "0x002C"
+ },
+ "q": {
+ "description": "Device Data Output Register",
+ "addressOffset": "0x0030"
+ },
+ "rsctrl": {
+ "description": "Read Sequencer Control Register",
+ "addressOffset": "0x0034",
+ "fields": {
+ "scale": {
+ "description": "OTP timescale",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "tas": {
+ "description": "Address setup time",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "trp": {
+ "description": "Read pulse time",
+ "bitOffset": "4",
+ "bitWidth": "1"
+ },
+ "tracc": {
+ "description": "Read access time",
+ "bitOffset": "5",
+ "bitWidth": "1"
+ }
+ }
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x10012000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "8"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "9"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "10"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "11"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "12"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "13"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "14"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "15"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "16"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "17"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "18"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "19"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "20"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "21"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "22"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "23"
+ },
+ "gpio16": {
+ "description": "GPIO16 Interrupt",
+ "value": "24"
+ },
+ "gpio17": {
+ "description": "GPIO17 Interrupt",
+ "value": "25"
+ },
+ "gpio18": {
+ "description": "GPIO18 Interrupt",
+ "value": "26"
+ },
+ "gpio19": {
+ "description": "GPIO19 Interrupt",
+ "value": "27"
+ },
+ "gpio20": {
+ "description": "GPIO20 Interrupt",
+ "value": "28"
+ },
+ "gpio21": {
+ "description": "GPIO21 Interrupt",
+ "value": "29"
+ },
+ "gpio22": {
+ "description": "GPIO22 Interrupt",
+ "value": "30"
+ },
+ "gpio23": {
+ "description": "GPIO23 Interrupt",
+ "value": "31"
+ },
+ "gpio24": {
+ "description": "GPIO24 Interrupt",
+ "value": "32"
+ },
+ "gpio25": {
+ "description": "GPIO25 Interrupt",
+ "value": "33"
+ },
+ "gpio26": {
+ "description": "GPIO26 Interrupt",
+ "value": "34"
+ },
+ "gpio27": {
+ "description": "GPIO27 Interrupt",
+ "value": "35"
+ },
+ "gpio28": {
+ "description": "GPIO28 Interrupt",
+ "value": "36"
+ },
+ "gpio29": {
+ "description": "GPIO29 Interrupt",
+ "value": "37"
+ },
+ "gpio30": {
+ "description": "GPIO30 Interrupt",
+ "value": "38"
+ },
+ "gpio31": {
+ "description": "GPIO31 Interrupt",
+ "value": "39"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x10013000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "3"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x10014000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10015000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "40"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "41"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "42"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "43"
+ }
+ }
+ },
+ "uart1": {
+ "baseAddress": "0x10023000",
+ "derivedFrom": "uart0",
+ "groupName": "uart",
+ "interrupts": {
+ "uart1": {
+ "description": "UART1 Interrupt",
+ "value": "4"
+ }
+ }
+ },
+ "spi1": {
+ "baseAddress": "0x10024000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi1": {
+ "description": "SPI1 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm1": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10025000",
+ "groupName": "pwm",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm1cmp0": {
+ "description": "PWM1 Compare 0 Interrupt",
+ "value": "44"
+ },
+ "pwm1cmp1": {
+ "description": "PWM1 Compare 1 Interrupt",
+ "value": "45"
+ },
+ "pwm1cmp2": {
+ "description": "PWM1 Compare 2 Interrupt",
+ "value": "46"
+ },
+ "pwm1cmp3": {
+ "description": "PWM1 Compare 3 Interrupt",
+ "value": "47"
+ }
+ }
+ },
+ "spi2": {
+ "baseAddress": "0x10034000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi2": {
+ "description": "SPI2 Interrupt",
+ "value": "7"
+ }
+ }
+ },
+ "pwm2": {
+ "baseAddress": "0x10035000",
+ "derivedFrom": "pwm1",
+ "groupName": "pwm",
+ "interrupts": {
+ "pwm2cmp0": {
+ "description": "PWM2 Compare 0 Interrupt",
+ "value": "48"
+ },
+ "pwm2cmp1": {
+ "description": "PWM2 Compare 1 Interrupt",
+ "value": "49"
+ },
+ "pwm2cmp2": {
+ "description": "PWM2 Compare 2 Interrupt",
+ "value": "50"
+ },
+ "pwm2cmp3": {
+ "description": "PWM2 Compare 3 Interrupt",
+ "value": "51"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/HiFive1/dhrystone/.cproject b/FreedomStudio/HiFive1/dhrystone/.cproject
new file mode 100644
index 0000000..ca95225
--- /dev/null
+++ b/FreedomStudio/HiFive1/dhrystone/.cproject
@@ -0,0 +1,211 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug">
+ <folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870." name="/" resourcePath="">
+ <toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.debug.108811797" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.debug">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.8320194" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting.379436257" name="Create extended listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting" useByScannerDiscovery="false"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.1043841176" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.383399415" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.most" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.178339006" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.119459497" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.735578493" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.663648478" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.33211902" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.max" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.1212459035" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format" useByScannerDiscovery="true"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.2118228106" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" useByScannerDiscovery="false" value="RISC-V GCC/Newlib" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.1953815021" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" useByScannerDiscovery="false" value="riscv64-unknown-elf-" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.739203741" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" useByScannerDiscovery="false" value="gcc" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.1844392607" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" useByScannerDiscovery="false" value="g++" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.2006331761" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" useByScannerDiscovery="false" value="ar" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.953275776" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" useByScannerDiscovery="false" value="objcopy" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.1629820216" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" useByScannerDiscovery="false" value="objdump" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.1139290195" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" useByScannerDiscovery="false" value="size" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.598152082" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" useByScannerDiscovery="false" value="make" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.1903820766" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" useByScannerDiscovery="false" value="rm" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.base.274413758" name="Architecture" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.base" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.arch.rv32i" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.multiply.1227968882" name="Multiply extension (RVM)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.multiply" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.atomic.25268933" name="Atomic extension (RVA)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.atomic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed.148707865" name="Compressed extension (RVC)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer.2137340048" name="Integer ABI" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.abi.integer.ilp32" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel.93793405" name="Code model" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.codemodel.any" valueType="enumerated"/>
+ <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1301923652" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
+ <builder buildPath="${workspace_loc:/demo_gpio}/Debug" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1496635672" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1472778604" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.874608690" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths.545620458" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
+ <listOptionValue builtIn="false" value="../../../../bsp/env"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/include"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/drivers"/>
+ </option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.other.855588508" name="Other assembler flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.other" useByScannerDiscovery="false" value="-c" valueType="string"/>
+ <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.1208356864" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1632260763" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1464742435" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
+ <listOptionValue builtIn="false" value="../../../../bsp/drivers"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/env"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
+ <listOptionValue builtIn="false" value="../../../../bsp/include"/>
+ </option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.1115817835" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="TIME"/>
+ <listOptionValue builtIn="false" value="NOENUM"/>
+ </option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other.953712529" name="Other compiler flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other" useByScannerDiscovery="true" value="-include sys/cdefs.h -fno-builtin-printf -c -fno-inline -fno-builtin-printf -Wno-implicit -fno-common -mexplicit-relocs -DNOENUM -falign-functions=4" valueType="string"/>
+ <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.517786622" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.890064572" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1118992651" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.303446425" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" useByScannerDiscovery="false" value="false" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.2092172057" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.1930877742" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
+ <listOptionValue builtIn="false" value="c"/>
+ </option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=scanf -Wl,--wrap=printf -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts -Wl,--wrap=_malloc -Wl,--wrap=_free -Wl,--wrap=_open -Wl,--wrap=_lseek -Wl,--wrap=_read -Wl,--wrap=_write -Wl,--wrap=_fstat -Wl,--wrap=_stat -Wl,--wrap=_close -Wl,--wrap=_link -Wl,--wrap=_unlink -Wl,--wrap=_execve -Wl,--wrap=_fork -Wl,--wrap=_getpid -Wl,--wrap=_kill -Wl,--wrap=_wait -Wl,--wrap=_isatty -Wl,--wrap=_times -Wl,--wrap=_sbrk -Wl,--wrap=__exit -Wl,--wrap=_puts" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.1340277823" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
+ <listOptionValue builtIn="false" value="../"/>
+ </option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.535033372" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
+ <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/freedom-e300-hifive1/dhrystone.lds}&quot;"/>
+ </option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.221590263" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="false" valueType="boolean"/>
+ <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.170776044" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+ <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+ <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+ </inputType>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.151100904" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.2013052941" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.735073113" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.43162503" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.407702640" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1632875344" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.730325053" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.442048872" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.2063176206" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.1824434021" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1818348681" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.782529195" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
+ <cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408" moduleId="org.eclipse.cdt.core.settings" name="Release">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408" name="Release" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release">
+ <folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408." name="/" resourcePath="">
+ <toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.1937283388" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.672219611" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting.1692672647" name="Create extended listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.1955835524" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.1634926912" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.size" valueType="enumerated"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.1936180446" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.148983493" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.2117145633" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.1653949713" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.728682044" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.1767313058" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.254213830" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" value="RISC-V GCC/Newlib" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.372256120" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" value="riscv64-unknown-elf-" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.298542489" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" value="gcc" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.1240126358" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" value="g++" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.170388081" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" value="ar" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.1277104890" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" value="objcopy" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.488685269" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" value="objdump" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.554860593" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" value="size" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.468110366" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" value="make" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.309041178" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" value="rm" valueType="string"/>
+ <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.687762738" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
+ <builder buildPath="${workspace_loc:/demo_gpio}/Release" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.609463428" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1648537074" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.1113623358" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
+ <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.1033931684" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1778523424" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
+ <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1714150627" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.669753833" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1530679232" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1637900674" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
+ <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1335245598" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+ <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+ <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+ </inputType>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.648232936" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.929507343" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.439296099" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.2024214820" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1648338834" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1291642104" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.616461822" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1146271318" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1242922810" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.876301703" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+ </tool>
+ <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1112238656" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.483461408" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <project id="demo_gpio.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.431462479" name="Executable" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf"/>
+ </storageModule>
+ <storageModule moduleId="scannerConfiguration">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+ <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1778523424;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1714150627">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+ </scannerConfigBuildInfo>
+ <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1632260763;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.517786622">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+ </scannerConfigBuildInfo>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+ <storageModule moduleId="refreshScope" versionNumber="2">
+ <configuration configurationName="Debug">
+ <resource resourceType="PROJECT" workspacePath="/demo_gpio"/>
+ </configuration>
+ <configuration configurationName="Release">
+ <resource resourceType="PROJECT" workspacePath="/demo_gpio"/>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/FreedomStudio/HiFive1/wrap-hifive1/.gitignore b/FreedomStudio/HiFive1/dhrystone/.gitignore
index 3df573f..3df573f 100644
--- a/FreedomStudio/HiFive1/wrap-hifive1/.gitignore
+++ b/FreedomStudio/HiFive1/dhrystone/.gitignore
diff --git a/FreedomStudio/HiFive1/dhrystone/.project b/FreedomStudio/HiFive1/dhrystone/.project
new file mode 100644
index 0000000..040d41a
--- /dev/null
+++ b/FreedomStudio/HiFive1/dhrystone/.project
@@ -0,0 +1,368 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>dhrystone</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <triggers>clean,full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ </natures>
+ <linkedResources>
+ <link>
+ <name>bsp</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>dhry.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry.h</locationURI>
+ </link>
+ <link>
+ <name>dhry_1.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_1.c</locationURI>
+ </link>
+ <link>
+ <name>dhry_2.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_2.c</locationURI>
+ </link>
+ <link>
+ <name>dhry_printf.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_printf.c</locationURI>
+ </link>
+ <link>
+ <name>dhry_stubs.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_stubs.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/env</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/include</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers/fe300prci</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers/plic</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/encoding.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/entry.S</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/entry.S</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/freedom-e300-hifive1</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/hifive1.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/hifive1.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/start.S</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/misc</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers/fe300prci/fe300prci_driver.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers/fe300prci/fe300prci_driver.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers/plic/plic_driver.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/drivers/plic/plic_driver.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/freedom-e300-hifive1/dhrystone.lds</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/dhrystone.lds</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/freedom-e300-hifive1/flash.lds</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/flash.lds</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/freedom-e300-hifive1/init.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/init.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/freedom-e300-hifive1/openocd.cfg</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/openocd.cfg</locationURI>
+ </link>
+ <link>
+ <name>bsp/env/freedom-e300-hifive1/platform.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/platform.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/bits.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/const.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/sections.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/smp.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/misc/write_hex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib/malloc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/_exit.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/close.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/execve.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fork.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fstat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/getpid.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/isatty.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/kill.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/link.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/lseek.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/open.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/openat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/puts.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/read.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/sbrk.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stub.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/times.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/unlink.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/wait.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/weak_under_alias.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/write.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/aon.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/clint.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/gpio.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/otp.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/plic.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/prci.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/pwm.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/spi.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/include/sifive/devices/uart.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI>
+ </link>
+ </linkedResources>
+</projectDescription>
diff --git a/FreedomStudio/HiFive1/dhrystone/dhrystone.launch b/FreedomStudio/HiFive1/dhrystone/dhrystone.launch
new file mode 100644
index 0000000..57e1418
--- /dev/null
+++ b/FreedomStudio/HiFive1/dhrystone/dhrystone.launch
@@ -0,0 +1,61 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32&#10;set remotetimeout 250"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-freedom-e300-hifive1.cfg"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/fe310-xsvd.json"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/dhrystone.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="dhrystone"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/dhrystone"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/FreedomStudio/HiFive1/dhrystone/fe310-xsvd.json b/FreedomStudio/HiFive1/dhrystone/fe310-xsvd.json
new file mode 100644
index 0000000..1722e54
--- /dev/null
+++ b/FreedomStudio/HiFive1/dhrystone/fe310-xsvd.json
@@ -0,0 +1,2325 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "fe310": {
+ "displayName": "Freedom E310-G000",
+ "description": "The FE310-G000 is the first Freedom E300 SoC, and is the industry's first commercially available RISC-V SoC. The FE310-G000 is built around the E31 Core Complex instantiated in the Freedom E300 platform.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_FE310_",
+ "headerTypePrefix": "sifive_fe310_",
+ "headerInterruptPrefix": "sifive_fe310_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "51",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ }
+ },
+ "numLocalInterrupts": "0"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "52",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "2",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "2",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "wdog": {
+ "description": "Watchdog Timer (WDT), part of Always-On Domain",
+ "baseAddress": "0x10000000",
+ "size": "0x0040",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Watchdog Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "Watchdog counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "rsten": {
+ "description": "Watchdog full reset enable",
+ "bitOffset": "8",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "zerocmp": {
+ "description": "Watchdog zero on comparator",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Watchdog enable counter always",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "encoreawake": {
+ "description": "Watchdog counter only when awake",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "Watchdog interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Watchdog Count Register",
+ "addressOffset": "0x0008"
+ },
+ "scale": {
+ "description": "Watchdog Scale Register",
+ "addressOffset": "0x0010",
+ "fields": {
+ "value": {
+ "description": "Watchdog scale value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "feed": {
+ "description": "Watchdog Feed Address Register",
+ "addressOffset": "0x0018"
+ },
+ "key": {
+ "description": "Watchdog Key Register",
+ "addressOffset": "0x001C"
+ },
+ "cmp": {
+ "description": "Watchdog Compare Register",
+ "addressOffset": "0x0020",
+ "fields": {
+ "value": {
+ "description": "Watchdog compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "wdogcmp": {
+ "description": "Watchdog Compare Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "rtc": {
+ "description": "Real-Time Clock (RTC), part of Always-On Domain",
+ "baseAddress": "0x10000040",
+ "size": "0x0030",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "RTC Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "RTC clock rate scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "enalways": {
+ "description": "RTC counter enable",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "RTC comparator interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "low": {
+ "description": "RTC Counter Register Low",
+ "addressOffset": "0x0008"
+ },
+ "high": {
+ "description": "RTC Counter Register High",
+ "addressOffset": "0x000C",
+ "fields": {
+ "value": {
+ "description": "RTC counter register, high bits",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "scale": {
+ "description": "RTC Scale Register",
+ "addressOffset": "0x0010"
+ },
+ "cmp": {
+ "description": "RTC Compare Register",
+ "addressOffset": "0x0020"
+ }
+ },
+ "interrupts": {
+ "rtccmp": {
+ "description": "RTC Compare Interrupt",
+ "value": "2"
+ }
+ }
+ },
+ "pmu": {
+ "description": "Power-Management Unit (PMU), part of Always-On Domain",
+ "baseAddress": "0x10000100",
+ "size": "0x0050",
+ "resetMask": "none",
+ "registers": {
+ "wakeupi": {
+ "description": "Wakeup program instruction Registers",
+ "addressOffset": "0x0000",
+ "arraySize": "8"
+ },
+ "sleepi": {
+ "description": "Sleep Program Instruction Registers",
+ "addressOffset": "0x0020",
+ "arraySize": "8"
+ },
+ "ie": {
+ "description": "PMU Interrupt Enables Register",
+ "addressOffset": "0x0040",
+ "fields": {
+ "rtc": {
+ "description": "RTC Comparator active",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ },
+ "dwakeup": {
+ "description": "dwakeup_n pin active",
+ "bitOffset": "2",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "cause": {
+ "description": "PMU Wakeup Cause Register",
+ "addressOffset": "0x0044",
+ "fields": {
+ "wakeupcause": {
+ "description": "Wakeup cause",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "wakeupcause-enum": {
+ "description": "Wakeup Cause Values Enumeration",
+ "values": {
+ "0": {
+ "displayName": "reset",
+ "description": "Reset Wakeup"
+ },
+ "1": {
+ "displayName": "rtc",
+ "description": "RTC Wakeup"
+ },
+ "2": {
+ "displayName": "dwakeup",
+ "description": "Digital input Wakeup"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ },
+ "resetcause": {
+ "description": "Reset cause",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "resetcause-enum": {
+ "description": "Reset Cause Values Enumeration",
+ "values": {
+ "1": {
+ "displayName": "external",
+ "description": "External reset"
+ },
+ "2": {
+ "displayName": "watchdog",
+ "description": "Watchdog timer reset"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "sleep": {
+ "description": "PMU Initiate Sleep Sequence Register",
+ "addressOffset": "0x0048"
+ },
+ "key": {
+ "description": "PMU Key Register",
+ "addressOffset": "0x004C"
+ }
+ }
+ },
+ "aon": {
+ "description": "Always-On (AON) Domain",
+ "baseAddress": "0x10000070",
+ "size": "0x0090",
+ "resetMask": "none",
+ "registers": {
+ "lfrosccfg": {
+ "description": "Internal Programmable Low-Frequency Ring Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "LFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "LFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "LFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "LFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "backup": {
+ "description": "Backup Registers",
+ "addressOffset": "0x0010",
+ "arraySize": "32"
+ }
+ }
+ },
+ "prci": {
+ "description": "Power, Reset, Clock, Interrupt (PRCI) Peripheral",
+ "baseAddress": "0x10008000",
+ "size": "0x8000",
+ "registers": {
+ "hfrosccfg": {
+ "description": "Internal Trimmable Programmable 72 MHz Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "HFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "HFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "HFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "hfxosccfg": {
+ "description": "External 16 MHz Crystal Oscillator Register",
+ "addressOffset": "0x0004",
+ "fields": {
+ "en": {
+ "description": "HFXOSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFXOSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "pllcfg": {
+ "description": "Internal High-Frequency PLL (HFPLL) Register",
+ "addressOffset": "0x0008",
+ "fields": {
+ "r": {
+ "description": "PLL R input divider value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "pllr-enum": {
+ "description": "Reference Clock R Divide Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "/1",
+ "headerName": "div1",
+ "description": "Unchanged"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/3",
+ "headerName": "div3",
+ "description": "Divided by 3"
+ },
+ "3": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ }
+ }
+ }
+ }
+ },
+ "f": {
+ "description": "PLL F multiplier value",
+ "bitOffset": "4",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x1F",
+ "enumerations": {
+ "pllf-enum": {
+ "description": "Reference Clock F Multiplier Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "*2",
+ "headerName": "mul2",
+ "description": "Multiplied by 2"
+ },
+ "1": {
+ "displayName": "*4",
+ "headerName": "mul4",
+ "description": "Multiplied by 4"
+ },
+ "2": {
+ "displayName": "*6",
+ "headerName": "mul6",
+ "description": "Multiplied by 6"
+ },
+ "3": {
+ "displayName": "*8",
+ "headerName": "mul8",
+ "description": "Multiplied by 8"
+ },
+ "4": {
+ "displayName": "*10",
+ "headerName": "mul10",
+ "description": "Multiplied by 10"
+ },
+ "5": {
+ "displayName": "*12",
+ "headerName": "mul12",
+ "description": "Multiplied by 12"
+ },
+ "6": {
+ "displayName": "*14",
+ "headerName": "mul14",
+ "description": "Multiplied by 14"
+ },
+ "7": {
+ "displayName": "*16",
+ "headerName": "mul16",
+ "description": "Multiplied by 16"
+ },
+ "8": {
+ "displayName": "*18",
+ "headerName": "mul18",
+ "description": "Multiplied by 18"
+ },
+ "9": {
+ "displayName": "*20",
+ "headerName": "mul20",
+ "description": "Multiplied by 20"
+ },
+ "10": {
+ "displayName": "*22",
+ "headerName": "mul22",
+ "description": "Multiplied by 22"
+ },
+ "11": {
+ "displayName": "*24",
+ "headerName": "mul24",
+ "description": "Multiplied by 24"
+ },
+ "12": {
+ "displayName": "*26",
+ "headerName": "mul26",
+ "description": "Multiplied by 26"
+ },
+ "13": {
+ "displayName": "*28",
+ "headerName": "mul28",
+ "description": "Multiplied by 28"
+ },
+ "14": {
+ "displayName": "*30",
+ "headerName": "mul30",
+ "description": "Multiplied by 30"
+ },
+ "15": {
+ "displayName": "*32",
+ "headerName": "mul32",
+ "description": "Multiplied by 32"
+ },
+ "16": {
+ "displayName": "*34",
+ "headerName": "mul34",
+ "description": "Multiplied by 34"
+ },
+ "17": {
+ "displayName": "*36",
+ "headerName": "mul36",
+ "description": "Multiplied by 36"
+ },
+ "18": {
+ "displayName": "*38",
+ "headerName": "mul38",
+ "description": "Multiplied by 38"
+ },
+ "19": {
+ "displayName": "*40",
+ "headerName": "mul40",
+ "description": "Multiplied by 40"
+ },
+ "20": {
+ "displayName": "*42",
+ "headerName": "mul42",
+ "description": "Multiplied by 42"
+ },
+ "21": {
+ "displayName": "*44",
+ "headerName": "mul44",
+ "description": "Multiplied by 44"
+ },
+ "22": {
+ "displayName": "*46",
+ "headerName": "mul46",
+ "description": "Multiplied by 46"
+ },
+ "23": {
+ "displayName": "*48",
+ "headerName": "mul48",
+ "description": "Multiplied by 48"
+ },
+ "24": {
+ "displayName": "*50",
+ "headerName": "mul50",
+ "description": "Multiplied by 50"
+ },
+ "25": {
+ "displayName": "*52",
+ "headerName": "mul52",
+ "description": "Multiplied by 52"
+ },
+ "26": {
+ "displayName": "*54",
+ "headerName": "mul54",
+ "description": "Multiplied by 54"
+ },
+ "27": {
+ "displayName": "*56",
+ "headerName": "mul56",
+ "description": "Multiplied by 56"
+ },
+ "28": {
+ "displayName": "*58",
+ "headerName": "mul58",
+ "description": "Multiplied by 58"
+ },
+ "29": {
+ "displayName": "*60",
+ "headerName": "mul60",
+ "description": "Multiplied by 60"
+ },
+ "30": {
+ "displayName": "*62",
+ "headerName": "mul62",
+ "description": "Multiplied by 62"
+ },
+ "31": {
+ "displayName": "*64",
+ "headerName": "mul64",
+ "description": "Multiplied by 64"
+ },
+ "32": {
+ "displayName": "*66",
+ "headerName": "mul66",
+ "description": "Multiplied by 66"
+ },
+ "33": {
+ "displayName": "*68",
+ "headerName": "mul68",
+ "description": "Multiplied by 68"
+ },
+ "34": {
+ "displayName": "*70",
+ "headerName": "mul70",
+ "description": "Multiplied by 70"
+ },
+ "35": {
+ "displayName": "*72",
+ "headerName": "mul72",
+ "description": "Multiplied by 72"
+ },
+ "36": {
+ "displayName": "*74",
+ "headerName": "mul74",
+ "description": "Multiplied by 74"
+ },
+ "37": {
+ "displayName": "*76",
+ "headerName": "mul76",
+ "description": "Multiplied by 76"
+ },
+ "38": {
+ "displayName": "*78",
+ "headerName": "mul78",
+ "description": "Multiplied by 78"
+ },
+ "39": {
+ "displayName": "*80",
+ "headerName": "mul80",
+ "description": "Multiplied by 80"
+ },
+ "40": {
+ "displayName": "*82",
+ "headerName": "mul82",
+ "description": "Multiplied by 82"
+ },
+ "41": {
+ "displayName": "*84",
+ "headerName": "mul84",
+ "description": "Multiplied by 84"
+ },
+ "42": {
+ "displayName": "*86",
+ "headerName": "mul86",
+ "description": "Multiplied by 86"
+ },
+ "43": {
+ "displayName": "*88",
+ "headerName": "mul88",
+ "description": "Multiplied by 88"
+ },
+ "44": {
+ "displayName": "*90",
+ "headerName": "mul90",
+ "description": "Multiplied by 90"
+ },
+ "45": {
+ "displayName": "*92",
+ "headerName": "mul92",
+ "description": "Multiplied by 92"
+ },
+ "46": {
+ "displayName": "*94",
+ "headerName": "mul94",
+ "description": "Multiplied by 94"
+ },
+ "47": {
+ "displayName": "*96",
+ "headerName": "mul96",
+ "description": "Multiplied by 96"
+ },
+ "48": {
+ "displayName": "*98",
+ "headerName": "mul98",
+ "description": "Multiplied by 98"
+ },
+ "49": {
+ "displayName": "*100",
+ "headerName": "mul100",
+ "description": "Multiplied by 100"
+ },
+ "50": {
+ "displayName": "*102",
+ "headerName": "mul102",
+ "description": "Multiplied by 102"
+ },
+ "51": {
+ "displayName": "*104",
+ "headerName": "mul104",
+ "description": "Multiplied by 104"
+ },
+ "52": {
+ "displayName": "*106",
+ "headerName": "mul106",
+ "description": "Multiplied by 106"
+ },
+ "53": {
+ "displayName": "*108",
+ "headerName": "mul108",
+ "description": "Multiplied by 108"
+ },
+ "54": {
+ "displayName": "*110",
+ "headerName": "mul110",
+ "description": "Multiplied by 110"
+ },
+ "55": {
+ "displayName": "*112",
+ "headerName": "mul112",
+ "description": "Multiplied by 112"
+ },
+ "56": {
+ "displayName": "*114",
+ "headerName": "mul114",
+ "description": "Multiplied by 114"
+ },
+ "57": {
+ "displayName": "*116",
+ "headerName": "mul116",
+ "description": "Multiplied by 116"
+ },
+ "58": {
+ "displayName": "*118",
+ "headerName": "mul118",
+ "description": "Multiplied by 118"
+ },
+ "59": {
+ "displayName": "*120",
+ "headerName": "mul120",
+ "description": "Multiplied by 120"
+ },
+ "60": {
+ "displayName": "*122",
+ "headerName": "mul122",
+ "description": "Multiplied by 122"
+ },
+ "61": {
+ "displayName": "*124",
+ "headerName": "mul124",
+ "description": "Multiplied by 124"
+ },
+ "62": {
+ "displayName": "*126",
+ "headerName": "mul126",
+ "description": "Multiplied by 126"
+ },
+ "63": {
+ "displayName": "*128",
+ "headerName": "mul128",
+ "description": "Multiplied by 128"
+ }
+ }
+ }
+ }
+ },
+ "q": {
+ "description": "PLL Q output divider value",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x3",
+ "enumerations": {
+ "pllq-enum": {
+ "description": "Reference Clock Q Divide Ratio Enumeration",
+ "values": {
+ "*": {
+ "displayName": "n/a",
+ "description": "Not supported"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ },
+ "3": {
+ "displayName": "/8",
+ "headerName": "div8",
+ "description": "Divided by 8"
+ }
+ }
+ }
+ }
+ },
+ "sel": {
+ "description": "PLL select",
+ "bitOffset": "16",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "refsel": {
+ "description": "PLL reference select",
+ "bitOffset": "17",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "bypass": {
+ "description": "PLL bypass",
+ "bitOffset": "18",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "lock": {
+ "description": "PLL lock indicator",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "plloutdiv": {
+ "description": "PLL Output Divider",
+ "addressOffset": "0x000C"
+ }
+ }
+ },
+ "otp": {
+ "description": "One-Time Programmable Memory (OTP) Peripheral",
+ "baseAddress": "0x10010000",
+ "size": "0x1000",
+ "registers": {
+ "lock": {
+ "description": "Programmed-I/O Lock Register",
+ "addressOffset": "0x0000"
+ },
+ "ck": {
+ "description": "Device Clock Signal Register",
+ "addressOffset": "0x0004"
+ },
+ "oe": {
+ "description": "Device Output-Enable Signal Register",
+ "addressOffset": "0x0008"
+ },
+ "sel": {
+ "description": "Device Chip-Select Signal Register",
+ "addressOffset": "0x000C"
+ },
+ "we": {
+ "description": "Device Write-Enable Signal Register",
+ "addressOffset": "0x0010"
+ },
+ "mr": {
+ "description": "Device Mode Register",
+ "addressOffset": "0x0014"
+ },
+ "mrr": {
+ "description": "Read-Voltage Regulator Control Register",
+ "addressOffset": "0x0018"
+ },
+ "mpp": {
+ "description": "Write-Voltage Charge Pump Control Register",
+ "addressOffset": "0x001C"
+ },
+ "vrren": {
+ "description": "Read-Voltage Enable Register",
+ "addressOffset": "0x0020"
+ },
+ "vppen": {
+ "description": "Write-Voltage Enable Register",
+ "addressOffset": "0x0024"
+ },
+ "a": {
+ "description": "Device Address Register",
+ "addressOffset": "0x0028"
+ },
+ "d": {
+ "description": "Device Data Input Register",
+ "addressOffset": "0x002C"
+ },
+ "q": {
+ "description": "Device Data Output Register",
+ "addressOffset": "0x0030"
+ },
+ "rsctrl": {
+ "description": "Read Sequencer Control Register",
+ "addressOffset": "0x0034",
+ "fields": {
+ "scale": {
+ "description": "OTP timescale",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "tas": {
+ "description": "Address setup time",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "trp": {
+ "description": "Read pulse time",
+ "bitOffset": "4",
+ "bitWidth": "1"
+ },
+ "tracc": {
+ "description": "Read access time",
+ "bitOffset": "5",
+ "bitWidth": "1"
+ }
+ }
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x10012000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "8"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "9"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "10"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "11"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "12"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "13"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "14"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "15"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "16"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "17"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "18"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "19"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "20"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "21"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "22"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "23"
+ },
+ "gpio16": {
+ "description": "GPIO16 Interrupt",
+ "value": "24"
+ },
+ "gpio17": {
+ "description": "GPIO17 Interrupt",
+ "value": "25"
+ },
+ "gpio18": {
+ "description": "GPIO18 Interrupt",
+ "value": "26"
+ },
+ "gpio19": {
+ "description": "GPIO19 Interrupt",
+ "value": "27"
+ },
+ "gpio20": {
+ "description": "GPIO20 Interrupt",
+ "value": "28"
+ },
+ "gpio21": {
+ "description": "GPIO21 Interrupt",
+ "value": "29"
+ },
+ "gpio22": {
+ "description": "GPIO22 Interrupt",
+ "value": "30"
+ },
+ "gpio23": {
+ "description": "GPIO23 Interrupt",
+ "value": "31"
+ },
+ "gpio24": {
+ "description": "GPIO24 Interrupt",
+ "value": "32"
+ },
+ "gpio25": {
+ "description": "GPIO25 Interrupt",
+ "value": "33"
+ },
+ "gpio26": {
+ "description": "GPIO26 Interrupt",
+ "value": "34"
+ },
+ "gpio27": {
+ "description": "GPIO27 Interrupt",
+ "value": "35"
+ },
+ "gpio28": {
+ "description": "GPIO28 Interrupt",
+ "value": "36"
+ },
+ "gpio29": {
+ "description": "GPIO29 Interrupt",
+ "value": "37"
+ },
+ "gpio30": {
+ "description": "GPIO30 Interrupt",
+ "value": "38"
+ },
+ "gpio31": {
+ "description": "GPIO31 Interrupt",
+ "value": "39"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x10013000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "3"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x10014000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10015000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "40"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "41"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "42"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "43"
+ }
+ }
+ },
+ "uart1": {
+ "baseAddress": "0x10023000",
+ "derivedFrom": "uart0",
+ "groupName": "uart",
+ "interrupts": {
+ "uart1": {
+ "description": "UART1 Interrupt",
+ "value": "4"
+ }
+ }
+ },
+ "spi1": {
+ "baseAddress": "0x10024000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi1": {
+ "description": "SPI1 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm1": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10025000",
+ "groupName": "pwm",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm1cmp0": {
+ "description": "PWM1 Compare 0 Interrupt",
+ "value": "44"
+ },
+ "pwm1cmp1": {
+ "description": "PWM1 Compare 1 Interrupt",
+ "value": "45"
+ },
+ "pwm1cmp2": {
+ "description": "PWM1 Compare 2 Interrupt",
+ "value": "46"
+ },
+ "pwm1cmp3": {
+ "description": "PWM1 Compare 3 Interrupt",
+ "value": "47"
+ }
+ }
+ },
+ "spi2": {
+ "baseAddress": "0x10034000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi2": {
+ "description": "SPI2 Interrupt",
+ "value": "7"
+ }
+ }
+ },
+ "pwm2": {
+ "baseAddress": "0x10035000",
+ "derivedFrom": "pwm1",
+ "groupName": "pwm",
+ "interrupts": {
+ "pwm2cmp0": {
+ "description": "PWM2 Compare 0 Interrupt",
+ "value": "48"
+ },
+ "pwm2cmp1": {
+ "description": "PWM2 Compare 1 Interrupt",
+ "value": "49"
+ },
+ "pwm2cmp2": {
+ "description": "PWM2 Compare 2 Interrupt",
+ "value": "50"
+ },
+ "pwm2cmp3": {
+ "description": "PWM2 Compare 3 Interrupt",
+ "value": "51"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/HiFive1/dhrystone/sifive-freedom-e300-hifive1.cfg b/FreedomStudio/HiFive1/dhrystone/sifive-freedom-e300-hifive1.cfg
new file mode 100644
index 0000000..b0a8e26
--- /dev/null
+++ b/FreedomStudio/HiFive1/dhrystone/sifive-freedom-e300-hifive1.cfg
@@ -0,0 +1,34 @@
+adapter_khz 10000
+
+interface ftdi
+ftdi_device_desc "Dual RS232-HS"
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_layout_init 0x0008 0x001b
+ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+
+#Reset Stretcher logic on FE310 is ~1 second long
+#This doesn't apply if you use
+# ftdi_set_signal, but still good to document
+#adapter_nsrst_delay 1500
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
+init
+#reset -- This type of reset is not implemented yet
+if {[ info exists pulse_srst]} {
+ ftdi_set_signal nSRST 0
+ ftdi_set_signal nSRST z
+ #Wait for the reset stretcher
+ #It will work without this, but
+ #will incur lots of delays for later commands.
+ sleep 1500
+}
+halt
+flash protect 0 64 last off
diff --git a/FreedomStudio/HiFive1/hello/.cproject b/FreedomStudio/HiFive1/hello/.cproject
index 5e1d11f..6fab261 100644
--- a/FreedomStudio/HiFive1/hello/.cproject
+++ b/FreedomStudio/HiFive1/hello/.cproject
@@ -48,10 +48,6 @@
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1472778604" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.874608690" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths.545620458" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../bsp/include"/>
- <listOptionValue builtIn="false" value="../bsp/drivers"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/include"/>
<listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
@@ -62,10 +58,6 @@
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1632260763" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1464742435" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/drivers"/>
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../bsp/include"/>
<listOptionValue builtIn="false" value="../../../../bsp/drivers"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
@@ -81,16 +73,15 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.2092172057" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.1930877742" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
<listOptionValue builtIn="false" value="c"/>
- <listOptionValue builtIn="false" value="wrap-hifive1"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.1748443680" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts -Wl,--wrap=_malloc -Wl,--wrap=_free -Wl,--wrap=_open -Wl,--wrap=_lseek -Wl,--wrap=_read -Wl,--wrap=_write -Wl,--wrap=_fstat -Wl,--wrap=_stat -Wl,--wrap=_close -Wl,--wrap=_link -Wl,--wrap=_unlink -Wl,--wrap=_execve -Wl,--wrap=_fork -Wl,--wrap=_getpid -Wl,--wrap=_kill -Wl,--wrap=_wait -Wl,--wrap=_isatty -Wl,--wrap=_times -Wl,--wrap=_sbrk -Wl,--wrap=__exit -Wl,--wrap=_puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.1340277823" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
- <listOptionValue builtIn="false" value="../../wrap-hifive1/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.535033372" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/freedom-e300-hifive1/flash.lds}&quot;"/>
</option>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.221590263" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.170776044" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
diff --git a/FreedomStudio/HiFive1/hello/.project b/FreedomStudio/HiFive1/hello/.project
index 2c4b969..8a86c16 100644
--- a/FreedomStudio/HiFive1/hello/.project
+++ b/FreedomStudio/HiFive1/hello/.project
@@ -35,11 +35,6 @@
<locationURI>PARENT-3-PROJECT_LOC/software/hello/hello.c</locationURI>
</link>
<link>
- <name>bsp/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/.DS_Store</locationURI>
- </link>
- <link>
<name>bsp/drivers</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
@@ -55,19 +50,19 @@
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/drivers/fe300prci</name>
+ <name>bsp/libwrap</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/drivers/plic</name>
+ <name>bsp/drivers/fe300prci</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/env/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/env/.DS_Store</locationURI>
+ <name>bsp/drivers/plic</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>bsp/env/encoding.h</name>
@@ -95,12 +90,22 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
</link>
<link>
- <name>bsp/include/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/include/.DS_Store</locationURI>
+ <name>bsp/include/sifive</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/include/sifive</name>
+ <name>bsp/libwrap/misc</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
@@ -125,6 +130,11 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI>
</link>
<link>
+ <name>bsp/env/freedom-e300-hifive1/dhrystone.lds</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/dhrystone.lds</locationURI>
+ </link>
+ <link>
<name>bsp/env/freedom-e300-hifive1/flash.lds</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/flash.lds</locationURI>
@@ -170,6 +180,126 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
</link>
<link>
+ <name>bsp/libwrap/misc/write_hex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib/malloc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/_exit.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/close.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/execve.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fork.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fstat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/getpid.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/isatty.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/kill.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/link.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/lseek.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/open.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/openat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/puts.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/read.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/sbrk.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stub.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/times.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/unlink.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/wait.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/weak_under_alias.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/write.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+ </link>
+ <link>
<name>bsp/include/sifive/devices/aon.h</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
diff --git a/FreedomStudio/HiFive1/hello/fe310-xsvd.json b/FreedomStudio/HiFive1/hello/fe310-xsvd.json
new file mode 100644
index 0000000..1722e54
--- /dev/null
+++ b/FreedomStudio/HiFive1/hello/fe310-xsvd.json
@@ -0,0 +1,2325 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "fe310": {
+ "displayName": "Freedom E310-G000",
+ "description": "The FE310-G000 is the first Freedom E300 SoC, and is the industry's first commercially available RISC-V SoC. The FE310-G000 is built around the E31 Core Complex instantiated in the Freedom E300 platform.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_FE310_",
+ "headerTypePrefix": "sifive_fe310_",
+ "headerInterruptPrefix": "sifive_fe310_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "51",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ }
+ },
+ "numLocalInterrupts": "0"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "52",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "2",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "2",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "wdog": {
+ "description": "Watchdog Timer (WDT), part of Always-On Domain",
+ "baseAddress": "0x10000000",
+ "size": "0x0040",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Watchdog Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "Watchdog counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "rsten": {
+ "description": "Watchdog full reset enable",
+ "bitOffset": "8",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "zerocmp": {
+ "description": "Watchdog zero on comparator",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Watchdog enable counter always",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "encoreawake": {
+ "description": "Watchdog counter only when awake",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "Watchdog interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Watchdog Count Register",
+ "addressOffset": "0x0008"
+ },
+ "scale": {
+ "description": "Watchdog Scale Register",
+ "addressOffset": "0x0010",
+ "fields": {
+ "value": {
+ "description": "Watchdog scale value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "feed": {
+ "description": "Watchdog Feed Address Register",
+ "addressOffset": "0x0018"
+ },
+ "key": {
+ "description": "Watchdog Key Register",
+ "addressOffset": "0x001C"
+ },
+ "cmp": {
+ "description": "Watchdog Compare Register",
+ "addressOffset": "0x0020",
+ "fields": {
+ "value": {
+ "description": "Watchdog compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "wdogcmp": {
+ "description": "Watchdog Compare Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "rtc": {
+ "description": "Real-Time Clock (RTC), part of Always-On Domain",
+ "baseAddress": "0x10000040",
+ "size": "0x0030",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "RTC Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "RTC clock rate scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "enalways": {
+ "description": "RTC counter enable",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "RTC comparator interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "low": {
+ "description": "RTC Counter Register Low",
+ "addressOffset": "0x0008"
+ },
+ "high": {
+ "description": "RTC Counter Register High",
+ "addressOffset": "0x000C",
+ "fields": {
+ "value": {
+ "description": "RTC counter register, high bits",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "scale": {
+ "description": "RTC Scale Register",
+ "addressOffset": "0x0010"
+ },
+ "cmp": {
+ "description": "RTC Compare Register",
+ "addressOffset": "0x0020"
+ }
+ },
+ "interrupts": {
+ "rtccmp": {
+ "description": "RTC Compare Interrupt",
+ "value": "2"
+ }
+ }
+ },
+ "pmu": {
+ "description": "Power-Management Unit (PMU), part of Always-On Domain",
+ "baseAddress": "0x10000100",
+ "size": "0x0050",
+ "resetMask": "none",
+ "registers": {
+ "wakeupi": {
+ "description": "Wakeup program instruction Registers",
+ "addressOffset": "0x0000",
+ "arraySize": "8"
+ },
+ "sleepi": {
+ "description": "Sleep Program Instruction Registers",
+ "addressOffset": "0x0020",
+ "arraySize": "8"
+ },
+ "ie": {
+ "description": "PMU Interrupt Enables Register",
+ "addressOffset": "0x0040",
+ "fields": {
+ "rtc": {
+ "description": "RTC Comparator active",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ },
+ "dwakeup": {
+ "description": "dwakeup_n pin active",
+ "bitOffset": "2",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "cause": {
+ "description": "PMU Wakeup Cause Register",
+ "addressOffset": "0x0044",
+ "fields": {
+ "wakeupcause": {
+ "description": "Wakeup cause",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "wakeupcause-enum": {
+ "description": "Wakeup Cause Values Enumeration",
+ "values": {
+ "0": {
+ "displayName": "reset",
+ "description": "Reset Wakeup"
+ },
+ "1": {
+ "displayName": "rtc",
+ "description": "RTC Wakeup"
+ },
+ "2": {
+ "displayName": "dwakeup",
+ "description": "Digital input Wakeup"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ },
+ "resetcause": {
+ "description": "Reset cause",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "resetcause-enum": {
+ "description": "Reset Cause Values Enumeration",
+ "values": {
+ "1": {
+ "displayName": "external",
+ "description": "External reset"
+ },
+ "2": {
+ "displayName": "watchdog",
+ "description": "Watchdog timer reset"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "sleep": {
+ "description": "PMU Initiate Sleep Sequence Register",
+ "addressOffset": "0x0048"
+ },
+ "key": {
+ "description": "PMU Key Register",
+ "addressOffset": "0x004C"
+ }
+ }
+ },
+ "aon": {
+ "description": "Always-On (AON) Domain",
+ "baseAddress": "0x10000070",
+ "size": "0x0090",
+ "resetMask": "none",
+ "registers": {
+ "lfrosccfg": {
+ "description": "Internal Programmable Low-Frequency Ring Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "LFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "LFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "LFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "LFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "backup": {
+ "description": "Backup Registers",
+ "addressOffset": "0x0010",
+ "arraySize": "32"
+ }
+ }
+ },
+ "prci": {
+ "description": "Power, Reset, Clock, Interrupt (PRCI) Peripheral",
+ "baseAddress": "0x10008000",
+ "size": "0x8000",
+ "registers": {
+ "hfrosccfg": {
+ "description": "Internal Trimmable Programmable 72 MHz Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "HFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "HFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "HFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "hfxosccfg": {
+ "description": "External 16 MHz Crystal Oscillator Register",
+ "addressOffset": "0x0004",
+ "fields": {
+ "en": {
+ "description": "HFXOSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFXOSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "pllcfg": {
+ "description": "Internal High-Frequency PLL (HFPLL) Register",
+ "addressOffset": "0x0008",
+ "fields": {
+ "r": {
+ "description": "PLL R input divider value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "pllr-enum": {
+ "description": "Reference Clock R Divide Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "/1",
+ "headerName": "div1",
+ "description": "Unchanged"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/3",
+ "headerName": "div3",
+ "description": "Divided by 3"
+ },
+ "3": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ }
+ }
+ }
+ }
+ },
+ "f": {
+ "description": "PLL F multiplier value",
+ "bitOffset": "4",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x1F",
+ "enumerations": {
+ "pllf-enum": {
+ "description": "Reference Clock F Multiplier Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "*2",
+ "headerName": "mul2",
+ "description": "Multiplied by 2"
+ },
+ "1": {
+ "displayName": "*4",
+ "headerName": "mul4",
+ "description": "Multiplied by 4"
+ },
+ "2": {
+ "displayName": "*6",
+ "headerName": "mul6",
+ "description": "Multiplied by 6"
+ },
+ "3": {
+ "displayName": "*8",
+ "headerName": "mul8",
+ "description": "Multiplied by 8"
+ },
+ "4": {
+ "displayName": "*10",
+ "headerName": "mul10",
+ "description": "Multiplied by 10"
+ },
+ "5": {
+ "displayName": "*12",
+ "headerName": "mul12",
+ "description": "Multiplied by 12"
+ },
+ "6": {
+ "displayName": "*14",
+ "headerName": "mul14",
+ "description": "Multiplied by 14"
+ },
+ "7": {
+ "displayName": "*16",
+ "headerName": "mul16",
+ "description": "Multiplied by 16"
+ },
+ "8": {
+ "displayName": "*18",
+ "headerName": "mul18",
+ "description": "Multiplied by 18"
+ },
+ "9": {
+ "displayName": "*20",
+ "headerName": "mul20",
+ "description": "Multiplied by 20"
+ },
+ "10": {
+ "displayName": "*22",
+ "headerName": "mul22",
+ "description": "Multiplied by 22"
+ },
+ "11": {
+ "displayName": "*24",
+ "headerName": "mul24",
+ "description": "Multiplied by 24"
+ },
+ "12": {
+ "displayName": "*26",
+ "headerName": "mul26",
+ "description": "Multiplied by 26"
+ },
+ "13": {
+ "displayName": "*28",
+ "headerName": "mul28",
+ "description": "Multiplied by 28"
+ },
+ "14": {
+ "displayName": "*30",
+ "headerName": "mul30",
+ "description": "Multiplied by 30"
+ },
+ "15": {
+ "displayName": "*32",
+ "headerName": "mul32",
+ "description": "Multiplied by 32"
+ },
+ "16": {
+ "displayName": "*34",
+ "headerName": "mul34",
+ "description": "Multiplied by 34"
+ },
+ "17": {
+ "displayName": "*36",
+ "headerName": "mul36",
+ "description": "Multiplied by 36"
+ },
+ "18": {
+ "displayName": "*38",
+ "headerName": "mul38",
+ "description": "Multiplied by 38"
+ },
+ "19": {
+ "displayName": "*40",
+ "headerName": "mul40",
+ "description": "Multiplied by 40"
+ },
+ "20": {
+ "displayName": "*42",
+ "headerName": "mul42",
+ "description": "Multiplied by 42"
+ },
+ "21": {
+ "displayName": "*44",
+ "headerName": "mul44",
+ "description": "Multiplied by 44"
+ },
+ "22": {
+ "displayName": "*46",
+ "headerName": "mul46",
+ "description": "Multiplied by 46"
+ },
+ "23": {
+ "displayName": "*48",
+ "headerName": "mul48",
+ "description": "Multiplied by 48"
+ },
+ "24": {
+ "displayName": "*50",
+ "headerName": "mul50",
+ "description": "Multiplied by 50"
+ },
+ "25": {
+ "displayName": "*52",
+ "headerName": "mul52",
+ "description": "Multiplied by 52"
+ },
+ "26": {
+ "displayName": "*54",
+ "headerName": "mul54",
+ "description": "Multiplied by 54"
+ },
+ "27": {
+ "displayName": "*56",
+ "headerName": "mul56",
+ "description": "Multiplied by 56"
+ },
+ "28": {
+ "displayName": "*58",
+ "headerName": "mul58",
+ "description": "Multiplied by 58"
+ },
+ "29": {
+ "displayName": "*60",
+ "headerName": "mul60",
+ "description": "Multiplied by 60"
+ },
+ "30": {
+ "displayName": "*62",
+ "headerName": "mul62",
+ "description": "Multiplied by 62"
+ },
+ "31": {
+ "displayName": "*64",
+ "headerName": "mul64",
+ "description": "Multiplied by 64"
+ },
+ "32": {
+ "displayName": "*66",
+ "headerName": "mul66",
+ "description": "Multiplied by 66"
+ },
+ "33": {
+ "displayName": "*68",
+ "headerName": "mul68",
+ "description": "Multiplied by 68"
+ },
+ "34": {
+ "displayName": "*70",
+ "headerName": "mul70",
+ "description": "Multiplied by 70"
+ },
+ "35": {
+ "displayName": "*72",
+ "headerName": "mul72",
+ "description": "Multiplied by 72"
+ },
+ "36": {
+ "displayName": "*74",
+ "headerName": "mul74",
+ "description": "Multiplied by 74"
+ },
+ "37": {
+ "displayName": "*76",
+ "headerName": "mul76",
+ "description": "Multiplied by 76"
+ },
+ "38": {
+ "displayName": "*78",
+ "headerName": "mul78",
+ "description": "Multiplied by 78"
+ },
+ "39": {
+ "displayName": "*80",
+ "headerName": "mul80",
+ "description": "Multiplied by 80"
+ },
+ "40": {
+ "displayName": "*82",
+ "headerName": "mul82",
+ "description": "Multiplied by 82"
+ },
+ "41": {
+ "displayName": "*84",
+ "headerName": "mul84",
+ "description": "Multiplied by 84"
+ },
+ "42": {
+ "displayName": "*86",
+ "headerName": "mul86",
+ "description": "Multiplied by 86"
+ },
+ "43": {
+ "displayName": "*88",
+ "headerName": "mul88",
+ "description": "Multiplied by 88"
+ },
+ "44": {
+ "displayName": "*90",
+ "headerName": "mul90",
+ "description": "Multiplied by 90"
+ },
+ "45": {
+ "displayName": "*92",
+ "headerName": "mul92",
+ "description": "Multiplied by 92"
+ },
+ "46": {
+ "displayName": "*94",
+ "headerName": "mul94",
+ "description": "Multiplied by 94"
+ },
+ "47": {
+ "displayName": "*96",
+ "headerName": "mul96",
+ "description": "Multiplied by 96"
+ },
+ "48": {
+ "displayName": "*98",
+ "headerName": "mul98",
+ "description": "Multiplied by 98"
+ },
+ "49": {
+ "displayName": "*100",
+ "headerName": "mul100",
+ "description": "Multiplied by 100"
+ },
+ "50": {
+ "displayName": "*102",
+ "headerName": "mul102",
+ "description": "Multiplied by 102"
+ },
+ "51": {
+ "displayName": "*104",
+ "headerName": "mul104",
+ "description": "Multiplied by 104"
+ },
+ "52": {
+ "displayName": "*106",
+ "headerName": "mul106",
+ "description": "Multiplied by 106"
+ },
+ "53": {
+ "displayName": "*108",
+ "headerName": "mul108",
+ "description": "Multiplied by 108"
+ },
+ "54": {
+ "displayName": "*110",
+ "headerName": "mul110",
+ "description": "Multiplied by 110"
+ },
+ "55": {
+ "displayName": "*112",
+ "headerName": "mul112",
+ "description": "Multiplied by 112"
+ },
+ "56": {
+ "displayName": "*114",
+ "headerName": "mul114",
+ "description": "Multiplied by 114"
+ },
+ "57": {
+ "displayName": "*116",
+ "headerName": "mul116",
+ "description": "Multiplied by 116"
+ },
+ "58": {
+ "displayName": "*118",
+ "headerName": "mul118",
+ "description": "Multiplied by 118"
+ },
+ "59": {
+ "displayName": "*120",
+ "headerName": "mul120",
+ "description": "Multiplied by 120"
+ },
+ "60": {
+ "displayName": "*122",
+ "headerName": "mul122",
+ "description": "Multiplied by 122"
+ },
+ "61": {
+ "displayName": "*124",
+ "headerName": "mul124",
+ "description": "Multiplied by 124"
+ },
+ "62": {
+ "displayName": "*126",
+ "headerName": "mul126",
+ "description": "Multiplied by 126"
+ },
+ "63": {
+ "displayName": "*128",
+ "headerName": "mul128",
+ "description": "Multiplied by 128"
+ }
+ }
+ }
+ }
+ },
+ "q": {
+ "description": "PLL Q output divider value",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x3",
+ "enumerations": {
+ "pllq-enum": {
+ "description": "Reference Clock Q Divide Ratio Enumeration",
+ "values": {
+ "*": {
+ "displayName": "n/a",
+ "description": "Not supported"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ },
+ "3": {
+ "displayName": "/8",
+ "headerName": "div8",
+ "description": "Divided by 8"
+ }
+ }
+ }
+ }
+ },
+ "sel": {
+ "description": "PLL select",
+ "bitOffset": "16",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "refsel": {
+ "description": "PLL reference select",
+ "bitOffset": "17",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "bypass": {
+ "description": "PLL bypass",
+ "bitOffset": "18",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "lock": {
+ "description": "PLL lock indicator",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "plloutdiv": {
+ "description": "PLL Output Divider",
+ "addressOffset": "0x000C"
+ }
+ }
+ },
+ "otp": {
+ "description": "One-Time Programmable Memory (OTP) Peripheral",
+ "baseAddress": "0x10010000",
+ "size": "0x1000",
+ "registers": {
+ "lock": {
+ "description": "Programmed-I/O Lock Register",
+ "addressOffset": "0x0000"
+ },
+ "ck": {
+ "description": "Device Clock Signal Register",
+ "addressOffset": "0x0004"
+ },
+ "oe": {
+ "description": "Device Output-Enable Signal Register",
+ "addressOffset": "0x0008"
+ },
+ "sel": {
+ "description": "Device Chip-Select Signal Register",
+ "addressOffset": "0x000C"
+ },
+ "we": {
+ "description": "Device Write-Enable Signal Register",
+ "addressOffset": "0x0010"
+ },
+ "mr": {
+ "description": "Device Mode Register",
+ "addressOffset": "0x0014"
+ },
+ "mrr": {
+ "description": "Read-Voltage Regulator Control Register",
+ "addressOffset": "0x0018"
+ },
+ "mpp": {
+ "description": "Write-Voltage Charge Pump Control Register",
+ "addressOffset": "0x001C"
+ },
+ "vrren": {
+ "description": "Read-Voltage Enable Register",
+ "addressOffset": "0x0020"
+ },
+ "vppen": {
+ "description": "Write-Voltage Enable Register",
+ "addressOffset": "0x0024"
+ },
+ "a": {
+ "description": "Device Address Register",
+ "addressOffset": "0x0028"
+ },
+ "d": {
+ "description": "Device Data Input Register",
+ "addressOffset": "0x002C"
+ },
+ "q": {
+ "description": "Device Data Output Register",
+ "addressOffset": "0x0030"
+ },
+ "rsctrl": {
+ "description": "Read Sequencer Control Register",
+ "addressOffset": "0x0034",
+ "fields": {
+ "scale": {
+ "description": "OTP timescale",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "tas": {
+ "description": "Address setup time",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "trp": {
+ "description": "Read pulse time",
+ "bitOffset": "4",
+ "bitWidth": "1"
+ },
+ "tracc": {
+ "description": "Read access time",
+ "bitOffset": "5",
+ "bitWidth": "1"
+ }
+ }
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x10012000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "8"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "9"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "10"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "11"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "12"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "13"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "14"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "15"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "16"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "17"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "18"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "19"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "20"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "21"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "22"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "23"
+ },
+ "gpio16": {
+ "description": "GPIO16 Interrupt",
+ "value": "24"
+ },
+ "gpio17": {
+ "description": "GPIO17 Interrupt",
+ "value": "25"
+ },
+ "gpio18": {
+ "description": "GPIO18 Interrupt",
+ "value": "26"
+ },
+ "gpio19": {
+ "description": "GPIO19 Interrupt",
+ "value": "27"
+ },
+ "gpio20": {
+ "description": "GPIO20 Interrupt",
+ "value": "28"
+ },
+ "gpio21": {
+ "description": "GPIO21 Interrupt",
+ "value": "29"
+ },
+ "gpio22": {
+ "description": "GPIO22 Interrupt",
+ "value": "30"
+ },
+ "gpio23": {
+ "description": "GPIO23 Interrupt",
+ "value": "31"
+ },
+ "gpio24": {
+ "description": "GPIO24 Interrupt",
+ "value": "32"
+ },
+ "gpio25": {
+ "description": "GPIO25 Interrupt",
+ "value": "33"
+ },
+ "gpio26": {
+ "description": "GPIO26 Interrupt",
+ "value": "34"
+ },
+ "gpio27": {
+ "description": "GPIO27 Interrupt",
+ "value": "35"
+ },
+ "gpio28": {
+ "description": "GPIO28 Interrupt",
+ "value": "36"
+ },
+ "gpio29": {
+ "description": "GPIO29 Interrupt",
+ "value": "37"
+ },
+ "gpio30": {
+ "description": "GPIO30 Interrupt",
+ "value": "38"
+ },
+ "gpio31": {
+ "description": "GPIO31 Interrupt",
+ "value": "39"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x10013000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "3"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x10014000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10015000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "40"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "41"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "42"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "43"
+ }
+ }
+ },
+ "uart1": {
+ "baseAddress": "0x10023000",
+ "derivedFrom": "uart0",
+ "groupName": "uart",
+ "interrupts": {
+ "uart1": {
+ "description": "UART1 Interrupt",
+ "value": "4"
+ }
+ }
+ },
+ "spi1": {
+ "baseAddress": "0x10024000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi1": {
+ "description": "SPI1 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm1": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10025000",
+ "groupName": "pwm",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm1cmp0": {
+ "description": "PWM1 Compare 0 Interrupt",
+ "value": "44"
+ },
+ "pwm1cmp1": {
+ "description": "PWM1 Compare 1 Interrupt",
+ "value": "45"
+ },
+ "pwm1cmp2": {
+ "description": "PWM1 Compare 2 Interrupt",
+ "value": "46"
+ },
+ "pwm1cmp3": {
+ "description": "PWM1 Compare 3 Interrupt",
+ "value": "47"
+ }
+ }
+ },
+ "spi2": {
+ "baseAddress": "0x10034000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi2": {
+ "description": "SPI2 Interrupt",
+ "value": "7"
+ }
+ }
+ },
+ "pwm2": {
+ "baseAddress": "0x10035000",
+ "derivedFrom": "pwm1",
+ "groupName": "pwm",
+ "interrupts": {
+ "pwm2cmp0": {
+ "description": "PWM2 Compare 0 Interrupt",
+ "value": "48"
+ },
+ "pwm2cmp1": {
+ "description": "PWM2 Compare 1 Interrupt",
+ "value": "49"
+ },
+ "pwm2cmp2": {
+ "description": "PWM2 Compare 2 Interrupt",
+ "value": "50"
+ },
+ "pwm2cmp3": {
+ "description": "PWM2 Compare 3 Interrupt",
+ "value": "51"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/HiFive1/hello/hello Debug.launch b/FreedomStudio/HiFive1/hello/hello OpenOCD.launch
index 6b567b6..55bd731 100644
--- a/FreedomStudio/HiFive1/hello/hello Debug.launch
+++ b/FreedomStudio/HiFive1/hello/hello OpenOCD.launch
@@ -20,6 +20,7 @@
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/fe310-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
diff --git a/FreedomStudio/HiFive1/led_fade/.cproject b/FreedomStudio/HiFive1/led_fade/.cproject
index 5e9a079..e0d1e09 100644
--- a/FreedomStudio/HiFive1/led_fade/.cproject
+++ b/FreedomStudio/HiFive1/led_fade/.cproject
@@ -48,10 +48,6 @@
<tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} -c ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1472778604" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.874608690" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths.545620458" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/include"/>
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../bsp/drivers"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/include"/>
<listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
@@ -62,10 +58,6 @@
</tool>
<tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} -c ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1632260763" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1464742435" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/drivers"/>
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../bsp/include"/>
<listOptionValue builtIn="false" value="../../../../bsp/drivers"/>
<listOptionValue builtIn="false" value="../../../../bsp/env"/>
<listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
@@ -83,11 +75,9 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.2092172057" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.1930877742" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
<listOptionValue builtIn="false" value="c"/>
- <listOptionValue builtIn="false" value="wrap-hifive1"/>
</option>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.1748443680" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit" valueType="string"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts -Wl,--wrap=_malloc -Wl,--wrap=_free -Wl,--wrap=_open -Wl,--wrap=_lseek -Wl,--wrap=_read -Wl,--wrap=_write -Wl,--wrap=_fstat -Wl,--wrap=_stat -Wl,--wrap=_close -Wl,--wrap=_link -Wl,--wrap=_unlink -Wl,--wrap=_execve -Wl,--wrap=_fork -Wl,--wrap=_getpid -Wl,--wrap=_kill -Wl,--wrap=_wait -Wl,--wrap=_isatty -Wl,--wrap=_times -Wl,--wrap=_sbrk -Wl,--wrap=__exit -Wl,--wrap=_puts" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.1340277823" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
- <listOptionValue builtIn="false" value="../../wrap-hifive1/Debug"/>
<listOptionValue builtIn="false" value="../"/>
</option>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.535033372" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
@@ -100,6 +90,7 @@
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.151100904" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.2013052941" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+ <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.221590263" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.735073113" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
<tool command="${cross_prefix}${cross_objcopy}${cross_suffix}" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT}" errorParsers="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.43162503" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
diff --git a/FreedomStudio/HiFive1/led_fade/.project b/FreedomStudio/HiFive1/led_fade/.project
index 5b42c38..f915b0d 100644
--- a/FreedomStudio/HiFive1/led_fade/.project
+++ b/FreedomStudio/HiFive1/led_fade/.project
@@ -35,11 +35,6 @@
<locationURI>PARENT-3-PROJECT_LOC/software/led_fade/led_fade.c</locationURI>
</link>
<link>
- <name>bsp/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/.DS_Store</locationURI>
- </link>
- <link>
<name>bsp/drivers</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
@@ -55,19 +50,19 @@
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/drivers/fe300prci</name>
+ <name>bsp/libwrap</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/drivers/plic</name>
+ <name>bsp/drivers/fe300prci</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/env/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/env/.DS_Store</locationURI>
+ <name>bsp/drivers/plic</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>bsp/env/encoding.h</name>
@@ -95,12 +90,22 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
</link>
<link>
- <name>bsp/include/.DS_Store</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/include/.DS_Store</locationURI>
+ <name>bsp/include/sifive</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
</link>
<link>
- <name>bsp/include/sifive</name>
+ <name>bsp/libwrap/misc</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib</name>
+ <type>2</type>
+ <locationURI>virtual:/virtual</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
@@ -125,6 +130,11 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h</locationURI>
</link>
<link>
+ <name>bsp/env/freedom-e300-hifive1/dhrystone.lds</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/dhrystone.lds</locationURI>
+ </link>
+ <link>
<name>bsp/env/freedom-e300-hifive1/flash.lds</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/env/freedom-e300-hifive1/flash.lds</locationURI>
@@ -170,6 +180,126 @@
<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
</link>
<link>
+ <name>bsp/libwrap/misc/write_hex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/stdlib/malloc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/_exit.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/close.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/execve.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fork.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/fstat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/getpid.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/isatty.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/kill.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/link.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/lseek.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/open.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/openat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/puts.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/read.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/sbrk.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stat.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/stub.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/times.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/unlink.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/wait.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/weak_under_alias.h</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+ </link>
+ <link>
+ <name>bsp/libwrap/sys/write.c</name>
+ <type>1</type>
+ <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+ </link>
+ <link>
<name>bsp/include/sifive/devices/aon.h</name>
<type>1</type>
<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
diff --git a/FreedomStudio/HiFive1/led_fade/fe310-xsvd.json b/FreedomStudio/HiFive1/led_fade/fe310-xsvd.json
new file mode 100644
index 0000000..1722e54
--- /dev/null
+++ b/FreedomStudio/HiFive1/led_fade/fe310-xsvd.json
@@ -0,0 +1,2325 @@
+{
+ "schemaVersion": "0.2.4",
+ "contentVersion": "0.2.0",
+ "headerVersion": "0.2.0",
+ "device": {
+ "fe310": {
+ "displayName": "Freedom E310-G000",
+ "description": "The FE310-G000 is the first Freedom E300 SoC, and is the industry's first commercially available RISC-V SoC. The FE310-G000 is built around the E31 Core Complex instantiated in the Freedom E300 platform.",
+ "supplier": {
+ "name": "sifive",
+ "id": "1",
+ "displayName": "SiFive",
+ "fullName": "SiFive, Inc.",
+ "contact": "info@sifive.com"
+ },
+ "busWidth": "32",
+ "resetMask": "all",
+ "resetValue": "0x00000000",
+ "access": "rw",
+ "headerGuardPrefix": "SIFIVE_DEVICES_FE310_",
+ "headerTypePrefix": "sifive_fe310_",
+ "headerInterruptPrefix": "sifive_fe310_interrupt_global_",
+ "headerInterruptEnumPrefix": "riscv_interrupts_global_",
+ "revision": "r0p0",
+ "numInterrupts": "51",
+ "priorityBits": "3",
+ "regWidth": "32",
+ "cores": {
+ "e31": {
+ "harts": "1",
+ "isa": "RV32IMAC",
+ "isaVersion": "2.2",
+ "mpu": "pmp",
+ "mmu": "none",
+ "localInterrupts": {
+ "machine_software": {
+ "description": "Machine Software Interrupt",
+ "value": "3"
+ },
+ "machine_timer": {
+ "description": "Machine Timer Interrupt",
+ "value": "7"
+ },
+ "machine_ext": {
+ "description": "Machine External Interrupt",
+ "value": "11"
+ }
+ },
+ "numLocalInterrupts": "0"
+ }
+ },
+ "peripherals": {
+ "clint": {
+ "description": "Core Complex Local Interruptor (CLINT) Peripheral",
+ "baseAddress": "0x02000000",
+ "size": "0x10000",
+ "registers": {
+ "msip": {
+ "description": "MSIP (Machine-mode Software Interrupts) Register per Hart",
+ "addressOffset": "0x0000",
+ "arraySize": "1"
+ }
+ },
+ "clusters": {
+ "mtimecmp": {
+ "description": "Machine Time Compare Registers per Hart",
+ "addressOffset": "0x4000",
+ "arraySize": "1",
+ "registers": {
+ "low": {
+ "description": "Machine Compare Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Compare Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ },
+ "mtime": {
+ "description": "Machine Time Register",
+ "addressOffset": "0xBFF8",
+ "access": "r",
+ "registers": {
+ "low": {
+ "description": "Machine Time Register Low",
+ "addressOffset": "0x0000"
+ },
+ "high": {
+ "description": "Machine Time Register High",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ },
+ "plic": {
+ "description": "Platform-Level Interrupt Controller (PLIC) Peripheral",
+ "baseAddress": "0x0C000000",
+ "size": "0x4000000",
+ "registers": {
+ "priorities": {
+ "arraySize": "52",
+ "description": "Interrupt Priorities Registers; 0 is reserved.",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority for a given global interrupt",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "pendings": {
+ "arraySize": "2",
+ "description": "Interrupt Pending Bits Registers",
+ "addressOffset": "0x1000",
+ "access": "r"
+ }
+ },
+ "clusters": {
+ "enablestarget0": {
+ "description": "Hart 0 Interrupt Enable Bits",
+ "addressOffset": "0x00002000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-mode Interrupt Enable Bits",
+ "registers": {
+ "enables": {
+ "arraySize": "2",
+ "description": "Interrupt Enable Bits Registers",
+ "addressOffset": "0x0000"
+ }
+ }
+ }
+ }
+ },
+ "target0": {
+ "description": "Hart 0 Interrupt Thresholds",
+ "addressOffset": "0x00200000",
+ "clusters": {
+ "m": {
+ "addressOffset": "0x0000",
+ "description": "Hart 0 M-Mode Interrupt Threshold",
+ "registers": {
+ "threshold": {
+ "description": "The Priority Threshold Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "value": {
+ "description": "The priority threshold value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "claimcomplete": {
+ "description": "The Interrupt Claim/Completion Register",
+ "addressOffset": "0x0004"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "wdog": {
+ "description": "Watchdog Timer (WDT), part of Always-On Domain",
+ "baseAddress": "0x10000000",
+ "size": "0x0040",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Watchdog Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "Watchdog counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "rsten": {
+ "description": "Watchdog full reset enable",
+ "bitOffset": "8",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "zerocmp": {
+ "description": "Watchdog zero on comparator",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Watchdog enable counter always",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "encoreawake": {
+ "description": "Watchdog counter only when awake",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "Watchdog interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Watchdog Count Register",
+ "addressOffset": "0x0008"
+ },
+ "scale": {
+ "description": "Watchdog Scale Register",
+ "addressOffset": "0x0010",
+ "fields": {
+ "value": {
+ "description": "Watchdog scale value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "feed": {
+ "description": "Watchdog Feed Address Register",
+ "addressOffset": "0x0018"
+ },
+ "key": {
+ "description": "Watchdog Key Register",
+ "addressOffset": "0x001C"
+ },
+ "cmp": {
+ "description": "Watchdog Compare Register",
+ "addressOffset": "0x0020",
+ "fields": {
+ "value": {
+ "description": "Watchdog compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "wdogcmp": {
+ "description": "Watchdog Compare Interrupt",
+ "value": "1"
+ }
+ }
+ },
+ "rtc": {
+ "description": "Real-Time Clock (RTC), part of Always-On Domain",
+ "baseAddress": "0x10000040",
+ "size": "0x0030",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "RTC Configuration Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "scale": {
+ "description": "RTC clock rate scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "enalways": {
+ "description": "RTC counter enable",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmpip": {
+ "description": "RTC comparator interrupt pending",
+ "bitOffset": "28",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "low": {
+ "description": "RTC Counter Register Low",
+ "addressOffset": "0x0008"
+ },
+ "high": {
+ "description": "RTC Counter Register High",
+ "addressOffset": "0x000C",
+ "fields": {
+ "value": {
+ "description": "RTC counter register, high bits",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "scale": {
+ "description": "RTC Scale Register",
+ "addressOffset": "0x0010"
+ },
+ "cmp": {
+ "description": "RTC Compare Register",
+ "addressOffset": "0x0020"
+ }
+ },
+ "interrupts": {
+ "rtccmp": {
+ "description": "RTC Compare Interrupt",
+ "value": "2"
+ }
+ }
+ },
+ "pmu": {
+ "description": "Power-Management Unit (PMU), part of Always-On Domain",
+ "baseAddress": "0x10000100",
+ "size": "0x0050",
+ "resetMask": "none",
+ "registers": {
+ "wakeupi": {
+ "description": "Wakeup program instruction Registers",
+ "addressOffset": "0x0000",
+ "arraySize": "8"
+ },
+ "sleepi": {
+ "description": "Sleep Program Instruction Registers",
+ "addressOffset": "0x0020",
+ "arraySize": "8"
+ },
+ "ie": {
+ "description": "PMU Interrupt Enables Register",
+ "addressOffset": "0x0040",
+ "fields": {
+ "rtc": {
+ "description": "RTC Comparator active",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ },
+ "dwakeup": {
+ "description": "dwakeup_n pin active",
+ "bitOffset": "2",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "cause": {
+ "description": "PMU Wakeup Cause Register",
+ "addressOffset": "0x0044",
+ "fields": {
+ "wakeupcause": {
+ "description": "Wakeup cause",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "wakeupcause-enum": {
+ "description": "Wakeup Cause Values Enumeration",
+ "values": {
+ "0": {
+ "displayName": "reset",
+ "description": "Reset Wakeup"
+ },
+ "1": {
+ "displayName": "rtc",
+ "description": "RTC Wakeup"
+ },
+ "2": {
+ "displayName": "dwakeup",
+ "description": "Digital input Wakeup"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ },
+ "resetcause": {
+ "description": "Reset cause",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "access": "r",
+ "enumerations": {
+ "resetcause-enum": {
+ "description": "Reset Cause Values Enumeration",
+ "values": {
+ "1": {
+ "displayName": "external",
+ "description": "External reset"
+ },
+ "2": {
+ "displayName": "watchdog",
+ "description": "Watchdog timer reset"
+ },
+ "*": {
+ "displayName": "undefined"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "sleep": {
+ "description": "PMU Initiate Sleep Sequence Register",
+ "addressOffset": "0x0048"
+ },
+ "key": {
+ "description": "PMU Key Register",
+ "addressOffset": "0x004C"
+ }
+ }
+ },
+ "aon": {
+ "description": "Always-On (AON) Domain",
+ "baseAddress": "0x10000070",
+ "size": "0x0090",
+ "resetMask": "none",
+ "registers": {
+ "lfrosccfg": {
+ "description": "Internal Programmable Low-Frequency Ring Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "LFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "LFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "LFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "LFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "backup": {
+ "description": "Backup Registers",
+ "addressOffset": "0x0010",
+ "arraySize": "32"
+ }
+ }
+ },
+ "prci": {
+ "description": "Power, Reset, Clock, Interrupt (PRCI) Peripheral",
+ "baseAddress": "0x10008000",
+ "size": "0x8000",
+ "registers": {
+ "hfrosccfg": {
+ "description": "Internal Trimmable Programmable 72 MHz Oscillator Register",
+ "addressOffset": "0x0000",
+ "fields": {
+ "div": {
+ "description": "HFROSC divider",
+ "bitOffset": "0",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x04"
+ },
+ "trim": {
+ "description": "HFROSC trim value",
+ "bitOffset": "16",
+ "bitWidth": "5",
+ "resetMask": "all",
+ "resetValue": "0x10"
+ },
+ "en": {
+ "description": "HFROSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFROSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "hfxosccfg": {
+ "description": "External 16 MHz Crystal Oscillator Register",
+ "addressOffset": "0x0004",
+ "fields": {
+ "en": {
+ "description": "HFXOSC enable",
+ "bitOffset": "30",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "rdy": {
+ "description": "HFXOSC ready",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "pllcfg": {
+ "description": "Internal High-Frequency PLL (HFPLL) Register",
+ "addressOffset": "0x0008",
+ "fields": {
+ "r": {
+ "description": "PLL R input divider value",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "pllr-enum": {
+ "description": "Reference Clock R Divide Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "/1",
+ "headerName": "div1",
+ "description": "Unchanged"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/3",
+ "headerName": "div3",
+ "description": "Divided by 3"
+ },
+ "3": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ }
+ }
+ }
+ }
+ },
+ "f": {
+ "description": "PLL F multiplier value",
+ "bitOffset": "4",
+ "bitWidth": "6",
+ "resetMask": "all",
+ "resetValue": "0x1F",
+ "enumerations": {
+ "pllf-enum": {
+ "description": "Reference Clock F Multiplier Ratio Enumeration",
+ "values": {
+ "0": {
+ "displayName": "*2",
+ "headerName": "mul2",
+ "description": "Multiplied by 2"
+ },
+ "1": {
+ "displayName": "*4",
+ "headerName": "mul4",
+ "description": "Multiplied by 4"
+ },
+ "2": {
+ "displayName": "*6",
+ "headerName": "mul6",
+ "description": "Multiplied by 6"
+ },
+ "3": {
+ "displayName": "*8",
+ "headerName": "mul8",
+ "description": "Multiplied by 8"
+ },
+ "4": {
+ "displayName": "*10",
+ "headerName": "mul10",
+ "description": "Multiplied by 10"
+ },
+ "5": {
+ "displayName": "*12",
+ "headerName": "mul12",
+ "description": "Multiplied by 12"
+ },
+ "6": {
+ "displayName": "*14",
+ "headerName": "mul14",
+ "description": "Multiplied by 14"
+ },
+ "7": {
+ "displayName": "*16",
+ "headerName": "mul16",
+ "description": "Multiplied by 16"
+ },
+ "8": {
+ "displayName": "*18",
+ "headerName": "mul18",
+ "description": "Multiplied by 18"
+ },
+ "9": {
+ "displayName": "*20",
+ "headerName": "mul20",
+ "description": "Multiplied by 20"
+ },
+ "10": {
+ "displayName": "*22",
+ "headerName": "mul22",
+ "description": "Multiplied by 22"
+ },
+ "11": {
+ "displayName": "*24",
+ "headerName": "mul24",
+ "description": "Multiplied by 24"
+ },
+ "12": {
+ "displayName": "*26",
+ "headerName": "mul26",
+ "description": "Multiplied by 26"
+ },
+ "13": {
+ "displayName": "*28",
+ "headerName": "mul28",
+ "description": "Multiplied by 28"
+ },
+ "14": {
+ "displayName": "*30",
+ "headerName": "mul30",
+ "description": "Multiplied by 30"
+ },
+ "15": {
+ "displayName": "*32",
+ "headerName": "mul32",
+ "description": "Multiplied by 32"
+ },
+ "16": {
+ "displayName": "*34",
+ "headerName": "mul34",
+ "description": "Multiplied by 34"
+ },
+ "17": {
+ "displayName": "*36",
+ "headerName": "mul36",
+ "description": "Multiplied by 36"
+ },
+ "18": {
+ "displayName": "*38",
+ "headerName": "mul38",
+ "description": "Multiplied by 38"
+ },
+ "19": {
+ "displayName": "*40",
+ "headerName": "mul40",
+ "description": "Multiplied by 40"
+ },
+ "20": {
+ "displayName": "*42",
+ "headerName": "mul42",
+ "description": "Multiplied by 42"
+ },
+ "21": {
+ "displayName": "*44",
+ "headerName": "mul44",
+ "description": "Multiplied by 44"
+ },
+ "22": {
+ "displayName": "*46",
+ "headerName": "mul46",
+ "description": "Multiplied by 46"
+ },
+ "23": {
+ "displayName": "*48",
+ "headerName": "mul48",
+ "description": "Multiplied by 48"
+ },
+ "24": {
+ "displayName": "*50",
+ "headerName": "mul50",
+ "description": "Multiplied by 50"
+ },
+ "25": {
+ "displayName": "*52",
+ "headerName": "mul52",
+ "description": "Multiplied by 52"
+ },
+ "26": {
+ "displayName": "*54",
+ "headerName": "mul54",
+ "description": "Multiplied by 54"
+ },
+ "27": {
+ "displayName": "*56",
+ "headerName": "mul56",
+ "description": "Multiplied by 56"
+ },
+ "28": {
+ "displayName": "*58",
+ "headerName": "mul58",
+ "description": "Multiplied by 58"
+ },
+ "29": {
+ "displayName": "*60",
+ "headerName": "mul60",
+ "description": "Multiplied by 60"
+ },
+ "30": {
+ "displayName": "*62",
+ "headerName": "mul62",
+ "description": "Multiplied by 62"
+ },
+ "31": {
+ "displayName": "*64",
+ "headerName": "mul64",
+ "description": "Multiplied by 64"
+ },
+ "32": {
+ "displayName": "*66",
+ "headerName": "mul66",
+ "description": "Multiplied by 66"
+ },
+ "33": {
+ "displayName": "*68",
+ "headerName": "mul68",
+ "description": "Multiplied by 68"
+ },
+ "34": {
+ "displayName": "*70",
+ "headerName": "mul70",
+ "description": "Multiplied by 70"
+ },
+ "35": {
+ "displayName": "*72",
+ "headerName": "mul72",
+ "description": "Multiplied by 72"
+ },
+ "36": {
+ "displayName": "*74",
+ "headerName": "mul74",
+ "description": "Multiplied by 74"
+ },
+ "37": {
+ "displayName": "*76",
+ "headerName": "mul76",
+ "description": "Multiplied by 76"
+ },
+ "38": {
+ "displayName": "*78",
+ "headerName": "mul78",
+ "description": "Multiplied by 78"
+ },
+ "39": {
+ "displayName": "*80",
+ "headerName": "mul80",
+ "description": "Multiplied by 80"
+ },
+ "40": {
+ "displayName": "*82",
+ "headerName": "mul82",
+ "description": "Multiplied by 82"
+ },
+ "41": {
+ "displayName": "*84",
+ "headerName": "mul84",
+ "description": "Multiplied by 84"
+ },
+ "42": {
+ "displayName": "*86",
+ "headerName": "mul86",
+ "description": "Multiplied by 86"
+ },
+ "43": {
+ "displayName": "*88",
+ "headerName": "mul88",
+ "description": "Multiplied by 88"
+ },
+ "44": {
+ "displayName": "*90",
+ "headerName": "mul90",
+ "description": "Multiplied by 90"
+ },
+ "45": {
+ "displayName": "*92",
+ "headerName": "mul92",
+ "description": "Multiplied by 92"
+ },
+ "46": {
+ "displayName": "*94",
+ "headerName": "mul94",
+ "description": "Multiplied by 94"
+ },
+ "47": {
+ "displayName": "*96",
+ "headerName": "mul96",
+ "description": "Multiplied by 96"
+ },
+ "48": {
+ "displayName": "*98",
+ "headerName": "mul98",
+ "description": "Multiplied by 98"
+ },
+ "49": {
+ "displayName": "*100",
+ "headerName": "mul100",
+ "description": "Multiplied by 100"
+ },
+ "50": {
+ "displayName": "*102",
+ "headerName": "mul102",
+ "description": "Multiplied by 102"
+ },
+ "51": {
+ "displayName": "*104",
+ "headerName": "mul104",
+ "description": "Multiplied by 104"
+ },
+ "52": {
+ "displayName": "*106",
+ "headerName": "mul106",
+ "description": "Multiplied by 106"
+ },
+ "53": {
+ "displayName": "*108",
+ "headerName": "mul108",
+ "description": "Multiplied by 108"
+ },
+ "54": {
+ "displayName": "*110",
+ "headerName": "mul110",
+ "description": "Multiplied by 110"
+ },
+ "55": {
+ "displayName": "*112",
+ "headerName": "mul112",
+ "description": "Multiplied by 112"
+ },
+ "56": {
+ "displayName": "*114",
+ "headerName": "mul114",
+ "description": "Multiplied by 114"
+ },
+ "57": {
+ "displayName": "*116",
+ "headerName": "mul116",
+ "description": "Multiplied by 116"
+ },
+ "58": {
+ "displayName": "*118",
+ "headerName": "mul118",
+ "description": "Multiplied by 118"
+ },
+ "59": {
+ "displayName": "*120",
+ "headerName": "mul120",
+ "description": "Multiplied by 120"
+ },
+ "60": {
+ "displayName": "*122",
+ "headerName": "mul122",
+ "description": "Multiplied by 122"
+ },
+ "61": {
+ "displayName": "*124",
+ "headerName": "mul124",
+ "description": "Multiplied by 124"
+ },
+ "62": {
+ "displayName": "*126",
+ "headerName": "mul126",
+ "description": "Multiplied by 126"
+ },
+ "63": {
+ "displayName": "*128",
+ "headerName": "mul128",
+ "description": "Multiplied by 128"
+ }
+ }
+ }
+ }
+ },
+ "q": {
+ "description": "PLL Q output divider value",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x3",
+ "enumerations": {
+ "pllq-enum": {
+ "description": "Reference Clock Q Divide Ratio Enumeration",
+ "values": {
+ "*": {
+ "displayName": "n/a",
+ "description": "Not supported"
+ },
+ "1": {
+ "displayName": "/2",
+ "headerName": "div2",
+ "description": "Divided by 2"
+ },
+ "2": {
+ "displayName": "/4",
+ "headerName": "div4",
+ "description": "Divided by 4"
+ },
+ "3": {
+ "displayName": "/8",
+ "headerName": "div8",
+ "description": "Divided by 8"
+ }
+ }
+ }
+ }
+ },
+ "sel": {
+ "description": "PLL select",
+ "bitOffset": "16",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "refsel": {
+ "description": "PLL reference select",
+ "bitOffset": "17",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "bypass": {
+ "description": "PLL bypass",
+ "bitOffset": "18",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "lock": {
+ "description": "PLL lock indicator",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "plloutdiv": {
+ "description": "PLL Output Divider",
+ "addressOffset": "0x000C"
+ }
+ }
+ },
+ "otp": {
+ "description": "One-Time Programmable Memory (OTP) Peripheral",
+ "baseAddress": "0x10010000",
+ "size": "0x1000",
+ "registers": {
+ "lock": {
+ "description": "Programmed-I/O Lock Register",
+ "addressOffset": "0x0000"
+ },
+ "ck": {
+ "description": "Device Clock Signal Register",
+ "addressOffset": "0x0004"
+ },
+ "oe": {
+ "description": "Device Output-Enable Signal Register",
+ "addressOffset": "0x0008"
+ },
+ "sel": {
+ "description": "Device Chip-Select Signal Register",
+ "addressOffset": "0x000C"
+ },
+ "we": {
+ "description": "Device Write-Enable Signal Register",
+ "addressOffset": "0x0010"
+ },
+ "mr": {
+ "description": "Device Mode Register",
+ "addressOffset": "0x0014"
+ },
+ "mrr": {
+ "description": "Read-Voltage Regulator Control Register",
+ "addressOffset": "0x0018"
+ },
+ "mpp": {
+ "description": "Write-Voltage Charge Pump Control Register",
+ "addressOffset": "0x001C"
+ },
+ "vrren": {
+ "description": "Read-Voltage Enable Register",
+ "addressOffset": "0x0020"
+ },
+ "vppen": {
+ "description": "Write-Voltage Enable Register",
+ "addressOffset": "0x0024"
+ },
+ "a": {
+ "description": "Device Address Register",
+ "addressOffset": "0x0028"
+ },
+ "d": {
+ "description": "Device Data Input Register",
+ "addressOffset": "0x002C"
+ },
+ "q": {
+ "description": "Device Data Output Register",
+ "addressOffset": "0x0030"
+ },
+ "rsctrl": {
+ "description": "Read Sequencer Control Register",
+ "addressOffset": "0x0034",
+ "fields": {
+ "scale": {
+ "description": "OTP timescale",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "tas": {
+ "description": "Address setup time",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "trp": {
+ "description": "Read pulse time",
+ "bitOffset": "4",
+ "bitWidth": "1"
+ },
+ "tracc": {
+ "description": "Read access time",
+ "bitOffset": "5",
+ "bitWidth": "1"
+ }
+ }
+ }
+ }
+ },
+ "gpio": {
+ "description": "General Purpose Input/Output Controller (GPIO) Peripheral",
+ "baseAddress": "0x10012000",
+ "size": "0x1000",
+ "registers": {
+ "value": {
+ "description": "Pin Value Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "inputen": {
+ "description": "Pin Input Enable Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Input Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outputen": {
+ "description": "Pin Output Enable Register",
+ "addressOffset": "0x008",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Output Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "port": {
+ "description": "Output Port Value Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output Port Value Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "pue": {
+ "description": "Internal Pull-up Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Internal Pull-up Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "ds": {
+ "description": "Pin Drive Strength Register",
+ "addressOffset": "0x014",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Pin Drive Strength Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseie": {
+ "description": "Rise Interrupt Enable Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "riseip": {
+ "description": "Rise Interrupt Pending Register",
+ "addressOffset": "0x01C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Rise Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallie": {
+ "description": "Fall Interrupt Enable Register",
+ "addressOffset": "0x020",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "fallip": {
+ "description": "Fall Interrupt Pending Register",
+ "addressOffset": "0x024",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Fall Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highie": {
+ "description": "High Interrupt Enable Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "highip": {
+ "description": "High Interrupt Pending Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "High Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowie": {
+ "description": "Low Interrupt Enable Register",
+ "addressOffset": "0x030",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "lowip": {
+ "description": "Low Interrupt Pending Register",
+ "addressOffset": "0x034",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Low Interrupt Pending Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofen": {
+ "description": "HW I/O Function Enable Register",
+ "addressOffset": "0x038",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Enable Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "iofsel": {
+ "description": "HW I/O Function Select Register",
+ "addressOffset": "0x03C",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "HW I/O Function Select Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ },
+ "outxor": {
+ "description": "Output XOR (invert) Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "bit": {
+ "repeatGenerator": "0-31",
+ "description": "Output XOR Bit Field",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "headerName": ""
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "gpio0": {
+ "description": "GPIO0 Interrupt",
+ "value": "8"
+ },
+ "gpio1": {
+ "description": "GPIO1 Interrupt",
+ "value": "9"
+ },
+ "gpio2": {
+ "description": "GPIO2 Interrupt",
+ "value": "10"
+ },
+ "gpio3": {
+ "description": "GPIO3 Interrupt",
+ "value": "11"
+ },
+ "gpio4": {
+ "description": "GPIO4 Interrupt",
+ "value": "12"
+ },
+ "gpio5": {
+ "description": "GPIO5 Interrupt",
+ "value": "13"
+ },
+ "gpio6": {
+ "description": "GPIO6 Interrupt",
+ "value": "14"
+ },
+ "gpio7": {
+ "description": "GPIO7 Interrupt",
+ "value": "15"
+ },
+ "gpio8": {
+ "description": "GPIO8 Interrupt",
+ "value": "16"
+ },
+ "gpio9": {
+ "description": "GPIO9 Interrupt",
+ "value": "17"
+ },
+ "gpio10": {
+ "description": "GPIO10 Interrupt",
+ "value": "18"
+ },
+ "gpio11": {
+ "description": "GPIO11 Interrupt",
+ "value": "19"
+ },
+ "gpio12": {
+ "description": "GPIO12 Interrupt",
+ "value": "20"
+ },
+ "gpio13": {
+ "description": "GPIO13 Interrupt",
+ "value": "21"
+ },
+ "gpio14": {
+ "description": "GPIO14 Interrupt",
+ "value": "22"
+ },
+ "gpio15": {
+ "description": "GPIO15 Interrupt",
+ "value": "23"
+ },
+ "gpio16": {
+ "description": "GPIO16 Interrupt",
+ "value": "24"
+ },
+ "gpio17": {
+ "description": "GPIO17 Interrupt",
+ "value": "25"
+ },
+ "gpio18": {
+ "description": "GPIO18 Interrupt",
+ "value": "26"
+ },
+ "gpio19": {
+ "description": "GPIO19 Interrupt",
+ "value": "27"
+ },
+ "gpio20": {
+ "description": "GPIO20 Interrupt",
+ "value": "28"
+ },
+ "gpio21": {
+ "description": "GPIO21 Interrupt",
+ "value": "29"
+ },
+ "gpio22": {
+ "description": "GPIO22 Interrupt",
+ "value": "30"
+ },
+ "gpio23": {
+ "description": "GPIO23 Interrupt",
+ "value": "31"
+ },
+ "gpio24": {
+ "description": "GPIO24 Interrupt",
+ "value": "32"
+ },
+ "gpio25": {
+ "description": "GPIO25 Interrupt",
+ "value": "33"
+ },
+ "gpio26": {
+ "description": "GPIO26 Interrupt",
+ "value": "34"
+ },
+ "gpio27": {
+ "description": "GPIO27 Interrupt",
+ "value": "35"
+ },
+ "gpio28": {
+ "description": "GPIO28 Interrupt",
+ "value": "36"
+ },
+ "gpio29": {
+ "description": "GPIO29 Interrupt",
+ "value": "37"
+ },
+ "gpio30": {
+ "description": "GPIO30 Interrupt",
+ "value": "38"
+ },
+ "gpio31": {
+ "description": "GPIO31 Interrupt",
+ "value": "39"
+ }
+ }
+ },
+ "uart0": {
+ "description": "Universal Asynchronous Receiver/Transmitter (UART) Peripheral",
+ "baseAddress": "0x10013000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "uart",
+ "registers": {
+ "txdata": {
+ "description": "Transmit Data Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "full": {
+ "description": "Transmit FIFO full",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Receive Data Register",
+ "addressOffset": "0x004",
+ "resetMask": "none",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "access": "r"
+ },
+ "empty": {
+ "description": "Receive FIFO empty",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txctrl": {
+ "description": "Transmit Control Register ",
+ "addressOffset": "0x008",
+ "fields": {
+ "txen": {
+ "description": "Transmit enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "nstop": {
+ "description": "Number of stop bits",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "txcnt": {
+ "description": "Transmit watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "rxctrl": {
+ "description": "Receive Control Register",
+ "addressOffset": "0x00C",
+ "fields": {
+ "rxen": {
+ "description": "Receive enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxcnt": {
+ "description": "Receive watermark level",
+ "bitOffset": "16",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x014",
+ "access": "r",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark interrupt pending",
+ "bitOffset": "0",
+ "bitWidth": "1"
+ },
+ "rxwm": {
+ "description": "Receive watermark interrupt pending",
+ "bitOffset": "1",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "div": {
+ "description": "Baud Rate Divisor Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "value": {
+ "description": "Baud rate divisor",
+ "bitOffset": "0",
+ "bitWidth": "16",
+ "resetMask": "all",
+ "resetValue": "0x0000FFFF"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "uart0": {
+ "description": "UART0 Interrupt",
+ "value": "3"
+ }
+ }
+ },
+ "spi0": {
+ "description": "Serial Peripheral Interface (SPI) Peripheral",
+ "baseAddress": "0x10014000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "spi",
+ "registers": {
+ "sckdiv": {
+ "description": "Serial clock divisor Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Divisor for serial clock",
+ "bitOffset": "0",
+ "bitWidth": "12",
+ "resetMask": "all",
+ "resetValue": "0x003"
+ }
+ }
+ },
+ "sckmode": {
+ "description": "Serial Clock Mode Register",
+ "addressOffset": "0x004",
+ "fields": {
+ "pha": {
+ "description": "Serial clock phase",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "pol": {
+ "description": "Serial clock polarity",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "csid": {
+ "description": "Chip Select ID Register",
+ "addressOffset": "0x010",
+ "resetMask": "all",
+ "resetValue": "0x00000000"
+ },
+ "csdef": {
+ "description": "Chip Select Default Register",
+ "addressOffset": "0x014",
+ "resetMask": "all",
+ "resetValue": "0x00000001"
+ },
+ "csmode": {
+ "description": "Chip Select Mode Register",
+ "addressOffset": "0x018",
+ "fields": {
+ "mode": {
+ "description": "Chip select mode",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "csmode-enum": {
+ "description": "Chip Select Modes Enumeration",
+ "values": {
+ "0": {
+ "displayName": "auto",
+ "description": "Assert/de-assert CS at the beginning/end of each frame"
+ },
+ "*": {
+ "displayName": "reserved"
+ },
+ "2": {
+ "displayName": "hold",
+ "description": "Keep CS continuously asserted after the initial frame"
+ },
+ "3": {
+ "displayName": "off",
+ "description": "Disable hardware control of the CS pin"
+ }
+ }
+ }
+ }
+ }
+ }
+ },
+ "delay0": {
+ "description": "Delay Control 0 Register",
+ "addressOffset": "0x028",
+ "fields": {
+ "cssck": {
+ "description": "CS to SCK Delay",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "sckcs": {
+ "description": "SCK to CS Delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "delay1": {
+ "description": "Delay Control 1 Register",
+ "addressOffset": "0x02C",
+ "fields": {
+ "intercs": {
+ "description": "Minimum CS inactive time",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ },
+ "interxfr": {
+ "description": "Maximum interframe delay",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x01"
+ }
+ }
+ },
+ "fmt": {
+ "description": "Frame Format Register",
+ "addressOffset": "0x040",
+ "fields": {
+ "proto": {
+ "description": "SPI Protocol",
+ "bitOffset": "0",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "proto-enum": {
+ "description": "SPI Protocol Enumeration",
+ "values": {
+ "0": {
+ "displayName": "single",
+ "description": "DQ0 (MOSI), DQ1 (MISO)"
+ },
+ "1": {
+ "displayName": "dual",
+ "description": "DQ0, DQ1"
+ },
+ "2": {
+ "displayName": "quad",
+ "description": "DQ0, DQ1, DQ2, DQ3"
+ },
+ "*": {
+ "displayName": "reserved"
+ }
+ }
+ }
+ }
+ },
+ "endian": {
+ "description": "SPI endianness",
+ "bitOffset": "2",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0",
+ "enumerations": {
+ "endian-enum": {
+ "description": "SPI Endianness Enumeration",
+ "values": {
+ "0": {
+ "displayName": "msb",
+ "description": "Transmit most-significant bit (MSB) first"
+ },
+ "1": {
+ "displayName": "lsb",
+ "description": "Transmit least-significant bit (LSB) first"
+ }
+ }
+ }
+ }
+ },
+ "dir": {
+ "description": "SPI I/O Direction",
+ "bitOffset": "3",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1",
+ "enumerations": {
+ "dir-enum": {
+ "description": "SPI I/O Direction Enumeration",
+ "values": {
+ "0": {
+ "displayName": "rx",
+ "description": "For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal."
+ },
+ "1": {
+ "displayName": "tx",
+ "description": "The receive FIFO is not populated."
+ }
+ }
+ }
+ }
+ },
+ "len": {
+ "description": "Number of bits per frame",
+ "bitOffset": "16",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x8"
+ }
+ }
+ },
+ "txdata": {
+ "description": "Tx FIFO Data Register",
+ "addressOffset": "0x048",
+ "fields": {
+ "data": {
+ "description": "Transmit data",
+ "bitOffset": "0",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x00"
+ },
+ "full": {
+ "description": "FIFO full flag",
+ "bitOffset": "31",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ },
+ "rxdata": {
+ "description": "Rx FIFO Data Register",
+ "addressOffset": "0x04C",
+ "resetMask": "none",
+ "access": "r",
+ "fields": {
+ "data": {
+ "description": "Received data",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ },
+ "empty": {
+ "description": "FIFO empty flag",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "txmark": {
+ "description": "Tx FIFO Watermark Register",
+ "addressOffset": "0x050",
+ "fields": {
+ "value": {
+ "description": "Transmit watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "rxmark": {
+ "description": "Rx FIFO Watermark Register",
+ "addressOffset": "0x054",
+ "fields": {
+ "value": {
+ "description": "Receive watermark",
+ "bitOffset": "0",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "fctrl": {
+ "description": "Flash Interface Control Register",
+ "addressOffset": "0x060",
+ "fields": {
+ "en": {
+ "description": "SPI Flash Mode Select",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ }
+ }
+ },
+ "ffmt": {
+ "description": "Flash Instruction Format Register",
+ "addressOffset": "0x064",
+ "fields": {
+ "cmden": {
+ "description": "Enable sending of command",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x1"
+ },
+ "addrlen": {
+ "description": "Number of address bytes(0 to 4)",
+ "bitOffset": "1",
+ "bitWidth": "3",
+ "resetMask": "all",
+ "resetValue": "0x3"
+ },
+ "padcnt": {
+ "description": "Number of dummy cycles",
+ "bitOffset": "4",
+ "bitWidth": "4",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdproto": {
+ "description": "Protocol for transmitting command",
+ "bitOffset": "8",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "addrproto": {
+ "description": "Protocol for transmitting address and padding",
+ "bitOffset": "10",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "dataproto": {
+ "description": "Protocol for receiving data bytes",
+ "bitOffset": "12",
+ "bitWidth": "2",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmdcode": {
+ "description": "Value of command byte",
+ "bitOffset": "16",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x03"
+ },
+ "padcode": {
+ "description": "First 8 bits to transmit during dummy cycles",
+ "bitOffset": "24",
+ "bitWidth": "8",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ie": {
+ "description": "Interrupt Enable Register",
+ "addressOffset": "0x070",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark enable",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "rxwm": {
+ "description": "Receive watermark enable",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ }
+ }
+ },
+ "ip": {
+ "description": "Interrupt Pending Register",
+ "addressOffset": "0x074",
+ "fields": {
+ "txwm": {
+ "description": "Transmit watermark pending",
+ "bitOffset": "0",
+ "bitWidth": "1",
+ "access": "r"
+ },
+ "rxwm": {
+ "description": "Receive watermark pending",
+ "bitOffset": "1",
+ "bitWidth": "1",
+ "access": "r"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "spi0": {
+ "description": "SPI0 Interrupt",
+ "value": "5"
+ }
+ }
+ },
+ "pwm0": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10015000",
+ "size": "0x1000",
+ "resetMask": "none",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "8"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm0cmp0": {
+ "description": "PWM0 Compare 0 Interrupt",
+ "value": "40"
+ },
+ "pwm0cmp1": {
+ "description": "PWM0 Compare 1 Interrupt",
+ "value": "41"
+ },
+ "pwm0cmp2": {
+ "description": "PWM0 Compare 2 Interrupt",
+ "value": "42"
+ },
+ "pwm0cmp3": {
+ "description": "PWM0 Compare 3 Interrupt",
+ "value": "43"
+ }
+ }
+ },
+ "uart1": {
+ "baseAddress": "0x10023000",
+ "derivedFrom": "uart0",
+ "groupName": "uart",
+ "interrupts": {
+ "uart1": {
+ "description": "UART1 Interrupt",
+ "value": "4"
+ }
+ }
+ },
+ "spi1": {
+ "baseAddress": "0x10024000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi1": {
+ "description": "SPI1 Interrupt",
+ "value": "6"
+ }
+ }
+ },
+ "pwm1": {
+ "description": "Pulse-Width Modulation (PWM) Peripheral",
+ "baseAddress": "0x10025000",
+ "groupName": "pwm",
+ "size": "0x1000",
+ "resetMask": "none",
+ "groupName": "pwm",
+ "registers": {
+ "cfg": {
+ "description": "Configuration Register",
+ "addressOffset": "0x000",
+ "fields": {
+ "scale": {
+ "description": "Counter scale",
+ "bitOffset": "0",
+ "bitWidth": "4"
+ },
+ "sticky": {
+ "description": "Sticky - disallow clearing pwmcmpXip bits",
+ "bitOffset": "8",
+ "bitWidth": "1"
+ },
+ "zerocmp": {
+ "description": "Zero - counter resets to zero after match",
+ "bitOffset": "9",
+ "bitWidth": "1"
+ },
+ "deglitch": {
+ "description": "Deglitch - latch pwmcmpXip within same cycle",
+ "bitOffset": "10",
+ "bitWidth": "1"
+ },
+ "enalways": {
+ "description": "Enable always - run continuously",
+ "bitOffset": "12",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "enoneshot": {
+ "description": "enable one shot - run one cycle",
+ "bitOffset": "13",
+ "bitWidth": "1",
+ "resetMask": "all",
+ "resetValue": "0x0"
+ },
+ "cmp0center": {
+ "description": "PWM0 Compare Center",
+ "bitOffset": "16",
+ "bitWidth": "1"
+ },
+ "cmp1center": {
+ "description": "PWM1 Compare Center",
+ "bitOffset": "17",
+ "bitWidth": "1"
+ },
+ "cmp2center": {
+ "description": "PWM2 Compare Center",
+ "bitOffset": "18",
+ "bitWidth": "1"
+ },
+ "cmp3center": {
+ "description": "PWM3 Compare Center",
+ "bitOffset": "19",
+ "bitWidth": "1"
+ },
+ "cmp0gang": {
+ "description": "PWM0/PWM1 Compare Gang",
+ "bitOffset": "24",
+ "bitWidth": "1"
+ },
+ "cmp1gang": {
+ "description": "PWM1/PWM2 Compare Gang",
+ "bitOffset": "25",
+ "bitWidth": "1"
+ },
+ "cmp2gang": {
+ "description": "PWM2/PWM3 Compare Gang",
+ "bitOffset": "26",
+ "bitWidth": "1"
+ },
+ "cmp3gang": {
+ "description": "PWM3/PWM0 Compare Gang",
+ "bitOffset": "27",
+ "bitWidth": "1"
+ },
+ "cmp0ip": {
+ "description": "PWM0 Interrupt Pending",
+ "bitOffset": "28",
+ "bitWidth": "1"
+ },
+ "cmp1ip": {
+ "description": "PWM1 Interrupt Pending",
+ "bitOffset": "29",
+ "bitWidth": "1"
+ },
+ "cmp2ip": {
+ "description": "PWM2 Interrupt Pending",
+ "bitOffset": "30",
+ "bitWidth": "1"
+ },
+ "cmp3ip": {
+ "description": "PWM3 Interrupt Pending",
+ "bitOffset": "31",
+ "bitWidth": "1"
+ }
+ }
+ },
+ "count": {
+ "description": "Configuration Register",
+ "addressOffset": "0x008"
+ },
+ "scale": {
+ "description": "Scale Register",
+ "addressOffset": "0x010",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ },
+ "cmp": {
+ "arraySize": "4",
+ "description": "Compare Registers",
+ "addressOffset": "0x020",
+ "fields": {
+ "value": {
+ "description": "Compare value",
+ "bitOffset": "0",
+ "bitWidth": "16"
+ }
+ }
+ }
+ },
+ "interrupts": {
+ "pwm1cmp0": {
+ "description": "PWM1 Compare 0 Interrupt",
+ "value": "44"
+ },
+ "pwm1cmp1": {
+ "description": "PWM1 Compare 1 Interrupt",
+ "value": "45"
+ },
+ "pwm1cmp2": {
+ "description": "PWM1 Compare 2 Interrupt",
+ "value": "46"
+ },
+ "pwm1cmp3": {
+ "description": "PWM1 Compare 3 Interrupt",
+ "value": "47"
+ }
+ }
+ },
+ "spi2": {
+ "baseAddress": "0x10034000",
+ "derivedFrom": "spi0",
+ "groupName": "spi",
+ "interrupts": {
+ "spi2": {
+ "description": "SPI2 Interrupt",
+ "value": "7"
+ }
+ }
+ },
+ "pwm2": {
+ "baseAddress": "0x10035000",
+ "derivedFrom": "pwm1",
+ "groupName": "pwm",
+ "interrupts": {
+ "pwm2cmp0": {
+ "description": "PWM2 Compare 0 Interrupt",
+ "value": "48"
+ },
+ "pwm2cmp1": {
+ "description": "PWM2 Compare 1 Interrupt",
+ "value": "49"
+ },
+ "pwm2cmp2": {
+ "description": "PWM2 Compare 2 Interrupt",
+ "value": "50"
+ },
+ "pwm2cmp3": {
+ "description": "PWM2 Compare 3 Interrupt",
+ "value": "51"
+ }
+ }
+ }
+ }
+ }
+ }
+} \ No newline at end of file
diff --git a/FreedomStudio/HiFive1/led_fade/led_fade Debug.launch b/FreedomStudio/HiFive1/led_fade/led_fade OpenOCD.launch
index b5d18d4..abe9c3e 100644
--- a/FreedomStudio/HiFive1/led_fade/led_fade Debug.launch
+++ b/FreedomStudio/HiFive1/led_fade/led_fade OpenOCD.launch
@@ -20,6 +20,7 @@
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/fe310-xsvd.json"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
diff --git a/FreedomStudio/HiFive1/wrap-hifive1/.cproject b/FreedomStudio/HiFive1/wrap-hifive1/.cproject
deleted file mode 100644
index 365eece..0000000
--- a/FreedomStudio/HiFive1/wrap-hifive1/.cproject
+++ /dev/null
@@ -1,192 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
- <storageModule moduleId="org.eclipse.cdt.core.settings">
- <cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1998132349">
- <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1998132349" moduleId="org.eclipse.cdt.core.settings" name="Debug">
- <externalSettings>
- <externalSetting>
- <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/libwrap-hifive1"/>
- <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/libwrap-hifive1/Debug"/>
- <entry flags="RESOLVED" kind="libraryFile" name="libwrap-hifive1" srcPrefixMapping="" srcRootPath=""/>
- </externalSetting>
- </externalSettings>
- <extensions>
- <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
- <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- </extensions>
- </storageModule>
- <storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <configuration artifactExtension="a" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.staticLib" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.staticLib,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1998132349" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug">
- <folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1998132349." name="/" resourcePath="">
- <toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.lib.debug.1230015557" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.lib.debug">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.305975524" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.none" valueType="enumerated"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.762481353" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" useByScannerDiscovery="true" value="false" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.1348885171" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" useByScannerDiscovery="true" value="false" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.439528369" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.1323340374" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.578727366" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.max" valueType="enumerated"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.1831633643" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format" useByScannerDiscovery="true"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.133438363" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" useByScannerDiscovery="false" value="RISC-V GCC/Newlib" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.821563723" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" useByScannerDiscovery="false" value="riscv64-unknown-elf-" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.2105717400" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" useByScannerDiscovery="false" value="gcc" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.400907617" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" useByScannerDiscovery="false" value="g++" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.829578618" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" useByScannerDiscovery="false" value="ar" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.1197613356" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" useByScannerDiscovery="false" value="objcopy" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.2070578785" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" useByScannerDiscovery="false" value="objdump" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.615893101" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" useByScannerDiscovery="false" value="size" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.1765424323" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" useByScannerDiscovery="false" value="make" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.380564149" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" useByScannerDiscovery="false" value="rm" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.335989682" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.408927769" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" useByScannerDiscovery="false" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.base.1501496571" name="Architecture" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.base" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.arch.rv32i" valueType="enumerated"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.multiply.618666679" name="Multiply extension (RVM)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.multiply" useByScannerDiscovery="false" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.atomic.1976510603" name="Atomic extension (RVA)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.atomic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed.1605550524" name="Compressed extension (RVC)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed" useByScannerDiscovery="false" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer.1791984910" name="Integer ABI" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.abi.integer.ilp32" valueType="enumerated"/>
- <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1752848401" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
- <builder buildPath="${workspace_loc:/libwrap-hifive1}/Debug" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1550068208" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.440023252" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.2083354000" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
- <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.764928596" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.87016328" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.372610200" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
- <listOptionValue builtIn="false" value="../bsp/include"/>
- <listOptionValue builtIn="false" value="../bsp/env"/>
- <listOptionValue builtIn="false" value="../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../../../../bsp/env/freedom-e300-hifive1"/>
- <listOptionValue builtIn="false" value="../../../../bsp/env"/>
- <listOptionValue builtIn="false" value="../../../../bsp/include"/>
- </option>
- <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2049881229" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.343835727" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.145909910" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.923899454" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.271134430" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.94928786" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1761781426" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver">
- <option id="gnu.both.lib.option.flags.762834910" name="Archiver flags" superClass="gnu.both.lib.option.flags" useByScannerDiscovery="false" value="-rcs" valueType="string"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.783851928" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1435311932" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1146505548" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.804161778" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.65997680" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.2125186266" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.1502833261" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1620889079" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1980766191" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
- </tool>
- </toolChain>
- </folderInfo>
- </configuration>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
- </cconfiguration>
- <cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1691958200">
- <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1691958200" moduleId="org.eclipse.cdt.core.settings" name="Release">
- <externalSettings>
- <externalSetting>
- <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/libwrap-hifive1"/>
- <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/libwrap-hifive1/Release"/>
- <entry flags="RESOLVED" kind="libraryFile" name="libwrap-hifive1" srcPrefixMapping="" srcRootPath=""/>
- </externalSetting>
- </externalSettings>
- <extensions>
- <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
- <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- </extensions>
- </storageModule>
- <storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <configuration artifactExtension="a" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.staticLib" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.staticLib,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1691958200" name="Release" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release">
- <folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1691958200." name="/" resourcePath="">
- <toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.lib.release.2091709106" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.lib.release">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.291137163" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.size" valueType="enumerated"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.671907895" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.852477858" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.1736131576" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.1293226787" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.1052521930" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.1244649816" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.1331554327" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" value="RISC-V GCC/Newlib" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.821944105" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" value="riscv64-unknown-elf-" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.44155783" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" value="gcc" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.2107207303" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" value="g++" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.341421526" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" value="ar" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.1809570126" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" value="objcopy" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.438685777" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" value="objdump" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.1009420572" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" value="size" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.1881878526" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" value="make" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.2099339989" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" value="rm" valueType="string"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1581447807" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.1563891351" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" value="true" valueType="boolean"/>
- <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1136663891" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
- <builder buildPath="${workspace_loc:/libwrap-hifive1}/Release" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.200106003" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.268345193" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.1942307977" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
- <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.1712490490" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1742539033" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
- <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1795901227" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.1583166595" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.154964098" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1501375392" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.1742597937" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.2059490029" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1109846480" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.181634692" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.962303622" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.2093538326" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.1662183846" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.377262051" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1634015915" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.1115584567" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
- </tool>
- <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.37053307" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
- <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.2118588335" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
- </tool>
- </toolChain>
- </folderInfo>
- </configuration>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
- </cconfiguration>
- </storageModule>
- <storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <project id="libwrap-hifive1.ilg.gnumcueclipse.managedbuild.cross.riscv.target.lib.1192643581" name="Static Library" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.lib"/>
- </storageModule>
- <storageModule moduleId="scannerConfiguration">
- <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
- <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1998132349;ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.debug.1998132349.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.87016328;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2049881229">
- <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
- </scannerConfigBuildInfo>
- <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1691958200;ilg.gnumcueclipse.managedbuild.cross.riscv.config.lib.release.1691958200.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1742539033;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1795901227">
- <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
- </scannerConfigBuildInfo>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
- <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
- <storageModule moduleId="refreshScope" versionNumber="2">
- <configuration configurationName="Debug">
- <resource resourceType="PROJECT" workspacePath="/libwrap-hifive1"/>
- </configuration>
- <configuration configurationName="Release">
- <resource resourceType="PROJECT" workspacePath="/libwrap-hifive1"/>
- </configuration>
- </storageModule>
-</cproject>
diff --git a/FreedomStudio/HiFive1/wrap-hifive1/.project b/FreedomStudio/HiFive1/wrap-hifive1/.project
deleted file mode 100644
index 431aed3..0000000
--- a/FreedomStudio/HiFive1/wrap-hifive1/.project
+++ /dev/null
@@ -1,153 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
- <name>wrap-hifive1</name>
- <comment></comment>
- <projects>
- </projects>
- <buildSpec>
- <buildCommand>
- <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
- <triggers>clean,full,incremental,</triggers>
- <arguments>
- </arguments>
- </buildCommand>
- <buildCommand>
- <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
- <triggers>full,incremental,</triggers>
- <arguments>
- </arguments>
- </buildCommand>
- </buildSpec>
- <natures>
- <nature>org.eclipse.cdt.core.cnature</nature>
- <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
- <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
- </natures>
- <linkedResources>
- <link>
- <name>misc</name>
- <type>2</type>
- <locationURI>virtual:/virtual</locationURI>
- </link>
- <link>
- <name>stdlib</name>
- <type>2</type>
- <locationURI>virtual:/virtual</locationURI>
- </link>
- <link>
- <name>sys</name>
- <type>2</type>
- <locationURI>virtual:/virtual</locationURI>
- </link>
- <link>
- <name>misc/write_hex.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
- </link>
- <link>
- <name>stdlib/malloc.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
- </link>
- <link>
- <name>sys/_exit.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
- </link>
- <link>
- <name>sys/close.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
- </link>
- <link>
- <name>sys/execve.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
- </link>
- <link>
- <name>sys/fork.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
- </link>
- <link>
- <name>sys/fstat.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
- </link>
- <link>
- <name>sys/getpid.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
- </link>
- <link>
- <name>sys/isatty.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
- </link>
- <link>
- <name>sys/kill.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
- </link>
- <link>
- <name>sys/link.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
- </link>
- <link>
- <name>sys/lseek.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
- </link>
- <link>
- <name>sys/open.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
- </link>
- <link>
- <name>sys/openat.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
- </link>
- <link>
- <name>sys/read.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
- </link>
- <link>
- <name>sys/sbrk.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
- </link>
- <link>
- <name>sys/stat.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
- </link>
- <link>
- <name>sys/stub.h</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
- </link>
- <link>
- <name>sys/times.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
- </link>
- <link>
- <name>sys/unlink.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
- </link>
- <link>
- <name>sys/wait.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
- </link>
- <link>
- <name>sys/write.c</name>
- <type>1</type>
- <locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
- </link>
- </linkedResources>
-</projectDescription>