diff options
Diffstat (limited to 'bsp/coreip-e20-arty/design.dts')
| -rw-r--r-- | bsp/coreip-e20-arty/design.dts | 187 |
1 files changed, 187 insertions, 0 deletions
diff --git a/bsp/coreip-e20-arty/design.dts b/bsp/coreip-e20-arty/design.dts new file mode 100644 index 0000000..93e984e --- /dev/null +++ b/bsp/coreip-e20-arty/design.dts @@ -0,0 +1,187 @@ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "SiFive,FE200G-dev", "fe200-dev", "sifive-dev"; + model = "SiFive,FE200G"; + chosen { + stdout-path = "/soc/serial@20000000:115200"; + mee,entry = <&L6 0x400000>; + }; + L15: aliases { + serial0 = &L5; + }; + L14: cpus { + #address-cells = <1>; + #size-cells = <0>; + L3: cpu@0 { + clock-frequency = <0>; + compatible = "sifive,caboose0", "riscv"; + device_type = "cpu"; + reg = <0x0>; + riscv,isa = "rv32imc"; + status = "okay"; + timebase-frequency = <1000000>; + hardware-exec-breakpoint-count = <4>; + L2: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + }; + L13: soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "SiFive,FE200G-soc", "fe200-soc", "sifive-soc", "simple-bus"; + ranges; + hfclk: clock@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32500000>; + }; + L1: debug-controller@0 { + compatible = "sifive,debug-013", "riscv,debug-013"; + interrupts-extended = <&L2 65535>; + reg = <0x0 0x1000>; + reg-names = "control"; + }; + L10: global-external-interrupts { + compatible = "sifive,global-external-interrupts0"; + interrupt-parent = <&L0>; + interrupts = <22 23 24 25>; + }; + L4: gpio@20002000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sifive,gpio0", "sifive,gpio1"; + gpio-controller; + interrupt-controller; + interrupt-parent = <&L0>; + interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; + reg = <0x20002000 0x1000>; + reg-names = "control"; + }; + L0: interrupt-controller@2000000 { + #interrupt-cells = <1>; + compatible = "sifive,clic0"; + interrupt-controller; + interrupts-extended = <&L2 3 &L2 7 &L2 11>; + reg = <0x2000000 0x1000000>; + reg-names = "control"; + sifive,numints = <58>; + sifive,numlevels = <16>; + sifive,numintbits = <2>; + }; + L11: local-external-interrupts-0 { + compatible = "sifive,local-external-interrupts0"; + interrupt-parent = <&L0>; + interrupts = <26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57>; + }; + L7: pwm@20005000 { + compatible = "sifive,pwm0"; + interrupt-parent = <&L0>; + interrupts = <18 19 20 21>; + reg = <0x20005000 0x1000>; + reg-names = "control"; + }; + L5: serial@20000000 { + compatible = "sifive,uart0"; + interrupt-parent = <&L0>; + interrupts = <16>; + reg = <0x20000000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + }; + L6: spi@20004000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "sifive,spi0"; + interrupt-parent = <&L0>; + interrupts = <17>; + reg = <0x20004000 0x1000 0x40000000 0x20000000>; + reg-names = "control", "mem"; + }; + L9: sys-sram-0@80000000 { + compatible = "sifive,sram0"; + reg = <0x80000000 0x10000>; + reg-names = "mem"; + }; + led@0red { + compatible = "sifive,gpio-leds"; + label = "LD0red"; + gpios = <&L4 0>; + linux,default-trigger = "none"; + }; + led@0green { + compatible = "sifive,gpio-leds"; + label = "LD0green"; + gpios = <&L4 1>; + linux,default-trigger = "none"; + }; + led@0blue { + compatible = "sifive,gpio-leds"; + label = "LD0blue"; + gpios = <&L4 2>; + linux,default-trigger = "none"; + }; + button@0 { + compatible = "sifive,gpio-buttons"; + label = "BTN0"; + gpios = <&L4 4>; + interrupts-extended = <&L11 20>; + linux,code = "none"; + }; + button@1 { + compatible = "sifive,gpio-buttons"; + label = "BTN1"; + gpios = <&L4 5>; + interrupts-extended = <&L11 21>; + linux,code = "none"; + }; + button@2 { + compatible = "sifive,gpio-buttons"; + label = "BTN2"; + gpios = <&L4 6>; + interrupts-extended = <&L11 22>; + linux,code = "none"; + }; + button@3 { + compatible = "sifive,gpio-buttons"; + label = "BTN3"; + gpios = <&L4 7>; + interrupts-extended = <&L11 23>; + linux,code = "none"; + }; + switch@0 { + compatible = "sifive,gpio-switches"; + label = "SW0"; + interrupts-extended = <&L11 16>; + linux,code = "none"; + }; + switch@1 { + compatible = "sifive,gpio-switches"; + label = "SW1"; + interrupts-extended = <&L11 17>; + linux,code = "none"; + }; + switch@2 { + compatible = "sifive,gpio-switches"; + label = "SW2"; + interrupts-extended = <&L11 18>; + linux,code = "none"; + }; + switch@3 { + compatible = "sifive,gpio-switches"; + label = "SW3"; + interrupts-extended = <&L11 19>; + linux,code = "none"; + }; + L8: teststatus@4000 { + compatible = "sifive,test0"; + reg = <0x4000 0x1000>; + reg-names = "control"; + }; + }; +}; |