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-rw-r--r--bsp/coreip-e20-arty/metal-inline.h4
-rw-r--r--bsp/coreip-e20-arty/metal-platform.h2
-rw-r--r--bsp/coreip-e20-arty/metal.default.lds3
-rw-r--r--bsp/coreip-e20-arty/metal.h22
-rw-r--r--bsp/coreip-e20-arty/metal.ramrodata.lds3
-rw-r--r--bsp/coreip-e20-arty/metal.scratchpad.lds3
-rw-r--r--bsp/coreip-e20-arty/settings.mk2
7 files changed, 32 insertions, 7 deletions
diff --git a/bsp/coreip-e20-arty/metal-inline.h b/bsp/coreip-e20-arty/metal-inline.h
index 8170f13..3b9c4e5 100644
--- a/bsp/coreip-e20-arty/metal-inline.h
+++ b/bsp/coreip-e20-arty/metal-inline.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
#ifndef ASSEMBLY
@@ -23,8 +23,10 @@ extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock *
/* --------------------- cpu ------------ */
+extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu);
extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu);
extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu);
+extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu);
/* --------------------- sifive_plic0 ------------ */
diff --git a/bsp/coreip-e20-arty/metal-platform.h b/bsp/coreip-e20-arty/metal-platform.h
index 0e58533..d049910 100644
--- a/bsp/coreip-e20-arty/metal-platform.h
+++ b/bsp/coreip-e20-arty/metal-platform.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
#ifndef COREIP_E20_ARTY__METAL_PLATFORM_H
diff --git a/bsp/coreip-e20-arty/metal.default.lds b/bsp/coreip-e20-arty/metal.default.lds
index 2516d37..badb729 100644
--- a/bsp/coreip-e20-arty/metal.default.lds
+++ b/bsp/coreip-e20-arty/metal.default.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -28,6 +28,7 @@ SECTIONS
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+ PROVIDE(__metal_boot_hart = 0);
.init :
diff --git a/bsp/coreip-e20-arty/metal.h b/bsp/coreip-e20-arty/metal.h
index 5e182ab..34014a1 100644
--- a/bsp/coreip-e20-arty/metal.h
+++ b/bsp/coreip-e20-arty/metal.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
#ifndef ASSEMBLY
@@ -170,6 +170,16 @@ static inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock *
/* --------------------- cpu ------------ */
+static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu)
+{
+ if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
+ return 0;
+ }
+ else {
+ return -1;
+ }
+}
+
static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu)
{
if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
@@ -190,6 +200,16 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s
}
}
+static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu)
+{
+ if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
+ return 0;
+ }
+ else {
+ return 0;
+ }
+}
+
/* --------------------- sifive_plic0 ------------ */
diff --git a/bsp/coreip-e20-arty/metal.ramrodata.lds b/bsp/coreip-e20-arty/metal.ramrodata.lds
index 0290158..5742665 100644
--- a/bsp/coreip-e20-arty/metal.ramrodata.lds
+++ b/bsp/coreip-e20-arty/metal.ramrodata.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -28,6 +28,7 @@ SECTIONS
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+ PROVIDE(__metal_boot_hart = 0);
.init :
diff --git a/bsp/coreip-e20-arty/metal.scratchpad.lds b/bsp/coreip-e20-arty/metal.scratchpad.lds
index 5d4cd7b..3702a05 100644
--- a/bsp/coreip-e20-arty/metal.scratchpad.lds
+++ b/bsp/coreip-e20-arty/metal.scratchpad.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -28,6 +28,7 @@ SECTIONS
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+ PROVIDE(__metal_boot_hart = 0);
.init :
diff --git a/bsp/coreip-e20-arty/settings.mk b/bsp/coreip-e20-arty/settings.mk
index bc4125f..9a4c6d6 100644
--- a/bsp/coreip-e20-arty/settings.mk
+++ b/bsp/coreip-e20-arty/settings.mk
@@ -1,7 +1,7 @@
# Copyright 2019 SiFive, Inc #
# SPDX-License-Identifier: Apache-2.0 #
# ----------------------------------- #
-# [XXXXX] 22-05-2019 00-09-02 #
+# [XXXXX] 23-05-2019 13-29-49 #
# ----------------------------------- #
RISCV_ARCH=rv32imc