diff options
Diffstat (limited to 'bsp/coreip-e20-rtl')
| -rw-r--r-- | bsp/coreip-e20-rtl/README.md | 6 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/design.dts | 72 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/design.reglist | 214 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal-inline.h | 132 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal-platform.h | 47 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.default.lds | 233 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.h | 467 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.ramrodata.lds | 230 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.scratchpad.lds | 233 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/settings.mk | 15 |
10 files changed, 0 insertions, 1649 deletions
diff --git a/bsp/coreip-e20-rtl/README.md b/bsp/coreip-e20-rtl/README.md deleted file mode 100644 index f908327..0000000 --- a/bsp/coreip-e20-rtl/README.md +++ /dev/null @@ -1,6 +0,0 @@ -The SiFive E20 Standard Core is an extremely efficient implementation of the E2 Series configured for very low area and power. The E20 brings the power of the RISC-V software ecosystem to efficiently address traditional 8-bit and 32-bit microcontroller applications such as IoT, Analog Mixed Signal, and Programmable Finite State Machines. - -This core target is suitable with Verilog RTL for verification and running application software building on top of freedom-metal libraries. The target supports: - -- 1 hart with RV32IMC core -- 4 hardware breakpoints diff --git a/bsp/coreip-e20-rtl/design.dts b/bsp/coreip-e20-rtl/design.dts deleted file mode 100644 index d57c342..0000000 --- a/bsp/coreip-e20-rtl/design.dts +++ /dev/null @@ -1,72 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "SiFive,FE200G-dev", "fe200-dev", "sifive-dev"; - model = "SiFive,FE200G"; - L10: cpus { - #address-cells = <1>; - #size-cells = <0>; - L3: cpu@0 { - clock-frequency = <0>; - compatible = "sifive,caboose0", "riscv"; - device_type = "cpu"; - reg = <0x0>; - riscv,isa = "rv32imc"; - status = "okay"; - timebase-frequency = <1000000>; - hardware-exec-breakpoint-count = <4>; - L2: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - L9: soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "SiFive,FE200G-soc", "fe200-soc", "sifive-soc", "simple-bus"; - ranges; - L7: ahb-sys-port@20000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "sifive,ahb-sys-port", "sifive,ahb-port", "sifive,sys-port", "simple-bus"; - ranges = <0x20000000 0x20000000 0x20000000>; - }; - L1: debug-controller@0 { - compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L2 65535>; - reg = <0x0 0x1000>; - reg-names = "control"; - }; - L0: interrupt-controller@2000000 { - #interrupt-cells = <1>; - compatible = "sifive,clic0"; - interrupt-controller; - interrupts-extended = <&L2 3 &L2 7 &L2 11>; - reg = <0x2000000 0x1000000>; - reg-names = "control"; - sifive,numints = <48>; - sifive,numlevels = <16>; - sifive,numintbits = <2>; - }; - L6: local-external-interrupts-0 { - compatible = "sifive,local-external-interrupts0"; - interrupt-parent = <&L0>; - interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31>; - }; - L4: teststatus@4000 { - compatible = "sifive,test0"; - reg = <0x4000 0x1000>; - reg-names = "control"; - }; - test_memory: testram@20000000 { - compatible = "sifive,testram0"; - reg = <0x20000000 0x8000000>; - reg-names = "mem"; - word-size-bytes = <4>; - }; - }; -}; diff --git a/bsp/coreip-e20-rtl/design.reglist b/bsp/coreip-e20-rtl/design.reglist deleted file mode 100644 index 645819d..0000000 --- a/bsp/coreip-e20-rtl/design.reglist +++ /dev/null @@ -1,214 +0,0 @@ -zero -ra -sp -gp -tp -t0 -t1 -t2 -fp -s1 -a0 -a1 -a2 -a3 -a4 -a5 -a6 -a7 -s2 -s3 -s4 -s5 -s6 -s7 -s8 -s9 -s10 -s11 -t3 -t4 -t5 -t6 -pc -mscratch -mtval -hpmcounter4 -hpmcounter5 -hpmcounter6 -hpmcounter7 -hpmcounter8 -hpmcounter9 -hpmcounter10 -hpmcounter11 -hpmcounter12 -hpmcounter13 -hpmcounter14 -hpmcounter15 -hpmcounter16 -hpmcounter17 -hpmcounter18 -hpmcounter19 -hpmcounter20 -hpmcounter21 -hpmcounter22 -hpmcounter23 -hpmcounter24 -hpmcounter25 -hpmcounter26 -hpmcounter27 -hpmcounter28 -hpmcounter29 -hpmcounter30 -hpmcounter4h -hpmcounter5h -hpmcounter6h -hpmcounter7h -hpmcounter8h -hpmcounter9h -hpmcounter10h -hpmcounter11h -hpmcounter12h -hpmcounter13h -hpmcounter14h -hpmcounter15h -hpmcounter16h -hpmcounter17h -hpmcounter18h -hpmcounter19h -hpmcounter20h -hpmcounter21h -hpmcounter22h -hpmcounter23h -hpmcounter24h -hpmcounter25h -hpmcounter26h -hpmcounter27h -hpmcounter28h -hpmcounter29h -hpmcounter30h -mstatus -misa -mie -mtvec -mscratch -mepc -mcause -mtval -mip -pmpaddr1 -pmpaddr2 -pmpaddr3 -pmpaddr4 -pmpaddr5 -pmpaddr6 -pmpaddr7 -pmpaddr8 -pmpaddr9 -pmpaddr10 -pmpaddr11 -pmpaddr12 -pmpaddr13 -pmpaddr14 -mhpmevent3 -mhpmevent4 -mhpmevent5 -mhpmevent6 -mhpmevent7 -mhpmevent8 -mhpmevent9 -mhpmevent10 -mhpmevent11 -mhpmevent12 -mhpmevent13 -mhpmevent14 -mhpmevent15 -mhpmevent16 -mhpmevent17 -mhpmevent18 -mhpmevent19 -mhpmevent20 -mhpmevent21 -mhpmevent22 -mhpmevent23 -mhpmevent24 -mhpmevent25 -mhpmevent26 -mhpmevent27 -mhpmevent28 -mhpmevent29 -mhpmevent30 -mhpmevent31 -mvendorid -marchid -mimpid -mhartid -mcycle -minstret -mhpmcounter3 -mhpmcounter4 -mhpmcounter5 -mhpmcounter6 -mhpmcounter7 -mhpmcounter8 -mhpmcounter9 -mhpmcounter10 -mhpmcounter11 -mhpmcounter12 -mhpmcounter13 -mhpmcounter14 -mhpmcounter15 -mhpmcounter16 -mhpmcounter17 -mhpmcounter18 -mhpmcounter19 -mhpmcounter20 -mhpmcounter21 -mhpmcounter22 -mhpmcounter23 -mhpmcounter24 -mhpmcounter25 -mhpmcounter26 -mhpmcounter27 -mhpmcounter28 -mhpmcounter29 -mhpmcounter30 -mhpmcounter31 -mcycleh -minstreth -mhpmcounter3h -mhpmcounter4h -mhpmcounter5h -mhpmcounter6h -mhpmcounter7h -mhpmcounter8h -mhpmcounter9h -mhpmcounter10h -mhpmcounter11h -mhpmcounter12h -mhpmcounter13h -mhpmcounter14h -mhpmcounter15h -mhpmcounter16h -mhpmcounter17h -mhpmcounter18h -mhpmcounter19h -mhpmcounter20h -mhpmcounter21h -mhpmcounter22h -mhpmcounter23h -mhpmcounter24h -mhpmcounter25h -mhpmcounter26h -mhpmcounter27h -mhpmcounter28h -mhpmcounter29h -mhpmcounter30h -mhpmcounter31h -tselect -tdata1 -tdata2 -tdata3 -dcsr -dpc -dscratch diff --git a/bsp/coreip-e20-rtl/metal-inline.h b/bsp/coreip-e20-rtl/metal-inline.h deleted file mode 100644 index cb6d9bc..0000000 --- a/bsp/coreip-e20-rtl/metal-inline.h +++ /dev/null @@ -1,132 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -#ifndef ASSEMBLY - -#ifndef COREIP_E20_RTL__METAL_INLINE_H -#define COREIP_E20_RTL__METAL_INLINE_H - -#include <metal/machine.h> - - -/* --------------------- fixed_clock ------------ */ - - -/* --------------------- fixed_factor_clock ------------ */ - - -/* --------------------- sifive_clint0 ------------ */ - - -/* --------------------- cpu ------------ */ -extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); -extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); -extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); -extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); - - -/* --------------------- sifive_plic0 ------------ */ - - -/* --------------------- sifive_clic0 ------------ */ -extern inline unsigned long __metal_driver_sifive_clic0_control_base(struct metal_interrupt *controller); -extern inline unsigned long __metal_driver_sifive_clic0_control_size(struct metal_interrupt *controller); -extern inline struct metal_interrupt * __metal_driver_sifive_clic0_interrupt_parent(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_clic0_num_interrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_clic0_interrupt_lines(struct metal_interrupt *controller, int idx); -extern inline int __metal_driver_sifive_clic0_max_levels(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_clic0_num_subinterrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_clic0_num_intbits(struct metal_interrupt *controller); - - -/* --------------------- sifive_local_external_interrupts0 ------------ */ -extern inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx); - - -/* --------------------- sifive_global_external_interrupts0 ------------ */ - - -/* --------------------- sifive_gpio0 ------------ */ - - -/* --------------------- sifive_gpio_button ------------ */ - - -/* --------------------- sifive_gpio_led ------------ */ - - -/* --------------------- sifive_gpio_switch ------------ */ - - -/* --------------------- sifive_spi0 ------------ */ - - -/* --------------------- sifive_test0 ------------ */ -extern inline unsigned long __metal_driver_sifive_test0_base( ); -extern inline unsigned long __metal_driver_sifive_test0_size( ); - - -/* --------------------- sifive_uart0 ------------ */ - - -/* --------------------- sifive_fe310_g000_hfrosc ------------ */ - - -/* --------------------- sifive_fe310_g000_hfxosc ------------ */ - - -/* --------------------- sifive_fe310_g000_pll ------------ */ - - -/* --------------------- fe310_g000_prci ------------ */ - - -/* --------------------- sifive_fu540_c000_l2 ------------ */ - - -struct metal_memory __metal_dt_mem_testram_20000000 = { - ._base_address = 536870912UL, - ._size = 134217728UL, - ._attrs = { - .R = 1, - .W = 1, - .X = 1, - .C = 1, - .A = 1}, -}; - -/* From cpu@0 */ -struct __metal_driver_cpu __metal_dt_cpu_0 = { - .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, -}; - -/* From interrupt_controller */ -struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { - .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, - .init_done = 0, -}; - -/* From interrupt_controller@2000000 */ -struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000 = { - .controller.vtable = &__metal_driver_vtable_sifive_clic0.clic_vtable, - .init_done = 0, -}; - -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = { - .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, - .init_done = 0, -}; - -/* From teststatus@4000 */ -struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = { - .shutdown.vtable = &__metal_driver_vtable_sifive_test0.shutdown, -}; - - -#endif /* COREIP_E20_RTL__METAL_INLINE_H*/ -#endif /* ! ASSEMBLY */ diff --git a/bsp/coreip-e20-rtl/metal-platform.h b/bsp/coreip-e20-rtl/metal-platform.h deleted file mode 100644 index 014341a..0000000 --- a/bsp/coreip-e20-rtl/metal-platform.h +++ /dev/null @@ -1,47 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -#ifndef COREIP_E20_RTL__METAL_PLATFORM_H -#define COREIP_E20_RTL__METAL_PLATFORM_H - -/* From interrupt_controller@2000000 */ -#define METAL_SIFIVE_CLIC0_2000000_BASE_ADDRESS 33554432UL -#define METAL_SIFIVE_CLIC0_0_BASE_ADDRESS 33554432UL -#define METAL_SIFIVE_CLIC0_2000000_SIZE 16777216UL -#define METAL_SIFIVE_CLIC0_0_SIZE 16777216UL -#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTS 48UL -#define METAL_SIFIVE_CLIC0_0_SIFIVE_NUMINTS 48UL -#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMLEVELS 16UL -#define METAL_SIFIVE_CLIC0_0_SIFIVE_NUMLEVELS 16UL -#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTBITS 2UL -#define METAL_SIFIVE_CLIC0_0_SIFIVE_NUMINTBITS 2UL - -#define METAL_SIFIVE_CLIC0 -#define METAL_SIFIVE_CLIC0_MSIP_BASE 0UL -#define METAL_SIFIVE_CLIC0_MTIMECMP_BASE 16384UL -#define METAL_SIFIVE_CLIC0_MTIME 49144UL -#define METAL_SIFIVE_CLIC0_CLICINTIP_BASE 0UL -#define METAL_SIFIVE_CLIC0_CLICINTIE_BASE 1024UL -#define METAL_SIFIVE_CLIC0_CLICINTCTL_BASE 2048UL -#define METAL_SIFIVE_CLIC0_CLICCFG 3072UL -#define METAL_SIFIVE_CLIC0_MMODE_APERTURE 8388608UL -#define METAL_SIFIVE_CLIC0_HSMODE_APERTURE 10485760UL -#define METAL_SIFIVE_CLIC0_SMODE_APERTURE 12582912UL -#define METAL_SIFIVE_CLIC0_UMODE_APERTURE 14680064UL - -/* From local_external_interrupts_0 */ - -#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 - -/* From teststatus@4000 */ -#define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL -#define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL -#define METAL_SIFIVE_TEST0_4000_SIZE 4096UL -#define METAL_SIFIVE_TEST0_0_SIZE 4096UL - -#define METAL_SIFIVE_TEST0 -#define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL - -#endif /* COREIP_E20_RTL__METAL_PLATFORM_H*/ diff --git a/bsp/coreip-e20-rtl/metal.default.lds b/bsp/coreip-e20-rtl/metal.default.lds deleted file mode 100644 index 633a5bc..0000000 --- a/bsp/coreip-e20-rtl/metal.default.lds +++ /dev/null @@ -1,233 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -OUTPUT_ARCH("riscv") - -ENTRY(_enter) - -MEMORY -{ - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x8000000 -} - -PHDRS -{ - flash PT_LOAD; - ram_init PT_LOAD; - itim_init PT_LOAD; - ram PT_LOAD; - itim PT_LOAD; -} - -SECTIONS -{ - __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; - PROVIDE(__stack_size = __stack_size); - __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - PROVIDE(__metal_boot_hart = 0); - PROVIDE(__metal_chicken_bit = 0); - - - .init : - { - KEEP (*(.text.metal.init.enter)) - KEEP (*(SORT_NONE(.init))) - KEEP (*(.text.libgloss.start)) - } >ram AT>ram :ram - - - .text : - { - *(.text.unlikely .text.unlikely.*) - *(.text.startup .text.startup.*) - *(.text .text.*) - *(.itim .itim.*) - *(.gnu.linkonce.t.*) - } >ram AT>ram :ram - - - .fini : - { - KEEP (*(SORT_NONE(.fini))) - } >ram AT>ram :ram - - - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - - - .rodata : - { - *(.rdata) - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) - } >ram AT>ram :ram - - - . = ALIGN(4); - - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >ram AT>ram :ram - - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); - } >ram AT>ram :ram - - - .finit_array : - { - PROVIDE_HIDDEN (__finit_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) - KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) - PROVIDE_HIDDEN (__finit_array_end = .); - } >ram AT>ram :ram - - - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } >ram AT>ram :ram - - - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } >ram AT>ram :ram - - - .litimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_source_start = . ); - } >ram AT>ram :ram - - - .ditimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_target_start = . ); - } >ram AT>ram :ram_init - - - .itim : - { - *(.itim .itim.*) - } >ram AT>ram :ram_init - - - . = ALIGN(8); - PROVIDE( metal_segment_itim_target_end = . ); - - - .lalign : - { - . = ALIGN(4); - PROVIDE( _data_lma = . ); - PROVIDE( metal_segment_data_source_start = . ); - } >ram AT>ram :ram - - - .dalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>ram :ram_init - - - .data : - { - *(.data .data.*) - *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); - *(.sdata .sdata.* .sdata2.*) - *(.gnu.linkonce.s.*) - } >ram AT>ram :ram_init - - - . = ALIGN(4); - PROVIDE( _edata = . ); - PROVIDE( edata = . ); - PROVIDE( metal_segment_data_target_end = . ); - PROVIDE( _fbss = . ); - PROVIDE( __bss_start = . ); - PROVIDE( metal_segment_bss_target_start = . ); - - - .bss : - { - *(.sbss*) - *(.gnu.linkonce.sb.*) - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >ram AT>ram :ram - - - . = ALIGN(8); - PROVIDE( _end = . ); - PROVIDE( end = . ); - PROVIDE( metal_segment_bss_target_end = . ); - - - .stack : - { - PROVIDE(metal_segment_stack_begin = .); - . = __stack_size; - PROVIDE( _sp = . ); - PROVIDE(metal_segment_stack_end = .); - } >ram AT>ram :ram - - - .heap : - { - PROVIDE( metal_segment_heap_target_start = . ); - . = __heap_size; - PROVIDE( metal_segment_heap_target_end = . ); - PROVIDE( _heap_end = . ); - } >ram AT>ram :ram - - -} - diff --git a/bsp/coreip-e20-rtl/metal.h b/bsp/coreip-e20-rtl/metal.h deleted file mode 100644 index 85e9b4f..0000000 --- a/bsp/coreip-e20-rtl/metal.h +++ /dev/null @@ -1,467 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -#ifndef ASSEMBLY - -#include <metal/machine/platform.h> - -#ifdef __METAL_MACHINE_MACROS - -#ifndef MACROS_IF_COREIP_E20_RTL__METAL_H -#define MACROS_IF_COREIP_E20_RTL__METAL_H - -#ifndef __METAL_CLINT_NUM_PARENTS -#define __METAL_CLINT_NUM_PARENTS 0 -#endif -#ifndef __METAL_PLIC_SUBINTERRUPTS -#define __METAL_PLIC_SUBINTERRUPTS 0 -#endif -#ifndef __METAL_PLIC_NUM_PARENTS -#define __METAL_PLIC_NUM_PARENTS 0 -#endif -#define __METAL_CLIC_SUBINTERRUPTS 48 - -#ifndef __METAL_CLIC_SUBINTERRUPTS -#define __METAL_CLIC_SUBINTERRUPTS 0 -#endif - -#endif /* MACROS_IF_COREIP_E20_RTL__METAL_H*/ - -#else /* ! __METAL_MACHINE_MACROS */ - -#ifndef MACROS_ELSE_COREIP_E20_RTL__METAL_H -#define MACROS_ELSE_COREIP_E20_RTL__METAL_H - -#define METAL_MAX_CLINT_INTERRUPTS 0 - -#define __METAL_CLINT_NUM_PARENTS 0 - -#define __METAL_PLIC_SUBINTERRUPTS 0 -#define METAL_MAX_PLIC_INTERRUPTS 0 - -#define __METAL_PLIC_NUM_PARENTS 0 - -#define __METAL_INTERRUPT_CONTROLLER_2000000_INTERRUPTS 3 - -#define __METAL_CLIC_SUBINTERRUPTS 48 - -#define METAL_MAX_CLIC_INTERRUPTS 3 - -#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 32 - -#define METAL_MAX_LOCAL_EXT_INTERRUPTS 32 - -#define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0 - -#define METAL_MAX_GPIO_INTERRUPTS 0 - -#define METAL_MAX_UART_INTERRUPTS 0 - - -#include <metal/drivers/fixed-clock.h> -#include <metal/memory.h> -#include <metal/drivers/riscv_cpu.h> -#include <metal/pmp.h> -#include <metal/drivers/sifive_clic0.h> -#include <metal/drivers/sifive_local-external-interrupts0.h> -#include <metal/drivers/sifive_test0.h> - -struct metal_memory __metal_dt_mem_testram_20000000; - -/* From cpu@0 */ -struct __metal_driver_cpu __metal_dt_cpu_0; - -struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; - -/* From interrupt_controller@2000000 */ -struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000; - -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0; - -/* From teststatus@4000 */ -struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; - - - -/* --------------------- fixed_clock ------------ */ - - -/* --------------------- fixed_factor_clock ------------ */ - - -/* --------------------- sifive_clint0 ------------ */ - - -/* --------------------- cpu ------------ */ -static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) -{ - if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { - return 0; - } - else { - return -1; - } -} - -static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) -{ - if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { - return 1000000; - } - else { - return 0; - } -} - -static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) -{ - if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { - return &__metal_dt_cpu_0_interrupt_controller.controller; - } - else { - return NULL; - } -} - -static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) -{ - if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { - return 0; - } - else { - return 0; - } -} - - - -/* --------------------- sifive_plic0 ------------ */ - - -/* --------------------- sifive_clic0 ------------ */ -static inline unsigned long __metal_driver_sifive_clic0_control_base(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return METAL_SIFIVE_CLIC0_2000000_BASE_ADDRESS; - } - else { - return 0; - } -} - -static inline unsigned long __metal_driver_sifive_clic0_control_size(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return METAL_SIFIVE_CLIC0_2000000_SIZE; - } - else { - return 0; - } -} - -static inline int __metal_driver_sifive_clic0_num_interrupts(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return METAL_MAX_CLIC_INTERRUPTS; - } - else { - return 0; - } -} - -static inline struct metal_interrupt * __metal_driver_sifive_clic0_interrupt_parent(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; - } - else { - return NULL; - } -} - -static inline int __metal_driver_sifive_clic0_interrupt_lines(struct metal_interrupt *controller, int idx) -{ - if (idx == 0) { - return 3; - } - else if (idx == 1) { - return 3; - } - else if (idx == 2) { - return 7; - } - else if (idx == 3) { - return 11; - } - else { - return 0; - } -} - -static inline int __metal_driver_sifive_clic0_max_levels(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMLEVELS; - } - else { - return 0; - } -} - -static inline int __metal_driver_sifive_clic0_num_subinterrupts(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTS; - } - else { - return 0; - } -} - -static inline int __metal_driver_sifive_clic0_num_intbits(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_2000000) { - return METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTBITS; - } - else { - return 0; - } -} - - - -/* --------------------- sifive_local_external_interrupts0 ------------ */ -static inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { - return (struct metal_interrupt *)&__metal_dt_interrupt_controller_2000000.controller; - } - else { - return NULL; - } -} - -static inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { - return METAL_MAX_LOCAL_EXT_INTERRUPTS; - } - else { - return 0; - } -} - -static inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx) -{ - if (idx == 0) { - return 0; - } - else if (idx == 1) { - return 1; - } - else if (idx == 2) { - return 2; - } - else if (idx == 3) { - return 3; - } - else if (idx == 4) { - return 4; - } - else if (idx == 5) { - return 5; - } - else if (idx == 6) { - return 6; - } - else if (idx == 7) { - return 7; - } - else if (idx == 8) { - return 8; - } - else if (idx == 9) { - return 9; - } - else if (idx == 10) { - return 10; - } - else if (idx == 11) { - return 11; - } - else if (idx == 12) { - return 12; - } - else if (idx == 13) { - return 13; - } - else if (idx == 14) { - return 14; - } - else if (idx == 15) { - return 15; - } - else if (idx == 16) { - return 16; - } - else if (idx == 17) { - return 17; - } - else if (idx == 18) { - return 18; - } - else if (idx == 19) { - return 19; - } - else if (idx == 20) { - return 20; - } - else if (idx == 21) { - return 21; - } - else if (idx == 22) { - return 22; - } - else if (idx == 23) { - return 23; - } - else if (idx == 24) { - return 24; - } - else if (idx == 25) { - return 25; - } - else if (idx == 26) { - return 26; - } - else if (idx == 27) { - return 27; - } - else if (idx == 28) { - return 28; - } - else if (idx == 29) { - return 29; - } - else if (idx == 30) { - return 30; - } - else if (idx == 31) { - return 31; - } - else { - return 0; - } -} - - - -/* --------------------- sifive_global_external_interrupts0 ------------ */ - - -/* --------------------- sifive_gpio0 ------------ */ - - -/* --------------------- sifive_gpio_button ------------ */ - - -/* --------------------- sifive_gpio_led ------------ */ - - -/* --------------------- sifive_gpio_switch ------------ */ - - -/* --------------------- sifive_spi0 ------------ */ - - -/* --------------------- sifive_test0 ------------ */ -static inline unsigned long __metal_driver_sifive_test0_base( ) -{ - return 16384; -} - -static inline unsigned long __metal_driver_sifive_test0_size( ) -{ - return 4096; -} - - - -/* --------------------- sifive_uart0 ------------ */ - - -/* --------------------- sifive_fe310_g000_hfrosc ------------ */ - - -/* --------------------- sifive_fe310_g000_hfxosc ------------ */ - - -/* --------------------- sifive_fe310_g000_pll ------------ */ - - -/* --------------------- sifive_fe310_g000_prci ------------ */ - - -/* --------------------- sifive_fu540_c000_l2 ------------ */ - - -#define __METAL_DT_MAX_MEMORIES 1 - -asm (".weak __metal_memory_table"); -struct metal_memory *__metal_memory_table[] = { - &__metal_dt_mem_testram_20000000}; - -#define __METAL_DT_MAX_HARTS 1 - -asm (".weak __metal_cpu_table"); -struct __metal_driver_cpu *__metal_cpu_table[] = { - &__metal_dt_cpu_0}; - -/* From interrupt_controller@2000000 */ -#define __METAL_DT_SIFIVE_CLIC0_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) - -#define __METAL_DT_INTERRUPT_CONTROLLER_2000000_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) - -/* From local_external_interrupts_0 */ -#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - -#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - -#define __MEE_DT_MAX_GPIOS 0 - -asm (".weak __metal_gpio_table"); -struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = { - NULL }; -#define __METAL_DT_MAX_BUTTONS 0 - -asm (".weak __metal_button_table"); -struct __metal_driver_sifive_gpio_button *__metal_button_table[] = { - NULL }; -#define __METAL_DT_MAX_LEDS 0 - -asm (".weak __metal_led_table"); -struct __metal_driver_sifive_gpio_led *__metal_led_table[] = { - NULL }; -#define __METAL_DT_MAX_SWITCHES 0 - -asm (".weak __metal_switch_table"); -struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = { - NULL }; -#define __METAL_DT_MAX_SPIS 0 - -asm (".weak __metal_spi_table"); -struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { - NULL }; -/* From teststatus@4000 */ -#define __METAL_DT_SHUTDOWN_HANDLE (&__metal_dt_teststatus_4000.shutdown) - -#define __METAL_DT_TESTSTATUS_4000_HANDLE (&__metal_dt_teststatus_4000.shutdown) - -#endif /* MACROS_ELSE_COREIP_E20_RTL__METAL_H*/ - -#endif /* ! __METAL_MACHINE_MACROS */ - -#endif /* ! ASSEMBLY */ diff --git a/bsp/coreip-e20-rtl/metal.ramrodata.lds b/bsp/coreip-e20-rtl/metal.ramrodata.lds deleted file mode 100644 index 98acbca..0000000 --- a/bsp/coreip-e20-rtl/metal.ramrodata.lds +++ /dev/null @@ -1,230 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -OUTPUT_ARCH("riscv") - -ENTRY(_enter) - -MEMORY -{ - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x8000000 -} - -PHDRS -{ - flash PT_LOAD; - ram_init PT_LOAD; - itim_init PT_LOAD; - ram PT_LOAD; - itim PT_LOAD; -} - -SECTIONS -{ - __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; - PROVIDE(__stack_size = __stack_size); - __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - PROVIDE(__metal_boot_hart = 0); - PROVIDE(__metal_chicken_bit = 0); - - - .init : - { - KEEP (*(.text.metal.init.enter)) - KEEP (*(SORT_NONE(.init))) - KEEP (*(.text.libgloss.start)) - } >ram AT>ram :ram - - - - - .fini : - { - KEEP (*(SORT_NONE(.fini))) - } >ram AT>ram :ram - - - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - - - - - . = ALIGN(4); - - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >ram AT>ram :ram - - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); - } >ram AT>ram :ram - - - .finit_array : - { - PROVIDE_HIDDEN (__finit_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) - KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) - PROVIDE_HIDDEN (__finit_array_end = .); - } >ram AT>ram :ram - - - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } >ram AT>ram :ram - - - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } >ram AT>ram :ram - - - .litimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_source_start = . ); - } >ram AT>ram :ram - - - .ditimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_target_start = . ); - } >ram AT>ram :ram_init - - - .itim : - { - *(.itim .itim.*) - } >ram AT>ram :ram_init - - - . = ALIGN(8); - PROVIDE( metal_segment_itim_target_end = . ); - .text : - { - *(.text.unlikely .text.unlikely.*) - *(.text.startup .text.startup.*) - *(.text .text.*) - *(.gnu.linkonce.t.*) - *(.itim .itim.*) - } >ram AT>ram :ram - - - .lalign : - { - . = ALIGN(4); - PROVIDE( _data_lma = . ); - PROVIDE( metal_segment_data_source_start = . ); - } >ram AT>ram :ram - - - .dalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>ram :ram_init - - - .data : - { - *(.rdata) - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) - *(.data .data.*) - *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); - *(.sdata .sdata.* .sdata2.*) - *(.gnu.linkonce.s.*) - } >ram AT>ram :ram_init - - - . = ALIGN(4); - PROVIDE( _edata = . ); - PROVIDE( edata = . ); - PROVIDE( metal_segment_data_target_end = . ); - PROVIDE( _fbss = . ); - PROVIDE( __bss_start = . ); - PROVIDE( metal_segment_bss_target_start = . ); - - - .bss : - { - *(.sbss*) - *(.gnu.linkonce.sb.*) - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >ram AT>ram :ram - - - . = ALIGN(8); - PROVIDE( _end = . ); - PROVIDE( end = . ); - PROVIDE( metal_segment_bss_target_end = . ); - - - .stack : - { - PROVIDE(metal_segment_stack_begin = .); - . = __stack_size; - PROVIDE( _sp = . ); - PROVIDE(metal_segment_stack_end = .); - } >ram AT>ram :ram - - - .heap : - { - PROVIDE( metal_segment_heap_target_start = . ); - . = __heap_size; - PROVIDE( metal_segment_heap_target_end = . ); - PROVIDE( _heap_end = . ); - } >ram AT>ram :ram - - -} - diff --git a/bsp/coreip-e20-rtl/metal.scratchpad.lds b/bsp/coreip-e20-rtl/metal.scratchpad.lds deleted file mode 100644 index 633a5bc..0000000 --- a/bsp/coreip-e20-rtl/metal.scratchpad.lds +++ /dev/null @@ -1,233 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -OUTPUT_ARCH("riscv") - -ENTRY(_enter) - -MEMORY -{ - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x8000000 -} - -PHDRS -{ - flash PT_LOAD; - ram_init PT_LOAD; - itim_init PT_LOAD; - ram PT_LOAD; - itim PT_LOAD; -} - -SECTIONS -{ - __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; - PROVIDE(__stack_size = __stack_size); - __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - PROVIDE(__metal_boot_hart = 0); - PROVIDE(__metal_chicken_bit = 0); - - - .init : - { - KEEP (*(.text.metal.init.enter)) - KEEP (*(SORT_NONE(.init))) - KEEP (*(.text.libgloss.start)) - } >ram AT>ram :ram - - - .text : - { - *(.text.unlikely .text.unlikely.*) - *(.text.startup .text.startup.*) - *(.text .text.*) - *(.itim .itim.*) - *(.gnu.linkonce.t.*) - } >ram AT>ram :ram - - - .fini : - { - KEEP (*(SORT_NONE(.fini))) - } >ram AT>ram :ram - - - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - - - .rodata : - { - *(.rdata) - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) - } >ram AT>ram :ram - - - . = ALIGN(4); - - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >ram AT>ram :ram - - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); - } >ram AT>ram :ram - - - .finit_array : - { - PROVIDE_HIDDEN (__finit_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) - KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) - PROVIDE_HIDDEN (__finit_array_end = .); - } >ram AT>ram :ram - - - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } >ram AT>ram :ram - - - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } >ram AT>ram :ram - - - .litimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_source_start = . ); - } >ram AT>ram :ram - - - .ditimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_target_start = . ); - } >ram AT>ram :ram_init - - - .itim : - { - *(.itim .itim.*) - } >ram AT>ram :ram_init - - - . = ALIGN(8); - PROVIDE( metal_segment_itim_target_end = . ); - - - .lalign : - { - . = ALIGN(4); - PROVIDE( _data_lma = . ); - PROVIDE( metal_segment_data_source_start = . ); - } >ram AT>ram :ram - - - .dalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>ram :ram_init - - - .data : - { - *(.data .data.*) - *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); - *(.sdata .sdata.* .sdata2.*) - *(.gnu.linkonce.s.*) - } >ram AT>ram :ram_init - - - . = ALIGN(4); - PROVIDE( _edata = . ); - PROVIDE( edata = . ); - PROVIDE( metal_segment_data_target_end = . ); - PROVIDE( _fbss = . ); - PROVIDE( __bss_start = . ); - PROVIDE( metal_segment_bss_target_start = . ); - - - .bss : - { - *(.sbss*) - *(.gnu.linkonce.sb.*) - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >ram AT>ram :ram - - - . = ALIGN(8); - PROVIDE( _end = . ); - PROVIDE( end = . ); - PROVIDE( metal_segment_bss_target_end = . ); - - - .stack : - { - PROVIDE(metal_segment_stack_begin = .); - . = __stack_size; - PROVIDE( _sp = . ); - PROVIDE(metal_segment_stack_end = .); - } >ram AT>ram :ram - - - .heap : - { - PROVIDE( metal_segment_heap_target_start = . ); - . = __heap_size; - PROVIDE( metal_segment_heap_target_end = . ); - PROVIDE( _heap_end = . ); - } >ram AT>ram :ram - - -} - diff --git a/bsp/coreip-e20-rtl/settings.mk b/bsp/coreip-e20-rtl/settings.mk deleted file mode 100644 index 5b48994..0000000 --- a/bsp/coreip-e20-rtl/settings.mk +++ /dev/null @@ -1,15 +0,0 @@ -# Copyright 2019 SiFive, Inc # -# SPDX-License-Identifier: Apache-2.0 # -# ----------------------------------- # -# ----------------------------------- # - -RISCV_ARCH=rv32imc -RISCV_ABI=ilp32 -RISCV_CMODEL=medlow -RISCV_SERIES=sifive-2-series - -COREIP_MEM_WIDTH=32 - -TARGET_TAGS=rtl -TARGET_DHRY_ITERS=2000 -TARGET_CORE_ITERS=5 |