diff options
Diffstat (limited to 'bsp/coreip-e31-arty/design.dts')
| -rw-r--r-- | bsp/coreip-e31-arty/design.dts | 114 |
1 files changed, 60 insertions, 54 deletions
diff --git a/bsp/coreip-e31-arty/design.dts b/bsp/coreip-e31-arty/design.dts index 03e100b..2500df0 100644 --- a/bsp/coreip-e31-arty/design.dts +++ b/bsp/coreip-e31-arty/design.dts @@ -5,31 +5,32 @@ #size-cells = <1>; compatible = "SiFive,FE310G-dev", "fe310-dev", "sifive-dev"; model = "SiFive,FE310G"; - chosen { stdout-path = "/soc/serial@20000000:115200"; - metal,entry = <&L12 0x400000>; + metal,entry = <&L10 0x400000>; }; - + L18: aliases { + serial0 = &L9; + }; L17: cpus { #address-cells = <1>; #size-cells = <0>; - L6: cpu@0 { + L7: cpu@0 { clock-frequency = <0>; compatible = "sifive,rocket0", "riscv"; device_type = "cpu"; i-cache-block-size = <64>; i-cache-sets = <128>; i-cache-size = <16384>; - next-level-cache = <&L12>; - reg = <0>; + next-level-cache = <&L10>; + reg = <0x0>; riscv,isa = "rv32imac"; - sifive,dtim = <&L5>; - sifive,itim = <&L4>; + sifive,dtim = <&L6>; + sifive,itim = <&L5>; status = "okay"; timebase-frequency = <1000000>; hardware-exec-breakpoint-count = <4>; - L3: interrupt-controller { + L4: interrupt-controller { #interrupt-cells = <1>; compatible = "riscv,cpu-intc"; interrupt-controller; @@ -50,153 +51,158 @@ compatible = "riscv,pmp"; regions = <8>; }; - L1: clint@2000000 { + L2: clint@2000000 { compatible = "riscv,clint0"; - interrupts-extended = <&L3 3 &L3 7>; + interrupts-extended = <&L4 3 &L4 7>; reg = <0x2000000 0x10000>; reg-names = "control"; }; - L2: debug-controller@0 { + L3: debug-controller@0 { compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L3 65535>; + interrupts-extended = <&L4 65535>; reg = <0x0 0x1000>; reg-names = "control"; }; - L5: dtim@80000000 { + L6: dtim@80000000 { compatible = "sifive,dtim0"; reg = <0x80000000 0x10000>; reg-names = "mem"; }; - L8: error-device@3000 { + L0: error-device@3000 { compatible = "sifive,error0"; reg = <0x3000 0x1000>; - reg-names = "mem"; - }; - L9: global-external-interrupts { + }; + L13: global-external-interrupts { compatible = "sifive,global-external-interrupts0"; - interrupt-parent = <&L0>; - interrupts = <1 2 3 4>; + interrupt-parent = <&L1>; + interrupts = <23 24 25 26>; }; - L13: gpio@20002000 { - compatible = "sifive,gpio0"; - interrupt-parent = <&L0>; - interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>; + L8: gpio@20002000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sifive,gpio0", "sifive,gpio1"; + gpio-controller; + interrupt-controller; + interrupt-parent = <&L1>; + interrupts = <1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16>; reg = <0x20002000 0x1000>; reg-names = "control"; }; - L0: interrupt-controller@c000000 { + L1: interrupt-controller@c000000 { #interrupt-cells = <1>; compatible = "riscv,plic0"; interrupt-controller; - interrupts-extended = <&L3 11>; + interrupts-extended = <&L4 11>; reg = <0xc000000 0x4000000>; reg-names = "control"; riscv,max-priority = <7>; riscv,ndev = <26>; }; - L4: itim@8000000 { + L5: itim@8000000 { compatible = "sifive,itim0"; reg = <0x8000000 0x4000>; reg-names = "mem"; }; - L10: local-external-interrupts-0 { + L14: local-external-interrupts-0 { compatible = "sifive,local-external-interrupts0"; - interrupt-parent = <&L3>; + interrupt-parent = <&L4>; interrupts = <16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31>; }; - L14: pwm@20005000 { + L11: pwm@20005000 { compatible = "sifive,pwm0"; - interrupt-parent = <&L0>; - interrupts = <23 24 25 26>; + interrupt-parent = <&L1>; + interrupts = <19 20 21 22>; reg = <0x20005000 0x1000>; reg-names = "control"; }; - L11: serial@20000000 { + L9: serial@20000000 { compatible = "sifive,uart0"; - interrupt-parent = <&L0>; - interrupts = <5>; + interrupt-parent = <&L1>; + interrupts = <17>; reg = <0x20000000 0x1000>; reg-names = "control"; clocks = <&hfclk>; }; - L12: spi@20004000 { + L10: spi@20004000 { + #address-cells = <1>; + #size-cells = <0>; compatible = "sifive,spi0"; - interrupt-parent = <&L0>; - interrupts = <6>; + interrupt-parent = <&L1>; + interrupts = <18>; reg = <0x20004000 0x1000 0x40000000 0x20000000>; reg-names = "control", "mem"; }; led@0red { compatible = "sifive,gpio-leds"; label = "LD0red"; - gpios = <&L13 0>; + gpios = <&L8 0>; linux,default-trigger = "none"; }; led@0green { compatible = "sifive,gpio-leds"; label = "LD0green"; - gpios = <&L13 1>; + gpios = <&L8 1>; linux,default-trigger = "none"; }; led@0blue { compatible = "sifive,gpio-leds"; label = "LD0blue"; - gpios = <&L13 2>; + gpios = <&L8 2>; linux,default-trigger = "none"; }; button@0 { compatible = "sifive,gpio-buttons"; label = "BTN0"; - gpios = <&L13 4>; - interrupts-extended = <&L10 4>; + gpios = <&L8 4>; + interrupts-extended = <&L14 4>; linux,code = "none"; }; button@1 { compatible = "sifive,gpio-buttons"; label = "BTN1"; - gpios = <&L13 5>; - interrupts-extended = <&L10 5>; + gpios = <&L8 5>; + interrupts-extended = <&L14 5>; linux,code = "none"; }; button@2 { compatible = "sifive,gpio-buttons"; label = "BTN2"; - gpios = <&L13 6>; - interrupts-extended = <&L10 6>; + gpios = <&L8 6>; + interrupts-extended = <&L14 6>; linux,code = "none"; }; button@3 { compatible = "sifive,gpio-buttons"; label = "BTN3"; - gpios = <&L13 7>; - interrupts-extended = <&L10 7>; + gpios = <&L8 7>; + interrupts-extended = <&L14 7>; linux,code = "none"; }; switch@0 { compatible = "sifive,gpio-switches"; label = "SW0"; - interrupts-extended = <&L9 0>; + interrupts-extended = <&L13 0>; linux,code = "none"; }; switch@1 { compatible = "sifive,gpio-switches"; label = "SW1"; - interrupts-extended = <&L9 1>; + interrupts-extended = <&L13 1>; linux,code = "none"; }; switch@2 { compatible = "sifive,gpio-switches"; label = "SW2"; - interrupts-extended = <&L9 2>; + interrupts-extended = <&L13 2>; linux,code = "none"; }; switch@3 { compatible = "sifive,gpio-switches"; label = "SW3"; - interrupts-extended = <&L10 3>; + interrupts-extended = <&L14 3>; linux,code = "none"; }; - L7: teststatus@4000 { + L12: teststatus@4000 { compatible = "sifive,test0"; reg = <0x4000 0x1000>; reg-names = "control"; |