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-rw-r--r--bsp/coreip-e76-arty/README.md16
-rw-r--r--bsp/coreip-e76-arty/design.dts216
-rw-r--r--bsp/coreip-e76-arty/design.reglist262
-rw-r--r--bsp/coreip-e76-arty/metal-inline.h266
-rw-r--r--bsp/coreip-e76-arty/metal-platform.h168
-rw-r--r--bsp/coreip-e76-arty/metal.default.lds234
-rw-r--r--bsp/coreip-e76-arty/metal.h968
-rw-r--r--bsp/coreip-e76-arty/metal.ramrodata.lds231
-rw-r--r--bsp/coreip-e76-arty/metal.scratchpad.lds234
-rw-r--r--bsp/coreip-e76-arty/openocd.cfg30
-rw-r--r--bsp/coreip-e76-arty/settings.mk13
11 files changed, 0 insertions, 2638 deletions
diff --git a/bsp/coreip-e76-arty/README.md b/bsp/coreip-e76-arty/README.md
deleted file mode 100644
index 3dddb18..0000000
--- a/bsp/coreip-e76-arty/README.md
+++ /dev/null
@@ -1,16 +0,0 @@
-The SiFive E76 Standard Core is a high-performance 32-bit embedded processor which is fully-compliant with the RISC-V ISA. Its advanced memory subsystem enables inclusion of tightly-integrated memory and caches.
-
-The E76 is ideal for applications which require high performance -- but have power constraints (e.g., Augmented Reality and Virtual Reality , IoT Edge Compute, Biometric Signal Processing, and Industrial Automation).
-
-This FPGA core target is ideal for makers and hobbyists to develop running application software building on top of freedom-metal libraries. The target supports:
-
-- 1 hart with RV32IMAFC core
-- 4 hardware breakpoints
-- Physical Memory Protection with 8 regions
-- 16 local interrupts signal that can be connected to off core complex devices
-- Up to 127 PLIC interrupt signals that can be connected to off core complex devices, with 7 priority levels
-- GPIO memory with 16 interrupt lines
-- SPI memory with 1 interrupt line
-- Serial port with 1 interrupt line
-- 4 RGB LEDS
-- 4 Buttons and 4 Switches
diff --git a/bsp/coreip-e76-arty/design.dts b/bsp/coreip-e76-arty/design.dts
deleted file mode 100644
index c1ef3b2..0000000
--- a/bsp/coreip-e76-arty/design.dts
+++ /dev/null
@@ -1,216 +0,0 @@
-/dts-v1/;
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "SiFive,FE710G-dev", "fe710-dev", "sifive-dev";
- model = "SiFive,FE710G";
- L21: aliases {
- serial0 = &L13;
- };
- L16: chosen {
- stdout-path = "/soc/serial@20000000:115200";
- metal,entry = <&L14 0x400000>;
- };
- L20: cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- L6: cpu@0 {
- clock-frequency = <0>;
- compatible = "sifive,bullet0", "riscv";
- d-cache-block-size = <64>;
- d-cache-sets = <128>;
- d-cache-size = <32768>;
- device_type = "cpu";
- i-cache-block-size = <64>;
- i-cache-sets = <128>;
- i-cache-size = <32768>;
- next-level-cache = <&L14 &L15>;
- reg = <0x0>;
- riscv,isa = "rv32imafc";
- riscv,pmpregions = <8>;
- status = "okay";
- timebase-frequency = <65000000>;
- hardware-exec-breakpoint-count = <4>;
- L4: interrupt-controller {
- #interrupt-cells = <1>;
- compatible = "riscv,cpu-intc";
- interrupt-controller;
- };
- };
- };
- L15: memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x10000000>;
- };
- L19: soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus";
- ranges;
- L2: clint@2000000 {
- compatible = "riscv,clint0";
- interrupts-extended = <&L4 3 &L4 7>;
- reg = <0x2000000 0x10000>;
- reg-names = "control";
- };
- L3: debug-controller@0 {
- compatible = "sifive,debug-013", "riscv,debug-013";
- interrupts-extended = <&L4 65535>;
- reg = <0x0 0x1000>;
- reg-names = "control";
- };
- L0: error-device@3000 {
- compatible = "sifive,error0";
- reg = <0x3000 0x1000>;
- };
- L10: global-external-interrupts {
- compatible = "sifive,global-external-interrupts0";
- interrupt-parent = <&L1>;
- interrupts = <21 22 23 24>;
- };
- L17: gpio@10060000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sifive,gpio0", "sifive,gpio1";
- gpio-controller;
- interrupt-controller;
- interrupt-parent = <&L1>;
- interrupts = <27 28 29 30>;
- reg = <0x10060000 0x1000>;
- reg-names = "control";
- };
- L7: gpio@20002000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sifive,gpio0", "sifive,gpio1";
- gpio-controller;
- interrupt-controller;
- interrupt-parent = <&L1>;
- interrupts = <1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16>;
- reg = <0x20002000 0x1000>;
- reg-names = "control";
- };
- L1: interrupt-controller@c000000 {
- #interrupt-cells = <1>;
- compatible = "riscv,plic0";
- interrupt-controller;
- interrupts-extended = <&L4 11>;
- reg = <0xc000000 0x4000000>;
- reg-names = "control";
- riscv,max-priority = <7>;
- riscv,ndev = <30>;
- };
- L8: pwm@20005000 {
- compatible = "sifive,pwm0";
- interrupt-parent = <&L1>;
- interrupts = <17 18 19 20>;
- reg = <0x20005000 0x1000>;
- reg-names = "control";
- };
- L11: rom@1000 {
- compatible = "sifive,modeselect0";
- reg = <0x1000 0x1000>;
- reg-names = "mem";
- };
- L13: serial@20000000 {
- clocks = <&L12>;
- compatible = "sifive,uart0";
- interrupt-parent = <&L1>;
- interrupts = <25>;
- reg = <0x20000000 0x1000>;
- reg-names = "control";
- };
- L14: spi@20004000 {
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&L12>;
- compatible = "sifive,spi0";
- interrupt-parent = <&L1>;
- interrupts = <26>;
- reg = <0x20004000 0x1000 0x40000000 0x20000000>;
- reg-names = "control", "mem";
- };
- led@0red {
- compatible = "sifive,gpio-leds";
- label = "LD0red";
- gpios = <&L17 0>;
- linux,default-trigger = "none";
- };
- led@0green {
- compatible = "sifive,gpio-leds";
- label = "LD0green";
- gpios = <&L17 1>;
- linux,default-trigger = "none";
- };
- led@0blue {
- compatible = "sifive,gpio-leds";
- label = "LD0blue";
- gpios = <&L17 2>;
- linux,default-trigger = "none";
- };
- button@0 {
- compatible = "sifive,gpio-buttons";
- label = "BTN0";
- gpios = <&L17 4>;
- interrupts-extended = <&L10 0>;
- linux,code = "none";
- };
- button@1 {
- compatible = "sifive,gpio-buttons";
- label = "BTN1";
- gpios = <&L17 5>;
- interrupts-extended = <&L10 1>;
- linux,code = "none";
- };
- button@2 {
- compatible = "sifive,gpio-buttons";
- label = "BTN2";
- gpios = <&L17 6>;
- interrupts-extended = <&L10 2>;
- linux,code = "none";
- };
- button@3 {
- compatible = "sifive,gpio-buttons";
- label = "BTN3";
- gpios = <&L17 7>;
- interrupts-extended = <&L10 3>;
- linux,code = "none";
- };
- switch@0 {
- compatible = "sifive,gpio-switches";
- label = "SW0";
- interrupts-extended = <&L10 0>;
- linux,code = "none";
- };
- switch@1 {
- compatible = "sifive,gpio-switches";
- label = "SW1";
- interrupts-extended = <&L10 1>;
- linux,code = "none";
- };
- switch@2 {
- compatible = "sifive,gpio-switches";
- label = "SW2";
- interrupts-extended = <&L10 2>;
- linux,code = "none";
- };
- switch@3 {
- compatible = "sifive,gpio-switches";
- label = "SW3";
- interrupts-extended = <&L10 3>;
- linux,code = "none";
- };
- L9: teststatus@4000 {
- compatible = "sifive,test0";
- reg = <0x4000 0x1000>;
- reg-names = "control";
- };
- L12: tlclk {
- #clock-cells = <0>;
- clock-frequency = <32500000>;
- clock-output-names = "tlclk";
- compatible = "fixed-clock";
- };
- };
-};
diff --git a/bsp/coreip-e76-arty/design.reglist b/bsp/coreip-e76-arty/design.reglist
deleted file mode 100644
index 386db06..0000000
--- a/bsp/coreip-e76-arty/design.reglist
+++ /dev/null
@@ -1,262 +0,0 @@
-zero
-ra
-sp
-gp
-tp
-t0
-t1
-t2
-fp
-s1
-a0
-a1
-a2
-a3
-a4
-a5
-a6
-a7
-s2
-s3
-s4
-s5
-s6
-s7
-s8
-s9
-s10
-s11
-t3
-t4
-t5
-t6
-pc
-ft0
-ft1
-ft2
-ft3
-ft4
-ft5
-ft6
-ft7
-fs0
-fs1
-fa0
-fa1
-fa2
-fa3
-fa4
-fa5
-fa6
-fa7
-fs2
-fs3
-fs4
-fs5
-fs6
-fs7
-fs8
-fs9
-fs10
-fs11
-ft8
-ft9
-ft10
-ft11
-fflags
-frm
-fcsr
-mscratch
-mtval
-cycle
-instret
-hpmcounter3
-hpmcounter4
-hpmcounter5
-hpmcounter6
-hpmcounter7
-hpmcounter8
-hpmcounter9
-hpmcounter10
-hpmcounter11
-hpmcounter12
-hpmcounter13
-hpmcounter14
-hpmcounter15
-hpmcounter16
-hpmcounter17
-hpmcounter18
-hpmcounter19
-hpmcounter20
-hpmcounter21
-hpmcounter22
-hpmcounter23
-hpmcounter24
-hpmcounter25
-hpmcounter26
-hpmcounter27
-hpmcounter28
-hpmcounter29
-hpmcounter30
-hpmcounter31
-cycleh
-instreth
-hpmcounter3h
-hpmcounter4h
-hpmcounter5h
-hpmcounter6h
-hpmcounter7h
-hpmcounter8h
-hpmcounter9h
-hpmcounter10h
-hpmcounter11h
-hpmcounter12h
-hpmcounter13h
-hpmcounter14h
-hpmcounter15h
-hpmcounter16h
-hpmcounter17h
-hpmcounter18h
-hpmcounter19h
-hpmcounter20h
-hpmcounter21h
-hpmcounter22h
-hpmcounter23h
-hpmcounter24h
-hpmcounter25h
-hpmcounter26h
-hpmcounter27h
-hpmcounter28h
-hpmcounter29h
-hpmcounter30h
-hpmcounter31h
-mstatus
-misa
-mie
-mtvec
-mcounteren
-mscratch
-mepc
-mcause
-mtval
-mip
-pmpcfg0
-pmpcfg3
-pmpaddr0
-pmpaddr1
-pmpaddr2
-pmpaddr3
-pmpaddr4
-pmpaddr5
-pmpaddr6
-pmpaddr7
-pmpaddr8
-pmpaddr9
-pmpaddr10
-pmpaddr11
-pmpaddr12
-pmpaddr13
-pmpaddr14
-pmpaddr15
-mhpmevent3
-mhpmevent4
-mhpmevent5
-mhpmevent6
-mhpmevent7
-mhpmevent8
-mhpmevent9
-mhpmevent10
-mhpmevent11
-mhpmevent12
-mhpmevent13
-mhpmevent14
-mhpmevent15
-mhpmevent16
-mhpmevent17
-mhpmevent18
-mhpmevent19
-mhpmevent20
-mhpmevent21
-mhpmevent22
-mhpmevent23
-mhpmevent24
-mhpmevent25
-mhpmevent26
-mhpmevent27
-mhpmevent28
-mhpmevent29
-mhpmevent30
-mhpmevent31
-mvendorid
-marchid
-mimpid
-mhartid
-mcycle
-minstret
-mhpmcounter3
-mhpmcounter4
-mhpmcounter5
-mhpmcounter6
-mhpmcounter7
-mhpmcounter8
-mhpmcounter9
-mhpmcounter10
-mhpmcounter11
-mhpmcounter12
-mhpmcounter13
-mhpmcounter14
-mhpmcounter15
-mhpmcounter16
-mhpmcounter17
-mhpmcounter18
-mhpmcounter19
-mhpmcounter20
-mhpmcounter21
-mhpmcounter22
-mhpmcounter23
-mhpmcounter24
-mhpmcounter25
-mhpmcounter26
-mhpmcounter27
-mhpmcounter28
-mhpmcounter29
-mhpmcounter30
-mhpmcounter31
-mcycleh
-minstreth
-mhpmcounter3h
-mhpmcounter4h
-mhpmcounter5h
-mhpmcounter6h
-mhpmcounter7h
-mhpmcounter8h
-mhpmcounter9h
-mhpmcounter10h
-mhpmcounter11h
-mhpmcounter12h
-mhpmcounter13h
-mhpmcounter14h
-mhpmcounter15h
-mhpmcounter16h
-mhpmcounter17h
-mhpmcounter18h
-mhpmcounter19h
-mhpmcounter20h
-mhpmcounter21h
-mhpmcounter22h
-mhpmcounter23h
-mhpmcounter24h
-mhpmcounter25h
-mhpmcounter26h
-mhpmcounter27h
-mhpmcounter28h
-mhpmcounter29h
-mhpmcounter30h
-mhpmcounter31h
-tselect
-tdata1
-tdata2
-tdata3
-dcsr
-dpc
-dscratch
diff --git a/bsp/coreip-e76-arty/metal-inline.h b/bsp/coreip-e76-arty/metal-inline.h
deleted file mode 100644
index e844fd8..0000000
--- a/bsp/coreip-e76-arty/metal-inline.h
+++ /dev/null
@@ -1,266 +0,0 @@
-/* Copyright 2019 SiFive, Inc */
-/* SPDX-License-Identifier: Apache-2.0 */
-/* ----------------------------------- */
-/* ----------------------------------- */
-
-#ifndef ASSEMBLY
-
-#ifndef COREIP_E76_ARTY__METAL_INLINE_H
-#define COREIP_E76_ARTY__METAL_INLINE_H
-
-#include <metal/machine.h>
-
-
-/* --------------------- fixed_clock ------------ */
-extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock *clock);
-
-
-/* --------------------- fixed_factor_clock ------------ */
-
-
-/* --------------------- sifive_clint0 ------------ */
-extern inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller);
-extern inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller);
-extern inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller);
-extern inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx);
-extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx);
-
-
-/* --------------------- cpu ------------ */
-extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu);
-extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu);
-extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu);
-extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu);
-
-
-/* --------------------- sifive_plic0 ------------ */
-extern inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller);
-extern inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller);
-extern inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller);
-extern inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller);
-extern inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx);
-extern inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx);
-
-
-/* --------------------- sifive_clic0 ------------ */
-
-
-/* --------------------- sifive_local_external_interrupts0 ------------ */
-
-
-/* --------------------- sifive_global_external_interrupts0 ------------ */
-extern inline int __metal_driver_sifive_global_external_interrupts0_init_done( );
-extern inline struct metal_interrupt * __metal_driver_sifive_global_external_interrupts0_interrupt_parent(struct metal_interrupt *controller);
-extern inline int __metal_driver_sifive_global_external_interrupts0_num_interrupts(struct metal_interrupt *controller);
-extern inline int __metal_driver_sifive_global_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx);
-
-
-/* --------------------- sifive_gpio0 ------------ */
-extern inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio);
-extern inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio);
-extern inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio);
-extern inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio);
-extern inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx);
-
-
-/* --------------------- sifive_gpio_button ------------ */
-extern inline struct metal_gpio * __metal_driver_sifive_gpio_button_gpio(struct metal_button *button);
-extern inline int __metal_driver_sifive_gpio_button_pin(struct metal_button *button);
-extern inline struct metal_interrupt * __metal_driver_sifive_gpio_button_interrupt_controller(struct metal_button *button);
-extern inline int __metal_driver_sifive_gpio_button_interrupt_line(struct metal_button *button);
-extern inline char * __metal_driver_sifive_gpio_button_label(struct metal_button *button);
-
-
-/* --------------------- sifive_gpio_led ------------ */
-extern inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led);
-extern inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led);
-extern inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led);
-
-
-/* --------------------- sifive_gpio_switch ------------ */
-extern inline struct metal_gpio * __metal_driver_sifive_gpio_switch_gpio(struct metal_switch *flip);
-extern inline int __metal_driver_sifive_gpio_switch_pin(struct metal_switch *flip);
-extern inline struct metal_interrupt * __metal_driver_sifive_gpio_switch_interrupt_controller(struct metal_switch *flip);
-extern inline int __metal_driver_sifive_gpio_switch_interrupt_line(struct metal_switch *flip);
-extern inline char * __metal_driver_sifive_gpio_switch_label(struct metal_switch *flip);
-
-
-/* --------------------- sifive_spi0 ------------ */
-extern inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi);
-extern inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi);
-extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi);
-extern inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi);
-extern inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi);
-
-
-/* --------------------- sifive_test0 ------------ */
-extern inline unsigned long __metal_driver_sifive_test0_base( );
-extern inline unsigned long __metal_driver_sifive_test0_size( );
-
-
-/* --------------------- sifive_uart0 ------------ */
-extern inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart);
-extern inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart);
-extern inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart);
-extern inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart);
-extern inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart);
-extern inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart);
-extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart);
-extern inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart);
-extern inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart);
-
-
-/* --------------------- sifive_fe310_g000_hfrosc ------------ */
-
-
-/* --------------------- sifive_fe310_g000_hfxosc ------------ */
-
-
-/* --------------------- sifive_fe310_g000_pll ------------ */
-
-
-/* --------------------- fe310_g000_prci ------------ */
-
-
-/* --------------------- sifive_fu540_c000_l2 ------------ */
-
-
-/* From tlclk */
-struct __metal_driver_fixed_clock __metal_dt_tlclk = {
- .clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
-};
-
-struct metal_memory __metal_dt_mem_memory_80000000 = {
- ._base_address = 2147483648UL,
- ._size = 268435456UL,
- ._attrs = {
- .R = 1,
- .W = 1,
- .X = 1,
- .C = 1,
- .A = 1},
-};
-
-struct metal_memory __metal_dt_mem_spi_20004000 = {
- ._base_address = 1073741824UL,
- ._size = 536870912UL,
- ._attrs = {
- .R = 1,
- .W = 1,
- .X = 1,
- .C = 1,
- .A = 1},
-};
-
-/* From clint@2000000 */
-struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
- .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable,
- .init_done = 0,
-};
-
-/* From cpu@0 */
-struct __metal_driver_cpu __metal_dt_cpu_0 = {
- .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable,
-};
-
-/* From interrupt_controller */
-struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = {
- .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable,
- .init_done = 0,
-};
-
-/* From interrupt_controller@c000000 */
-struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
- .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable,
- .init_done = 0,
-};
-
-/* From global_external_interrupts */
-struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = {
- .irc.vtable = &__metal_driver_vtable_sifive_global_external_interrupts0.global0_vtable,
- .init_done = 0,
-};
-
-/* From gpio@10060000 */
-struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10060000 = {
- .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio,
-};
-
-/* From gpio@20002000 */
-struct __metal_driver_sifive_gpio0 __metal_dt_gpio_20002000 = {
- .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio,
-};
-
-/* From button@0 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_0 = {
- .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable,
-};
-
-/* From button@1 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_1 = {
- .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable,
-};
-
-/* From button@2 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_2 = {
- .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable,
-};
-
-/* From button@3 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_3 = {
- .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable,
-};
-
-/* From led@0red */
-struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = {
- .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable,
-};
-
-/* From led@0green */
-struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = {
- .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable,
-};
-
-/* From led@0blue */
-struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = {
- .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable,
-};
-
-/* From switch@0 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_0 = {
- .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable,
-};
-
-/* From switch@1 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_1 = {
- .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable,
-};
-
-/* From switch@2 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_2 = {
- .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable,
-};
-
-/* From switch@3 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_3 = {
- .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable,
-};
-
-/* From spi@20004000 */
-struct __metal_driver_sifive_spi0 __metal_dt_spi_20004000 = {
- .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi,
-};
-
-/* From teststatus@4000 */
-struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = {
- .shutdown.vtable = &__metal_driver_vtable_sifive_test0.shutdown,
-};
-
-/* From serial@20000000 */
-struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000 = {
- .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart,
-};
-
-
-#endif /* COREIP_E76_ARTY__METAL_INLINE_H*/
-#endif /* ! ASSEMBLY */
diff --git a/bsp/coreip-e76-arty/metal-platform.h b/bsp/coreip-e76-arty/metal-platform.h
deleted file mode 100644
index 17448df..0000000
--- a/bsp/coreip-e76-arty/metal-platform.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/* Copyright 2019 SiFive, Inc */
-/* SPDX-License-Identifier: Apache-2.0 */
-/* ----------------------------------- */
-/* ----------------------------------- */
-
-#ifndef COREIP_E76_ARTY__METAL_PLATFORM_H
-#define COREIP_E76_ARTY__METAL_PLATFORM_H
-
-/* From tlclk */
-#define METAL_FIXED_CLOCK__CLOCK_FREQUENCY 32500000UL
-
-#define METAL_FIXED_CLOCK
-
-/* From clint@2000000 */
-#define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL
-#define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL
-#define METAL_RISCV_CLINT0_2000000_SIZE 65536UL
-#define METAL_RISCV_CLINT0_0_SIZE 65536UL
-
-#define METAL_RISCV_CLINT0
-#define METAL_RISCV_CLINT0_MSIP_BASE 0UL
-#define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL
-#define METAL_RISCV_CLINT0_MTIME 49144UL
-
-/* From interrupt_controller@c000000 */
-#define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL
-#define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL
-#define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL
-#define METAL_RISCV_PLIC0_0_SIZE 67108864UL
-#define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL
-#define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL
-#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 31UL
-#define METAL_RISCV_PLIC0_0_RISCV_NDEV 31UL
-
-#define METAL_RISCV_PLIC0
-#define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL
-#define METAL_RISCV_PLIC0_PENDING_BASE 4096UL
-#define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL
-#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL
-#define METAL_RISCV_PLIC0_CLAIM 2097156UL
-
-/* From global_external_interrupts */
-
-#define METAL_SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0
-
-/* From gpio@10060000 */
-#define METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS 268828672UL
-#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268828672UL
-#define METAL_SIFIVE_GPIO0_10060000_SIZE 4096UL
-#define METAL_SIFIVE_GPIO0_0_SIZE 4096UL
-
-/* From gpio@20002000 */
-#define METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS 536879104UL
-#define METAL_SIFIVE_GPIO0_1_BASE_ADDRESS 536879104UL
-#define METAL_SIFIVE_GPIO0_20002000_SIZE 4096UL
-#define METAL_SIFIVE_GPIO0_1_SIZE 4096UL
-
-#define METAL_SIFIVE_GPIO0
-#define METAL_SIFIVE_GPIO0_VALUE 0UL
-#define METAL_SIFIVE_GPIO0_INPUT_EN 4UL
-#define METAL_SIFIVE_GPIO0_OUTPUT_EN 8UL
-#define METAL_SIFIVE_GPIO0_PORT 12UL
-#define METAL_SIFIVE_GPIO0_PUE 16UL
-#define METAL_SIFIVE_GPIO0_DS 20UL
-#define METAL_SIFIVE_GPIO0_RISE_IE 24UL
-#define METAL_SIFIVE_GPIO0_RISE_IP 28UL
-#define METAL_SIFIVE_GPIO0_FALL_IE 32UL
-#define METAL_SIFIVE_GPIO0_FALL_IP 36UL
-#define METAL_SIFIVE_GPIO0_HIGH_IE 40UL
-#define METAL_SIFIVE_GPIO0_HIGH_IP 44UL
-#define METAL_SIFIVE_GPIO0_LOW_IE 48UL
-#define METAL_SIFIVE_GPIO0_LOW_IP 52UL
-#define METAL_SIFIVE_GPIO0_IOF_EN 56UL
-#define METAL_SIFIVE_GPIO0_IOF_SEL 60UL
-#define METAL_SIFIVE_GPIO0_OUT_XOR 64UL
-
-/* From button@0 */
-
-/* From button@1 */
-
-/* From button@2 */
-
-/* From button@3 */
-
-#define METAL_SIFIVE_GPIO_BUTTONS
-
-/* From led@0red */
-
-/* From led@0green */
-
-/* From led@0blue */
-
-#define METAL_SIFIVE_GPIO_LEDS
-
-/* From switch@0 */
-
-/* From switch@1 */
-
-/* From switch@2 */
-
-/* From switch@3 */
-
-#define METAL_SIFIVE_GPIO_SWITCHES
-
-/* From pwm@20005000 */
-#define METAL_SIFIVE_PWM0_20005000_BASE_ADDRESS 536891392UL
-#define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 536891392UL
-#define METAL_SIFIVE_PWM0_20005000_SIZE 4096UL
-#define METAL_SIFIVE_PWM0_0_SIZE 4096UL
-
-#define METAL_SIFIVE_PWM0
-#define METAL_SIFIVE_PWM0_PWMCFG 0UL
-#define METAL_SIFIVE_PWM0_PWMCOUNT 8UL
-#define METAL_SIFIVE_PWM0_PWMS 16UL
-#define METAL_SIFIVE_PWM0_PWMCMP0 32UL
-#define METAL_SIFIVE_PWM0_PWMCMP1 36UL
-#define METAL_SIFIVE_PWM0_PWMCMP2 40UL
-#define METAL_SIFIVE_PWM0_PWMCMP3 44UL
-
-/* From spi@20004000 */
-#define METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS 536887296UL
-#define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 536887296UL
-#define METAL_SIFIVE_SPI0_20004000_SIZE 4096UL
-#define METAL_SIFIVE_SPI0_0_SIZE 4096UL
-
-#define METAL_SIFIVE_SPI0
-#define METAL_SIFIVE_SPI0_SCKDIV 0UL
-#define METAL_SIFIVE_SPI0_SCKMODE 4UL
-#define METAL_SIFIVE_SPI0_CSID 16UL
-#define METAL_SIFIVE_SPI0_CSDEF 20UL
-#define METAL_SIFIVE_SPI0_CSMODE 24UL
-#define METAL_SIFIVE_SPI0_DELAY0 40UL
-#define METAL_SIFIVE_SPI0_DELAY1 44UL
-#define METAL_SIFIVE_SPI0_FMT 64UL
-#define METAL_SIFIVE_SPI0_TXDATA 72UL
-#define METAL_SIFIVE_SPI0_RXDATA 76UL
-#define METAL_SIFIVE_SPI0_TXMARK 80UL
-#define METAL_SIFIVE_SPI0_RXMARK 84UL
-#define METAL_SIFIVE_SPI0_FCTRL 96UL
-#define METAL_SIFIVE_SPI0_FFMT 100UL
-#define METAL_SIFIVE_SPI0_IE 112UL
-#define METAL_SIFIVE_SPI0_IP 116UL
-
-/* From teststatus@4000 */
-#define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL
-#define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL
-#define METAL_SIFIVE_TEST0_4000_SIZE 4096UL
-#define METAL_SIFIVE_TEST0_0_SIZE 4096UL
-
-#define METAL_SIFIVE_TEST0
-#define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL
-
-/* From serial@20000000 */
-#define METAL_SIFIVE_UART0_20000000_BASE_ADDRESS 536870912UL
-#define METAL_SIFIVE_UART0_0_BASE_ADDRESS 536870912UL
-#define METAL_SIFIVE_UART0_20000000_SIZE 4096UL
-#define METAL_SIFIVE_UART0_0_SIZE 4096UL
-
-#define METAL_SIFIVE_UART0
-#define METAL_SIFIVE_UART0_TXDATA 0UL
-#define METAL_SIFIVE_UART0_RXDATA 4UL
-#define METAL_SIFIVE_UART0_TXCTRL 8UL
-#define METAL_SIFIVE_UART0_RXCTRL 12UL
-#define METAL_SIFIVE_UART0_IE 16UL
-#define METAL_SIFIVE_UART0_IP 20UL
-#define METAL_SIFIVE_UART0_DIV 24UL
-
-#endif /* COREIP_E76_ARTY__METAL_PLATFORM_H*/
diff --git a/bsp/coreip-e76-arty/metal.default.lds b/bsp/coreip-e76-arty/metal.default.lds
deleted file mode 100644
index 34ddf0c..0000000
--- a/bsp/coreip-e76-arty/metal.default.lds
+++ /dev/null
@@ -1,234 +0,0 @@
-/* Copyright 2019 SiFive, Inc */
-/* SPDX-License-Identifier: Apache-2.0 */
-/* ----------------------------------- */
-/* ----------------------------------- */
-
-OUTPUT_ARCH("riscv")
-
-ENTRY(_enter)
-
-MEMORY
-{
- ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000000
- flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 0x1fc00000
-}
-
-PHDRS
-{
- flash PT_LOAD;
- ram_init PT_LOAD;
- itim_init PT_LOAD;
- ram PT_NULL;
- itim PT_NULL;
-}
-
-SECTIONS
-{
- __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
- PROVIDE(__stack_size = __stack_size);
- __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
- PROVIDE(__metal_boot_hart = 0);
- PROVIDE(__metal_chicken_bit = 1);
-
-
- .init :
- {
- KEEP (*(.text.metal.init.enter))
- KEEP (*(SORT_NONE(.init)))
- KEEP (*(.text.libgloss.start))
- } >flash AT>flash :flash
-
-
- .text :
- {
- *(.text.unlikely .text.unlikely.*)
- *(.text.startup .text.startup.*)
- *(.text .text.*)
- *(.itim .itim.*)
- *(.gnu.linkonce.t.*)
- } >flash AT>flash :flash
-
-
- .fini :
- {
- KEEP (*(SORT_NONE(.fini)))
- } >flash AT>flash :flash
-
-
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
-
-
- .rodata :
- {
- *(.rdata)
- *(.rodata .rodata.*)
- *(.gnu.linkonce.r.*)
- . = ALIGN(8);
- *(.srodata.cst16)
- *(.srodata.cst8)
- *(.srodata.cst4)
- *(.srodata.cst2)
- *(.srodata .srodata.*)
- } >flash AT>flash :flash
-
-
- . = ALIGN(4);
-
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >flash AT>flash :flash
-
-
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
- KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >flash AT>flash :flash
-
-
- .finit_array :
- {
- PROVIDE_HIDDEN (__finit_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
- KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__finit_array_end = .);
- } >flash AT>flash :flash
-
-
- .ctors :
- {
- /* gcc uses crtbegin.o to find the start of
- the constructors, so we make sure it is
- first. Because this is a wildcard, it
- doesn't matter if the user does not
- actually link against crtbegin.o; the
- linker won't look for a file to match a
- wildcard. The wildcard also means that it
- doesn't matter which directory crtbegin.o
- is in. */
- KEEP (*crtbegin.o(.ctors))
- KEEP (*crtbegin?.o(.ctors))
- /* We don't want to include the .ctor section from
- the crtend.o file until after the sorted ctors.
- The .ctor section from the crtend file contains the
- end of ctors marker and it must be last */
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- } >flash AT>flash :flash
-
-
- .dtors :
- {
- KEEP (*crtbegin.o(.dtors))
- KEEP (*crtbegin?.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- } >flash AT>flash :flash
-
-
- .litimalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_itim_source_start = . );
- } >flash AT>flash :flash
-
-
- .ditimalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_itim_target_start = . );
- } >ram AT>flash :ram_init
-
-
- .itim :
- {
- *(.itim .itim.*)
- } >flash AT>flash :flash
-
-
- . = ALIGN(8);
- PROVIDE( metal_segment_itim_target_end = . );
-
-
- .lalign :
- {
- . = ALIGN(4);
- PROVIDE( _data_lma = . );
- PROVIDE( metal_segment_data_source_start = . );
- } >flash AT>flash :flash
-
-
- .dalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_data_target_start = . );
- } >ram AT>flash :ram_init
-
-
- .data :
- {
- *(.data .data.*)
- *(.gnu.linkonce.d.*)
- . = ALIGN(8);
- PROVIDE( __global_pointer$ = . + 0x800 );
- *(.sdata .sdata.* .sdata2.*)
- *(.gnu.linkonce.s.*)
- } >ram AT>flash :ram_init
-
-
- . = ALIGN(4);
- PROVIDE( _edata = . );
- PROVIDE( edata = . );
- PROVIDE( metal_segment_data_target_end = . );
- PROVIDE( _fbss = . );
- PROVIDE( __bss_start = . );
- PROVIDE( metal_segment_bss_target_start = . );
-
-
- .bss :
- {
- *(.sbss*)
- *(.gnu.linkonce.sb.*)
- *(.bss .bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN(4);
- } >ram AT>ram :ram
-
-
- . = ALIGN(8);
- PROVIDE( _end = . );
- PROVIDE( end = . );
- PROVIDE( metal_segment_bss_target_end = . );
-
-
- .stack :
- {
- PROVIDE(metal_segment_stack_begin = .);
- . = __stack_size;
- PROVIDE( _sp = . );
- PROVIDE(metal_segment_stack_end = .);
- } >ram AT>ram :ram
-
-
- .heap :
- {
- PROVIDE( metal_segment_heap_target_start = . );
- . = __heap_size;
- PROVIDE( metal_segment_heap_target_end = . );
- PROVIDE( _heap_end = . );
- } >ram AT>ram :ram
-
-
-}
-
diff --git a/bsp/coreip-e76-arty/metal.h b/bsp/coreip-e76-arty/metal.h
deleted file mode 100644
index 72473a2..0000000
--- a/bsp/coreip-e76-arty/metal.h
+++ /dev/null
@@ -1,968 +0,0 @@
-/* Copyright 2019 SiFive, Inc */
-/* SPDX-License-Identifier: Apache-2.0 */
-/* ----------------------------------- */
-/* ----------------------------------- */
-
-#ifndef ASSEMBLY
-
-#include <metal/machine/platform.h>
-
-#ifdef __METAL_MACHINE_MACROS
-
-#ifndef MACROS_IF_COREIP_E76_ARTY__METAL_H
-#define MACROS_IF_COREIP_E76_ARTY__METAL_H
-
-#define __METAL_CLINT_NUM_PARENTS 2
-
-#ifndef __METAL_CLINT_NUM_PARENTS
-#define __METAL_CLINT_NUM_PARENTS 0
-#endif
-#define __METAL_PLIC_SUBINTERRUPTS 31
-
-#define __METAL_PLIC_NUM_PARENTS 1
-
-#ifndef __METAL_PLIC_SUBINTERRUPTS
-#define __METAL_PLIC_SUBINTERRUPTS 0
-#endif
-#ifndef __METAL_PLIC_NUM_PARENTS
-#define __METAL_PLIC_NUM_PARENTS 0
-#endif
-#ifndef __METAL_CLIC_SUBINTERRUPTS
-#define __METAL_CLIC_SUBINTERRUPTS 0
-#endif
-
-#endif /* MACROS_IF_COREIP_E76_ARTY__METAL_H*/
-
-#else /* ! __METAL_MACHINE_MACROS */
-
-#ifndef MACROS_ELSE_COREIP_E76_ARTY__METAL_H
-#define MACROS_ELSE_COREIP_E76_ARTY__METAL_H
-
-#define __METAL_CLINT_2000000_INTERRUPTS 2
-
-#define METAL_MAX_CLINT_INTERRUPTS 2
-
-#define __METAL_CLINT_NUM_PARENTS 2
-
-#define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1
-
-#define __METAL_PLIC_SUBINTERRUPTS 31
-
-#define METAL_MAX_PLIC_INTERRUPTS 1
-
-#define __METAL_PLIC_NUM_PARENTS 1
-
-#define __METAL_CLIC_SUBINTERRUPTS 0
-#define METAL_MAX_CLIC_INTERRUPTS 0
-
-#define METAL_MAX_LOCAL_EXT_INTERRUPTS 0
-
-#define __METAL_GLOBAL_EXTERNAL_INTERRUPTS_INTERRUPTS 4
-
-#define METAL_MAX_GLOBAL_EXT_INTERRUPTS 4
-
-#define __METAL_GPIO_10060000_INTERRUPTS 4
-
-#define __METAL_GPIO_20002000_INTERRUPTS 16
-
-#define METAL_MAX_GPIO_INTERRUPTS 16
-
-#define __METAL_SERIAL_20000000_INTERRUPTS 1
-
-#define METAL_MAX_UART_INTERRUPTS 1
-
-
-#include <metal/drivers/fixed-clock.h>
-#include <metal/memory.h>
-#include <metal/drivers/riscv_clint0.h>
-#include <metal/drivers/riscv_cpu.h>
-#include <metal/drivers/riscv_plic0.h>
-#include <metal/pmp.h>
-#include <metal/drivers/sifive_global-external-interrupts0.h>
-#include <metal/drivers/sifive_gpio0.h>
-#include <metal/drivers/sifive_gpio-buttons.h>
-#include <metal/drivers/sifive_gpio-leds.h>
-#include <metal/drivers/sifive_gpio-switches.h>
-#include <metal/drivers/sifive_spi0.h>
-#include <metal/drivers/sifive_test0.h>
-#include <metal/drivers/sifive_uart0.h>
-
-/* From tlclk */
-struct __metal_driver_fixed_clock __metal_dt_tlclk;
-
-struct metal_memory __metal_dt_mem_memory_80000000;
-
-struct metal_memory __metal_dt_mem_spi_20004000;
-
-/* From clint@2000000 */
-struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
-
-/* From cpu@0 */
-struct __metal_driver_cpu __metal_dt_cpu_0;
-
-struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller;
-
-/* From interrupt_controller@c000000 */
-struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000;
-
-struct metal_pmp __metal_dt_pmp;
-
-/* From global_external_interrupts */
-struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts;
-
-/* From gpio@10060000 */
-struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10060000;
-
-/* From gpio@20002000 */
-struct __metal_driver_sifive_gpio0 __metal_dt_gpio_20002000;
-
-/* From button@0 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_0;
-
-/* From button@1 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_1;
-
-/* From button@2 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_2;
-
-/* From button@3 */
-struct __metal_driver_sifive_gpio_button __metal_dt_button_3;
-
-/* From led@0red */
-struct __metal_driver_sifive_gpio_led __metal_dt_led_0red;
-
-/* From led@0green */
-struct __metal_driver_sifive_gpio_led __metal_dt_led_0green;
-
-/* From led@0blue */
-struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue;
-
-/* From switch@0 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_0;
-
-/* From switch@1 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_1;
-
-/* From switch@2 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_2;
-
-/* From switch@3 */
-struct __metal_driver_sifive_gpio_switch __metal_dt_switch_3;
-
-/* From spi@20004000 */
-struct __metal_driver_sifive_spi0 __metal_dt_spi_20004000;
-
-/* From teststatus@4000 */
-struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000;
-
-/* From serial@20000000 */
-struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000;
-
-
-
-/* --------------------- fixed_clock ------------ */
-static inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock *clock)
-{
- if ((uintptr_t)clock == (uintptr_t)&__metal_dt_tlclk) {
- return METAL_FIXED_CLOCK__CLOCK_FREQUENCY;
- }
- else {
- return 0;
- }
-}
-
-
-
-/* --------------------- fixed_factor_clock ------------ */
-
-
-/* --------------------- sifive_clint0 ------------ */
-static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) {
- return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS;
- }
- else {
- return 0;
- }
-}
-
-static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) {
- return METAL_RISCV_CLINT0_2000000_SIZE;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) {
- return METAL_MAX_CLINT_INTERRUPTS;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx)
-{
- if (idx == 0) {
- return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
- }
- else if (idx == 1) {
- return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx)
-{
- if (idx == 0) {
- return 3;
- }
- else if (idx == 1) {
- return 7;
- }
- else {
- return 0;
- }
-}
-
-
-
-/* --------------------- cpu ------------ */
-static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu)
-{
- if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
- return 0;
- }
- else {
- return -1;
- }
-}
-
-static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu)
-{
- if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
- return 65000000;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu)
-{
- if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
- return &__metal_dt_cpu_0_interrupt_controller.controller;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu)
-{
- if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
- return 8;
- }
- else {
- return 0;
- }
-}
-
-
-
-/* --------------------- sifive_plic0 ------------ */
-static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
- return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS;
- }
- else {
- return 0;
- }
-}
-
-static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
- return METAL_RISCV_PLIC0_C000000_SIZE;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
- return METAL_RISCV_PLIC0_C000000_RISCV_NDEV;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
- return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx)
-{
- if (idx == 0) {
- return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
- }
- else if (idx == 0) {
- return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx)
-{
- if (idx == 0) {
- return 11;
- }
- else if (idx == 0) {
- return 11;
- }
- else {
- return 0;
- }
-}
-
-
-
-/* --------------------- sifive_clic0 ------------ */
-
-
-/* --------------------- sifive_local_external_interrupts0 ------------ */
-
-
-/* --------------------- sifive_global_external_interrupts0 ------------ */
-static inline int __metal_driver_sifive_global_external_interrupts0_init_done()
-{
- return 0;
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_global_external_interrupts0_interrupt_parent(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_global_external_interrupts) {
- return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_global_external_interrupts0_num_interrupts(struct metal_interrupt *controller)
-{
- if ((uintptr_t)controller == (uintptr_t)&__metal_dt_global_external_interrupts) {
- return METAL_MAX_GLOBAL_EXT_INTERRUPTS;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_global_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx)
-{
- if (idx == 0) {
- return 21;
- }
- else if (idx == 1) {
- return 22;
- }
- else if (idx == 2) {
- return 23;
- }
- else if (idx == 3) {
- return 24;
- }
- else {
- return 0;
- }
-}
-
-
-
-/* --------------------- sifive_gpio0 ------------ */
-static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio)
-{
- if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) {
- return METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS;
- }
- else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) {
- return METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS;
- }
- else {
- return 0;
- }
-}
-
-static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio)
-{
- if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) {
- return METAL_SIFIVE_GPIO0_10060000_SIZE;
- }
- else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) {
- return METAL_SIFIVE_GPIO0_20002000_SIZE;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio)
-{
- if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) {
- return METAL_MAX_GPIO_INTERRUPTS;
- }
- else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) {
- return METAL_MAX_GPIO_INTERRUPTS;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio)
-{
- if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) {
- return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller;
- }
- else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) {
- return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx)
-{
- if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 0)) {
- return 27;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 1))) {
- return 28;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 2))) {
- return 29;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 3))) {
- return 30;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 0))) {
- return 1;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 1))) {
- return 2;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 2))) {
- return 3;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 3))) {
- return 4;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 4))) {
- return 5;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 5))) {
- return 6;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 6))) {
- return 7;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 7))) {
- return 8;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 8))) {
- return 9;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 9))) {
- return 10;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 10))) {
- return 11;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 11))) {
- return 12;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 12))) {
- return 13;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 13))) {
- return 14;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 14))) {
- return 15;
- }
- else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 15))) {
- return 16;
- }
- else {
- return 0;
- }
-}
-
-
-
-/* --------------------- sifive_gpio_button ------------ */
-static inline struct metal_gpio * __metal_driver_sifive_gpio_button_gpio(struct metal_button *button)
-{
- if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_gpio_button_pin(struct metal_button *button)
-{
- if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) {
- return 4;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) {
- return 5;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) {
- return 6;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) {
- return 7;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_gpio_button_interrupt_controller(struct metal_button *button)
-{
- if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_gpio_button_interrupt_line(struct metal_button *button)
-{
- if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) {
- return 0;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) {
- return 1;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) {
- return 2;
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) {
- return 3;
- }
- else {
- return 0;
- }
-}
-
-static inline char * __metal_driver_sifive_gpio_button_label(struct metal_button *button)
-{
- if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) {
- return "BTN0";
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) {
- return "BTN1";
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) {
- return "BTN2";
- }
- else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) {
- return "BTN3";
- }
- else {
- return "";
- }
-}
-
-
-
-/* --------------------- sifive_gpio_led ------------ */
-static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led)
-{
- if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) {
- return (struct metal_gpio *)&__metal_dt_gpio_10060000;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led)
-{
- if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) {
- return 0;
- }
- else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) {
- return 1;
- }
- else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) {
- return 2;
- }
- else {
- return 0;
- }
-}
-
-static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led)
-{
- if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) {
- return "LD0red";
- }
- else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) {
- return "LD0green";
- }
- else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) {
- return "LD0blue";
- }
- else {
- return "";
- }
-}
-
-
-
-/* --------------------- sifive_gpio_switch ------------ */
-static inline struct metal_gpio * __metal_driver_sifive_gpio_switch_gpio(struct metal_switch *flip)
-{
- return NULL;
-}
-
-static inline int __metal_driver_sifive_gpio_switch_pin(struct metal_switch *flip)
-{
- return 0;
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_gpio_switch_interrupt_controller(struct metal_switch *flip)
-{
- if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_0) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_1) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_2) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_3) {
- return (struct metal_interrupt *)&__metal_dt_global_external_interrupts;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_gpio_switch_interrupt_line(struct metal_switch *flip)
-{
- if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_0) {
- return 0;
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_1) {
- return 1;
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_2) {
- return 2;
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_3) {
- return 3;
- }
- else {
- return 0;
- }
-}
-
-static inline char * __metal_driver_sifive_gpio_switch_label(struct metal_switch *flip)
-{
- if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_0) {
- return "SW0";
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_1) {
- return "SW1";
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_2) {
- return "SW2";
- }
- else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_3) {
- return "SW3";
- }
- else {
- return "";
- }
-}
-
-
-
-/* --------------------- sifive_spi0 ------------ */
-static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi)
-{
- if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_20004000) {
- return METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS;
- }
- else {
- return 0;
- }
-}
-
-static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi)
-{
- if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_20004000) {
- return METAL_SIFIVE_SPI0_20004000_SIZE;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi)
-{
- return (struct metal_clock *)&__metal_dt_tlclk.clock;
-}
-
-static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi)
-{
- return NULL;
-}
-
-static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi)
-{
- return 0;
-}
-
-static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi)
-{
- return 0;
-}
-
-
-
-/* --------------------- sifive_test0 ------------ */
-static inline unsigned long __metal_driver_sifive_test0_base( )
-{
- return 16384;
-}
-
-static inline unsigned long __metal_driver_sifive_test0_size( )
-{
- return 4096;
-}
-
-
-
-/* --------------------- sifive_uart0 ------------ */
-static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart)
-{
- if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) {
- return METAL_SIFIVE_UART0_20000000_BASE_ADDRESS;
- }
- else {
- return 0;
- }
-}
-
-static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart)
-{
- if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) {
- return METAL_SIFIVE_UART0_20000000_SIZE;
- }
- else {
- return 0;
- }
-}
-
-static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart)
-{
- if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) {
- return METAL_MAX_UART_INTERRUPTS;
- }
- else {
- return 0;
- }
-}
-
-static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart)
-{
- if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) {
- return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller;
- }
- else {
- return NULL;
- }
-}
-
-static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart)
-{
- return 25;
-}
-
-static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart)
-{
- return (struct metal_clock *)&__metal_dt_tlclk.clock;
-}
-
-static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart)
-{
- return NULL;
-}
-
-static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart)
-{
- return 0;
-}
-
-static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart)
-{
- return 0;
-}
-
-
-
-/* --------------------- sifive_fe310_g000_hfrosc ------------ */
-
-
-/* --------------------- sifive_fe310_g000_hfxosc ------------ */
-
-
-/* --------------------- sifive_fe310_g000_pll ------------ */
-
-
-/* --------------------- sifive_fe310_g000_prci ------------ */
-
-
-/* --------------------- sifive_fu540_c000_l2 ------------ */
-
-
-#define __METAL_DT_MAX_MEMORIES 2
-
-asm (".weak __metal_memory_table");
-struct metal_memory *__metal_memory_table[] = {
- &__metal_dt_mem_memory_80000000,
- &__metal_dt_mem_spi_20004000};
-
-/* From serial@20000000 */
-#define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_20000000.uart)
-
-#define __METAL_DT_SERIAL_20000000_HANDLE (&__metal_dt_serial_20000000.uart)
-
-#define __METAL_DT_STDOUT_UART_BAUD 115200
-
-/* From clint@2000000 */
-#define __METAL_DT_RISCV_CLINT0_HANDLE (&__metal_dt_clint_2000000.controller)
-
-#define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller)
-
-#define __METAL_DT_MAX_HARTS 1
-
-asm (".weak __metal_cpu_table");
-struct __metal_driver_cpu *__metal_cpu_table[] = {
- &__metal_dt_cpu_0};
-
-/* From interrupt_controller@c000000 */
-#define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
-
-#define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
-
-#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp)
-
-/* From global_external_interrupts */
-#define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc)
-
-#define __METAL_DT_GLOBAL_EXTERNAL_INTERRUPTS_HANDLE (&__metal_dt_global_external_interrupts.irc)
-
-#define __MEE_DT_MAX_GPIOS 2
-
-asm (".weak __metal_gpio_table");
-struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = {
- &__metal_dt_gpio_10060000,
- &__metal_dt_gpio_20002000};
-
-#define __METAL_DT_MAX_BUTTONS 4
-
-asm (".weak __metal_button_table");
-struct __metal_driver_sifive_gpio_button *__metal_button_table[] = {
- &__metal_dt_button_0,
- &__metal_dt_button_1,
- &__metal_dt_button_2,
- &__metal_dt_button_3};
-
-#define __METAL_DT_MAX_LEDS 3
-
-asm (".weak __metal_led_table");
-struct __metal_driver_sifive_gpio_led *__metal_led_table[] = {
- &__metal_dt_led_0red,
- &__metal_dt_led_0green,
- &__metal_dt_led_0blue};
-
-#define __METAL_DT_MAX_SWITCHES 4
-
-asm (".weak __metal_switch_table");
-struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = {
- &__metal_dt_switch_0,
- &__metal_dt_switch_1,
- &__metal_dt_switch_2,
- &__metal_dt_switch_3};
-
-#define __METAL_DT_MAX_SPIS 1
-
-asm (".weak __metal_spi_table");
-struct __metal_driver_sifive_spi0 *__metal_spi_table[] = {
- &__metal_dt_spi_20004000};
-
-/* From teststatus@4000 */
-#define __METAL_DT_SHUTDOWN_HANDLE (&__metal_dt_teststatus_4000.shutdown)
-
-#define __METAL_DT_TESTSTATUS_4000_HANDLE (&__metal_dt_teststatus_4000.shutdown)
-
-#endif /* MACROS_ELSE_COREIP_E76_ARTY__METAL_H*/
-
-#endif /* ! __METAL_MACHINE_MACROS */
-
-#endif /* ! ASSEMBLY */
diff --git a/bsp/coreip-e76-arty/metal.ramrodata.lds b/bsp/coreip-e76-arty/metal.ramrodata.lds
deleted file mode 100644
index 3bbe585..0000000
--- a/bsp/coreip-e76-arty/metal.ramrodata.lds
+++ /dev/null
@@ -1,231 +0,0 @@
-/* Copyright 2019 SiFive, Inc */
-/* SPDX-License-Identifier: Apache-2.0 */
-/* ----------------------------------- */
-/* ----------------------------------- */
-
-OUTPUT_ARCH("riscv")
-
-ENTRY(_enter)
-
-MEMORY
-{
- ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000000
- flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 0x1fc00000
-}
-
-PHDRS
-{
- flash PT_LOAD;
- ram_init PT_LOAD;
- itim_init PT_LOAD;
- ram PT_NULL;
- itim PT_NULL;
-}
-
-SECTIONS
-{
- __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
- PROVIDE(__stack_size = __stack_size);
- __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
- PROVIDE(__metal_boot_hart = 0);
- PROVIDE(__metal_chicken_bit = 1);
-
-
- .init :
- {
- KEEP (*(.text.metal.init.enter))
- KEEP (*(SORT_NONE(.init)))
- KEEP (*(.text.libgloss.start))
- } >flash AT>flash :flash
-
-
-
-
- .fini :
- {
- KEEP (*(SORT_NONE(.fini)))
- } >flash AT>flash :flash
-
-
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
-
-
-
-
- . = ALIGN(4);
-
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >flash AT>flash :flash
-
-
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
- KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >flash AT>flash :flash
-
-
- .finit_array :
- {
- PROVIDE_HIDDEN (__finit_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
- KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__finit_array_end = .);
- } >flash AT>flash :flash
-
-
- .ctors :
- {
- /* gcc uses crtbegin.o to find the start of
- the constructors, so we make sure it is
- first. Because this is a wildcard, it
- doesn't matter if the user does not
- actually link against crtbegin.o; the
- linker won't look for a file to match a
- wildcard. The wildcard also means that it
- doesn't matter which directory crtbegin.o
- is in. */
- KEEP (*crtbegin.o(.ctors))
- KEEP (*crtbegin?.o(.ctors))
- /* We don't want to include the .ctor section from
- the crtend.o file until after the sorted ctors.
- The .ctor section from the crtend file contains the
- end of ctors marker and it must be last */
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- } >flash AT>flash :flash
-
-
- .dtors :
- {
- KEEP (*crtbegin.o(.dtors))
- KEEP (*crtbegin?.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- } >flash AT>flash :flash
-
-
- .litimalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_itim_source_start = . );
- } >flash AT>flash :flash
-
-
- .ditimalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_itim_target_start = . );
- } >ram AT>flash :ram_init
-
-
- .itim :
- {
- *(.itim .itim.*)
- } >flash AT>flash :flash
-
-
- . = ALIGN(8);
- PROVIDE( metal_segment_itim_target_end = . );
- .text :
- {
- *(.text.unlikely .text.unlikely.*)
- *(.text.startup .text.startup.*)
- *(.text .text.*)
- *(.gnu.linkonce.t.*)
- *(.itim .itim.*)
- } >flash AT>flash :flash
-
-
- .lalign :
- {
- . = ALIGN(4);
- PROVIDE( _data_lma = . );
- PROVIDE( metal_segment_data_source_start = . );
- } >flash AT>flash :flash
-
-
- .dalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_data_target_start = . );
- } >ram AT>flash :ram_init
-
-
- .data :
- {
- *(.rdata)
- *(.rodata .rodata.*)
- *(.gnu.linkonce.r.*)
- . = ALIGN(8);
- *(.srodata.cst16)
- *(.srodata.cst8)
- *(.srodata.cst4)
- *(.srodata.cst2)
- *(.srodata .srodata.*)
- *(.data .data.*)
- *(.gnu.linkonce.d.*)
- . = ALIGN(8);
- PROVIDE( __global_pointer$ = . + 0x800 );
- *(.sdata .sdata.* .sdata2.*)
- *(.gnu.linkonce.s.*)
- } >ram AT>flash :ram_init
-
-
- . = ALIGN(4);
- PROVIDE( _edata = . );
- PROVIDE( edata = . );
- PROVIDE( metal_segment_data_target_end = . );
- PROVIDE( _fbss = . );
- PROVIDE( __bss_start = . );
- PROVIDE( metal_segment_bss_target_start = . );
-
-
- .bss :
- {
- *(.sbss*)
- *(.gnu.linkonce.sb.*)
- *(.bss .bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN(4);
- } >ram AT>ram :ram
-
-
- . = ALIGN(8);
- PROVIDE( _end = . );
- PROVIDE( end = . );
- PROVIDE( metal_segment_bss_target_end = . );
-
-
- .stack :
- {
- PROVIDE(metal_segment_stack_begin = .);
- . = __stack_size;
- PROVIDE( _sp = . );
- PROVIDE(metal_segment_stack_end = .);
- } >ram AT>ram :ram
-
-
- .heap :
- {
- PROVIDE( metal_segment_heap_target_start = . );
- . = __heap_size;
- PROVIDE( metal_segment_heap_target_end = . );
- PROVIDE( _heap_end = . );
- } >ram AT>ram :ram
-
-
-}
-
diff --git a/bsp/coreip-e76-arty/metal.scratchpad.lds b/bsp/coreip-e76-arty/metal.scratchpad.lds
deleted file mode 100644
index 196c865..0000000
--- a/bsp/coreip-e76-arty/metal.scratchpad.lds
+++ /dev/null
@@ -1,234 +0,0 @@
-/* Copyright 2019 SiFive, Inc */
-/* SPDX-License-Identifier: Apache-2.0 */
-/* ----------------------------------- */
-/* ----------------------------------- */
-
-OUTPUT_ARCH("riscv")
-
-ENTRY(_enter)
-
-MEMORY
-{
- ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000000
- flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 0x1fc00000
-}
-
-PHDRS
-{
- flash PT_LOAD;
- ram_init PT_LOAD;
- itim_init PT_LOAD;
- ram PT_LOAD;
- itim PT_LOAD;
-}
-
-SECTIONS
-{
- __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
- PROVIDE(__stack_size = __stack_size);
- __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
- PROVIDE(__metal_boot_hart = 0);
- PROVIDE(__metal_chicken_bit = 1);
-
-
- .init :
- {
- KEEP (*(.text.metal.init.enter))
- KEEP (*(SORT_NONE(.init)))
- KEEP (*(.text.libgloss.start))
- } >ram AT>ram :ram
-
-
- .text :
- {
- *(.text.unlikely .text.unlikely.*)
- *(.text.startup .text.startup.*)
- *(.text .text.*)
- *(.itim .itim.*)
- *(.gnu.linkonce.t.*)
- } >ram AT>ram :ram
-
-
- .fini :
- {
- KEEP (*(SORT_NONE(.fini)))
- } >ram AT>ram :ram
-
-
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
-
-
- .rodata :
- {
- *(.rdata)
- *(.rodata .rodata.*)
- *(.gnu.linkonce.r.*)
- . = ALIGN(8);
- *(.srodata.cst16)
- *(.srodata.cst8)
- *(.srodata.cst4)
- *(.srodata.cst2)
- *(.srodata .srodata.*)
- } >ram AT>ram :ram
-
-
- . = ALIGN(4);
-
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >ram AT>ram :ram
-
-
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
- KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >ram AT>ram :ram
-
-
- .finit_array :
- {
- PROVIDE_HIDDEN (__finit_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
- KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__finit_array_end = .);
- } >ram AT>ram :ram
-
-
- .ctors :
- {
- /* gcc uses crtbegin.o to find the start of
- the constructors, so we make sure it is
- first. Because this is a wildcard, it
- doesn't matter if the user does not
- actually link against crtbegin.o; the
- linker won't look for a file to match a
- wildcard. The wildcard also means that it
- doesn't matter which directory crtbegin.o
- is in. */
- KEEP (*crtbegin.o(.ctors))
- KEEP (*crtbegin?.o(.ctors))
- /* We don't want to include the .ctor section from
- the crtend.o file until after the sorted ctors.
- The .ctor section from the crtend file contains the
- end of ctors marker and it must be last */
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- } >ram AT>ram :ram
-
-
- .dtors :
- {
- KEEP (*crtbegin.o(.dtors))
- KEEP (*crtbegin?.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- } >ram AT>ram :ram
-
-
- .litimalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_itim_source_start = . );
- } >ram AT>ram :ram
-
-
- .ditimalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_itim_target_start = . );
- } >ram AT>ram :ram_init
-
-
- .itim :
- {
- *(.itim .itim.*)
- } >ram AT>ram :ram_init
-
-
- . = ALIGN(8);
- PROVIDE( metal_segment_itim_target_end = . );
-
-
- .lalign :
- {
- . = ALIGN(4);
- PROVIDE( _data_lma = . );
- PROVIDE( metal_segment_data_source_start = . );
- } >ram AT>ram :ram
-
-
- .dalign :
- {
- . = ALIGN(4);
- PROVIDE( metal_segment_data_target_start = . );
- } >ram AT>ram :ram_init
-
-
- .data :
- {
- *(.data .data.*)
- *(.gnu.linkonce.d.*)
- . = ALIGN(8);
- PROVIDE( __global_pointer$ = . + 0x800 );
- *(.sdata .sdata.* .sdata2.*)
- *(.gnu.linkonce.s.*)
- } >ram AT>ram :ram_init
-
-
- . = ALIGN(4);
- PROVIDE( _edata = . );
- PROVIDE( edata = . );
- PROVIDE( metal_segment_data_target_end = . );
- PROVIDE( _fbss = . );
- PROVIDE( __bss_start = . );
- PROVIDE( metal_segment_bss_target_start = . );
-
-
- .bss :
- {
- *(.sbss*)
- *(.gnu.linkonce.sb.*)
- *(.bss .bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN(4);
- } >ram AT>ram :ram
-
-
- . = ALIGN(8);
- PROVIDE( _end = . );
- PROVIDE( end = . );
- PROVIDE( metal_segment_bss_target_end = . );
-
-
- .stack :
- {
- PROVIDE(metal_segment_stack_begin = .);
- . = __stack_size;
- PROVIDE( _sp = . );
- PROVIDE(metal_segment_stack_end = .);
- } >ram AT>ram :ram
-
-
- .heap :
- {
- PROVIDE( metal_segment_heap_target_start = . );
- . = __heap_size;
- PROVIDE( metal_segment_heap_target_end = . );
- PROVIDE( _heap_end = . );
- } >ram AT>ram :ram
-
-
-}
-
diff --git a/bsp/coreip-e76-arty/openocd.cfg b/bsp/coreip-e76-arty/openocd.cfg
deleted file mode 100644
index 34b9f88..0000000
--- a/bsp/coreip-e76-arty/openocd.cfg
+++ /dev/null
@@ -1,30 +0,0 @@
-adapter_khz 10000
-
-#source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
-
-interface ftdi
-ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
-ftdi_vid_pid 0x15ba 0x002a
-
-ftdi_layout_init 0x0808 0x0a1b
-ftdi_layout_signal nSRST -oe 0x0200
-ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
-ftdi_layout_signal LED -data 0x0800
-#
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-flash bank my_first_flash fespi 0x40000000 0 0 0 $_TARGETNAME 0x20004000
-init
-#reset
-if {[ info exists pulse_srst]} {
- ftdi_set_signal nSRST 0
- ftdi_set_signal nSRST z
-}
-halt
-#flash protect 0 64 last off
diff --git a/bsp/coreip-e76-arty/settings.mk b/bsp/coreip-e76-arty/settings.mk
deleted file mode 100644
index 6f6f501..0000000
--- a/bsp/coreip-e76-arty/settings.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-# Copyright 2019 SiFive, Inc #
-# SPDX-License-Identifier: Apache-2.0 #
-# ----------------------------------- #
-# ----------------------------------- #
-
-RISCV_ARCH=rv32imafc
-RISCV_ABI=ilp32f
-RISCV_CMODEL=medlow
-RISCV_SERIES=sifive-7-series
-
-TARGET_TAGS=fpga openocd
-TARGET_DHRY_ITERS=20000000
-TARGET_CORE_ITERS=5000
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-25 14:26:45 +0000