diff options
Diffstat (limited to 'bsp/coreip-e76-arty')
-rw-r--r-- | bsp/coreip-e76-arty/metal-inline.h | 270 | ||||
-rw-r--r-- | bsp/coreip-e76-arty/metal-platform.h | 69 | ||||
-rw-r--r-- | bsp/coreip-e76-arty/metal.default.lds | 18 | ||||
-rw-r--r-- | bsp/coreip-e76-arty/metal.h | 1009 | ||||
-rw-r--r-- | bsp/coreip-e76-arty/metal.ramrodata.lds | 18 | ||||
-rw-r--r-- | bsp/coreip-e76-arty/metal.scratchpad.lds | 18 | ||||
-rw-r--r-- | bsp/coreip-e76-arty/settings.mk | 6 |
7 files changed, 1080 insertions, 328 deletions
diff --git a/bsp/coreip-e76-arty/metal-inline.h b/bsp/coreip-e76-arty/metal-inline.h new file mode 100644 index 0000000..bd8e58b --- /dev/null +++ b/bsp/coreip-e76-arty/metal-inline.h @@ -0,0 +1,270 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ + +#ifndef ASSEMBLY + +#ifndef COREIP_E76_ARTY__METAL_INLINE_H +#define COREIP_E76_ARTY__METAL_INLINE_H + +#include <metal/machine.h> + + +/* --------------------- fixed_clock ------------ */ +extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock *clock); + + +/* --------------------- fixed_factor_clock ------------ */ + + +/* --------------------- sifive_clint0 ------------ */ +extern inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); +extern inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); +extern inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); +extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); + + +/* --------------------- sifive_plic0 ------------ */ +extern inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); +extern inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); +extern inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ + + +/* --------------------- sifive_global_external_interrupts0 ------------ */ +extern inline int __metal_driver_sifive_global_external_interrupts0_init_done( ); +extern inline struct metal_interrupt * __metal_driver_sifive_global_external_interrupts0_interrupt_parent(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_global_external_interrupts0_num_interrupts(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_global_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- sifive_gpio0 ------------ */ +extern inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); +extern inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); +extern inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); +extern inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); +extern inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); + + +/* --------------------- sifive_gpio_button ------------ */ +extern inline struct metal_gpio * __metal_driver_sifive_gpio_button_gpio(struct metal_button *button); +extern inline int __metal_driver_sifive_gpio_button_pin(struct metal_button *button); +extern inline struct metal_interrupt * __metal_driver_sifive_gpio_button_interrupt_controller(struct metal_button *button); +extern inline int __metal_driver_sifive_gpio_button_interrupt_line(struct metal_button *button); +extern inline char * __metal_driver_sifive_gpio_button_label(struct metal_button *button); + + +/* --------------------- sifive_gpio_led ------------ */ +extern inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); +extern inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); +extern inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); + + +/* --------------------- sifive_gpio_switch ------------ */ +extern inline struct metal_gpio * __metal_driver_sifive_gpio_switch_gpio(struct metal_switch *flip); +extern inline int __metal_driver_sifive_gpio_switch_pin(struct metal_switch *flip); +extern inline struct metal_interrupt * __metal_driver_sifive_gpio_switch_interrupt_controller(struct metal_switch *flip); +extern inline int __metal_driver_sifive_gpio_switch_interrupt_line(struct metal_switch *flip); +extern inline char * __metal_driver_sifive_gpio_switch_label(struct metal_switch *flip); + + +/* --------------------- sifive_spi0 ------------ */ +extern inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); +extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); + + +/* --------------------- sifive_test0 ------------ */ +extern inline unsigned long __metal_driver_sifive_test0_base( ); +extern inline unsigned long __metal_driver_sifive_test0_size( ); + + +/* --------------------- sifive_uart0 ------------ */ +extern inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); +extern inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); +extern inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); +extern inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); +extern inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); +extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ + + +/* --------------------- sifive_fe310_g000_hfxosc ------------ */ + + +/* --------------------- sifive_fe310_g000_pll ------------ */ + + +/* --------------------- fe310_g000_prci ------------ */ + + +/* --------------------- sifive_fu540_c000_l2 ------------ */ + + +/* From tlclk */ +struct __metal_driver_fixed_clock __metal_dt_tlclk = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +struct metal_memory __metal_dt_mem_memory_80000000 = { + ._base_address = 2147483648UL, + ._size = 268435456UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_spi_20004000 = { + ._base_address = 1073741824UL, + ._size = 536870912UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +/* From clint@2000000 */ +struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { + .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable, + .init_done = 0, +}; + +/* From cpu@0 */ +struct __metal_driver_cpu __metal_dt_cpu_0 = { + .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, +}; + +/* From interrupt_controller */ +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { + .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, + .init_done = 0, +}; + +/* From interrupt_controller@c000000 */ +struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { + .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable, + .init_done = 0, +}; + +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = METAL_RISCV_PMP_0_NUM_REGIONS, +}; + +/* From global_external_interrupts */ +struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { + .irc.vtable = &__metal_driver_vtable_sifive_global_external_interrupts0.global0_vtable, + .init_done = 0, +}; + +/* From gpio@10060000 */ +struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10060000 = { + .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, +}; + +/* From gpio@20002000 */ +struct __metal_driver_sifive_gpio0 __metal_dt_gpio_20002000 = { + .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, +}; + +/* From button@0 */ +struct __metal_driver_sifive_gpio_button __metal_dt_button_0 = { + .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, +}; + +/* From button@1 */ +struct __metal_driver_sifive_gpio_button __metal_dt_button_1 = { + .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, +}; + +/* From button@2 */ +struct __metal_driver_sifive_gpio_button __metal_dt_button_2 = { + .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, +}; + +/* From button@3 */ +struct __metal_driver_sifive_gpio_button __metal_dt_button_3 = { + .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, +}; + +/* From led@0red */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From led@0green */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From led@0blue */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From switch@0 */ +struct __metal_driver_sifive_gpio_switch __metal_dt_switch_0 = { + .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, +}; + +/* From switch@1 */ +struct __metal_driver_sifive_gpio_switch __metal_dt_switch_1 = { + .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, +}; + +/* From switch@2 */ +struct __metal_driver_sifive_gpio_switch __metal_dt_switch_2 = { + .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, +}; + +/* From switch@3 */ +struct __metal_driver_sifive_gpio_switch __metal_dt_switch_3 = { + .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, +}; + +/* From spi@20004000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_20004000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + +/* From teststatus@4000 */ +struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = { + .shutdown.vtable = &__metal_driver_vtable_sifive_test0.shutdown, +}; + +/* From serial@20000000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000 = { + .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, +}; + + +#endif /* COREIP_E76_ARTY__METAL_INLINE_H*/ +#endif /* ! ASSEMBLY */ diff --git a/bsp/coreip-e76-arty/metal-platform.h b/bsp/coreip-e76-arty/metal-platform.h index f99ea6f..d99248d 100644 --- a/bsp/coreip-e76-arty/metal-platform.h +++ b/bsp/coreip-e76-arty/metal-platform.h @@ -1,3 +1,9 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ + #ifndef COREIP_E76_ARTY__METAL_PLATFORM_H #define COREIP_E76_ARTY__METAL_PLATFORM_H @@ -8,7 +14,9 @@ /* From clint@2000000 */ #define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL +#define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL #define METAL_RISCV_CLINT0_2000000_SIZE 65536UL +#define METAL_RISCV_CLINT0_0_SIZE 65536UL #define METAL_RISCV_CLINT0 #define METAL_RISCV_CLINT0_MSIP_BASE 0UL @@ -17,9 +25,13 @@ /* From interrupt_controller@c000000 */ #define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL +#define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL #define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL +#define METAL_RISCV_PLIC0_0_SIZE 67108864UL #define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL +#define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL #define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 31UL +#define METAL_RISCV_PLIC0_0_RISCV_NDEV 31UL #define METAL_RISCV_PLIC0 #define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL @@ -33,13 +45,21 @@ #define METAL_RISCV_PMP +/* From global_external_interrupts */ + +#define METAL_SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0 + /* From gpio@10060000 */ #define METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS 268828672UL +#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268828672UL #define METAL_SIFIVE_GPIO0_10060000_SIZE 4096UL +#define METAL_SIFIVE_GPIO0_0_SIZE 4096UL /* From gpio@20002000 */ #define METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS 536879104UL +#define METAL_SIFIVE_GPIO0_1_BASE_ADDRESS 536879104UL #define METAL_SIFIVE_GPIO0_20002000_SIZE 4096UL +#define METAL_SIFIVE_GPIO0_1_SIZE 4096UL #define METAL_SIFIVE_GPIO0 #define METAL_SIFIVE_GPIO0_VALUE 0UL @@ -60,9 +80,54 @@ #define METAL_SIFIVE_GPIO0_IOF_SEL 60UL #define METAL_SIFIVE_GPIO0_OUT_XOR 64UL +/* From button@0 */ + +/* From button@1 */ + +/* From button@2 */ + +/* From button@3 */ + +#define METAL_SIFIVE_GPIO_BUTTONS + +/* From led@0red */ + +/* From led@0green */ + +/* From led@0blue */ + +#define METAL_SIFIVE_GPIO_LEDS + +/* From switch@0 */ + +/* From switch@1 */ + +/* From switch@2 */ + +/* From switch@3 */ + +#define METAL_SIFIVE_GPIO_SWITCHES + +/* From pwm@20005000 */ +#define METAL_SIFIVE_PWM0_20005000_BASE_ADDRESS 536891392UL +#define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 536891392UL +#define METAL_SIFIVE_PWM0_20005000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_0_SIZE 4096UL + +#define METAL_SIFIVE_PWM0 +#define METAL_SIFIVE_PWM0_PWMCFG 0UL +#define METAL_SIFIVE_PWM0_PWMCOUNT 8UL +#define METAL_SIFIVE_PWM0_PWMS 16UL +#define METAL_SIFIVE_PWM0_PWMCMP0 32UL +#define METAL_SIFIVE_PWM0_PWMCMP1 36UL +#define METAL_SIFIVE_PWM0_PWMCMP2 40UL +#define METAL_SIFIVE_PWM0_PWMCMP3 44UL + /* From spi@20004000 */ #define METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS 536887296UL +#define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 536887296UL #define METAL_SIFIVE_SPI0_20004000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_0_SIZE 4096UL #define METAL_SIFIVE_SPI0 #define METAL_SIFIVE_SPI0_SCKDIV 0UL @@ -84,14 +149,18 @@ /* From teststatus@4000 */ #define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL +#define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL #define METAL_SIFIVE_TEST0_4000_SIZE 4096UL +#define METAL_SIFIVE_TEST0_0_SIZE 4096UL #define METAL_SIFIVE_TEST0 #define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL /* From serial@20000000 */ #define METAL_SIFIVE_UART0_20000000_BASE_ADDRESS 536870912UL +#define METAL_SIFIVE_UART0_0_BASE_ADDRESS 536870912UL #define METAL_SIFIVE_UART0_20000000_SIZE 4096UL +#define METAL_SIFIVE_UART0_0_SIZE 4096UL #define METAL_SIFIVE_UART0 #define METAL_SIFIVE_UART0_TXDATA 0UL diff --git a/bsp/coreip-e76-arty/metal.default.lds b/bsp/coreip-e76-arty/metal.default.lds index ccd5fb0..5f18721 100644 --- a/bsp/coreip-e76-arty/metal.default.lds +++ b/bsp/coreip-e76-arty/metal.default.lds @@ -1,3 +1,9 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ + OUTPUT_ARCH("riscv") ENTRY(_enter) @@ -58,6 +64,12 @@ SECTIONS *(.rdata) *(.rodata .rodata.*) *(.gnu.linkonce.r.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) } >flash AT>flash :flash @@ -170,12 +182,6 @@ SECTIONS PROVIDE( __global_pointer$ = . + 0x800 ); *(.sdata .sdata.* .sdata2.*) *(.gnu.linkonce.s.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) } >ram AT>flash :ram_init diff --git a/bsp/coreip-e76-arty/metal.h b/bsp/coreip-e76-arty/metal.h index 7115c2a..21a9416 100644 --- a/bsp/coreip-e76-arty/metal.h +++ b/bsp/coreip-e76-arty/metal.h @@ -1,12 +1,18 @@ -#ifndef ASSEMBLY +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ -#ifndef COREIP_E76_ARTY__METAL_H -#define COREIP_E76_ARTY__METAL_H +#ifndef ASSEMBLY #include <metal/machine/platform.h> #ifdef __METAL_MACHINE_MACROS +#ifndef MACROS_IF_COREIP_E76_ARTY__METAL_H +#define MACROS_IF_COREIP_E76_ARTY__METAL_H + #define __METAL_CLINT_NUM_PARENTS 2 #ifndef __METAL_CLINT_NUM_PARENTS @@ -26,8 +32,13 @@ #define __METAL_CLIC_SUBINTERRUPTS 0 #endif +#endif /* MACROS_IF_COREIP_E76_ARTY__METAL_H*/ + #else /* ! __METAL_MACHINE_MACROS */ +#ifndef MACROS_ELSE_COREIP_E76_ARTY__METAL_H +#define MACROS_ELSE_COREIP_E76_ARTY__METAL_H + #define __METAL_CLINT_2000000_INTERRUPTS 2 #define METAL_MAX_CLINT_INTERRUPTS 2 @@ -78,399 +89,776 @@ #include <metal/drivers/sifive,uart0.h> /* From tlclk */ -asm (".weak __metal_dt_tlclk"); struct __metal_driver_fixed_clock __metal_dt_tlclk; -asm (".weak __metal_dt_mem_memory_80000000"); struct metal_memory __metal_dt_mem_memory_80000000; -asm (".weak __metal_dt_mem_spi_20004000"); struct metal_memory __metal_dt_mem_spi_20004000; /* From clint@2000000 */ -asm (".weak __metal_dt_clint_2000000"); struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; /* From cpu@0 */ -asm (".weak __metal_dt_cpu_0"); struct __metal_driver_cpu __metal_dt_cpu_0; -asm (".weak __metal_dt_cpu_0_interrupt_controller"); struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; /* From interrupt_controller@c000000 */ -asm (".weak __metal_dt_interrupt_controller_c000000"); struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; -asm (".weak __metal_dt_pmp_0"); struct metal_pmp __metal_dt_pmp_0; /* From global_external_interrupts */ -asm (".weak __metal_dt_global_external_interrupts"); struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; /* From gpio@10060000 */ -asm (".weak __metal_dt_gpio_10060000"); struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10060000; /* From gpio@20002000 */ -asm (".weak __metal_dt_gpio_20002000"); struct __metal_driver_sifive_gpio0 __metal_dt_gpio_20002000; /* From button@0 */ -asm (".weak __metal_dt_button_0"); struct __metal_driver_sifive_gpio_button __metal_dt_button_0; /* From button@1 */ -asm (".weak __metal_dt_button_1"); struct __metal_driver_sifive_gpio_button __metal_dt_button_1; /* From button@2 */ -asm (".weak __metal_dt_button_2"); struct __metal_driver_sifive_gpio_button __metal_dt_button_2; /* From button@3 */ -asm (".weak __metal_dt_button_3"); struct __metal_driver_sifive_gpio_button __metal_dt_button_3; /* From led@0red */ -asm (".weak __metal_dt_led_0red"); struct __metal_driver_sifive_gpio_led __metal_dt_led_0red; /* From led@0green */ -asm (".weak __metal_dt_led_0green"); struct __metal_driver_sifive_gpio_led __metal_dt_led_0green; /* From led@0blue */ -asm (".weak __metal_dt_led_0blue"); struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue; /* From switch@0 */ -asm (".weak __metal_dt_switch_0"); struct __metal_driver_sifive_gpio_switch __metal_dt_switch_0; /* From switch@1 */ -asm (".weak __metal_dt_switch_1"); struct __metal_driver_sifive_gpio_switch __metal_dt_switch_1; /* From switch@2 */ -asm (".weak __metal_dt_switch_2"); struct __metal_driver_sifive_gpio_switch __metal_dt_switch_2; /* From switch@3 */ -asm (".weak __metal_dt_switch_3"); struct __metal_driver_sifive_gpio_switch __metal_dt_switch_3; /* From spi@20004000 */ -asm (".weak __metal_dt_spi_20004000"); struct __metal_driver_sifive_spi0 __metal_dt_spi_20004000; /* From teststatus@4000 */ -asm (".weak __metal_dt_teststatus_4000"); struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; /* From serial@20000000 */ -asm (".weak __metal_dt_serial_20000000"); struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000; -/* From tlclk */ -struct __metal_driver_fixed_clock __metal_dt_tlclk = { - .vtable = &__metal_driver_vtable_fixed_clock, - .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, - .rate = METAL_FIXED_CLOCK__CLOCK_FREQUENCY, -}; - -struct metal_memory __metal_dt_mem_memory_80000000 = { - ._base_address = 2147483648UL, - ._size = 268435456UL, - ._attrs = { - .R = 1, - .W = 1, - .X = 1, - .C = 1, - .A = 1}, -}; - -struct metal_memory __metal_dt_mem_spi_20004000 = { - ._base_address = 1073741824UL, - ._size = 536870912UL, - ._attrs = { - .R = 1, - .W = 1, - .X = 1, - .C = 1, - .A = 1}, -}; - -/* From clint@2000000 */ -struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { - .vtable = &__metal_driver_vtable_riscv_clint0, - .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable, - .control_base = METAL_RISCV_CLINT0_2000000_BASE_ADDRESS, - .control_size = METAL_RISCV_CLINT0_2000000_SIZE, - .init_done = 0, - .num_interrupts = METAL_MAX_CLINT_INTERRUPTS, - .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller, - .interrupt_lines[0] = 3, - .interrupt_parents[1] = &__metal_dt_cpu_0_interrupt_controller.controller, - .interrupt_lines[1] = 7, -}; - -/* From cpu@0 */ -struct __metal_driver_cpu __metal_dt_cpu_0 = { - .vtable = &__metal_driver_vtable_cpu, - .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, - .timebase = 65000000UL, - .interrupt_controller = &__metal_dt_cpu_0_interrupt_controller.controller, -}; - -/* From interrupt_controller */ -struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { - .vtable = &__metal_driver_vtable_riscv_cpu_intc, - .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, - .init_done = 0, - .interrupt_controller = 1, -}; -/* From interrupt_controller@c000000 */ -struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { - .vtable = &__metal_driver_vtable_riscv_plic0, - .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable, - .init_done = 0, - .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller, - .interrupt_lines[0] = 11, - .control_base = METAL_RISCV_PLIC0_C000000_BASE_ADDRESS, - .control_size = METAL_RISCV_PLIC0_C000000_SIZE, - .max_priority = METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY, - .num_interrupts = METAL_RISCV_PLIC0_C000000_RISCV_NDEV, - .interrupt_controller = 1, -}; +/* --------------------- fixed_clock ------------ */ +static inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_tlclk) { + return METAL_FIXED_CLOCK__CLOCK_FREQUENCY; + } + else { + return 0; + } +} + + + +/* --------------------- fixed_factor_clock ------------ */ + + +/* --------------------- sifive_clint0 ------------ */ +static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_RISCV_CLINT0_2000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_MAX_CLINT_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else if (idx == 1) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 3; + } + else if (idx == 1) { + return 7; + } + else { + return 0; + } +} + + + +/* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 65000000; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return &__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + + + +/* --------------------- sifive_plic0 ------------ */ +static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_RISCV_NDEV; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 11; + } + else if (idx == 0) { + return 11; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ + + +/* --------------------- sifive_global_external_interrupts0 ------------ */ +static inline int __metal_driver_sifive_global_external_interrupts0_init_done() +{ + return 0; +} + +static inline struct metal_interrupt * __metal_driver_sifive_global_external_interrupts0_interrupt_parent(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_global_external_interrupts) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_global_external_interrupts0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_global_external_interrupts) { + return METAL_MAX_GLOBAL_EXT_INTERRUPTS; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_global_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 21; + } + else if (idx == 1) { + return 22; + } + else if (idx == 2) { + return 23; + } + else if (idx == 3) { + return 24; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_gpio0 ------------ */ +static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) { + return METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS; + } + else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) { + return METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) { + return METAL_SIFIVE_GPIO0_10060000_SIZE; + } + else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) { + return METAL_SIFIVE_GPIO0_20002000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) { + return METAL_MAX_GPIO_INTERRUPTS; + } + else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) { + return METAL_MAX_GPIO_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) +{ + if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 0)) { + return 27; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 1))) { + return 28; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 2))) { + return 29; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10060000) && (idx == 3))) { + return 30; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 0))) { + return 1; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 1))) { + return 2; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 2))) { + return 3; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 3))) { + return 4; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 4))) { + return 5; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 5))) { + return 6; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 6))) { + return 7; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 7))) { + return 8; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 8))) { + return 9; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 9))) { + return 10; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 10))) { + return 11; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 11))) { + return 12; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 12))) { + return 13; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 13))) { + return 14; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 14))) { + return 15; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_20002000) && (idx == 15))) { + return 16; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_gpio_button ------------ */ +static inline struct metal_gpio * __metal_driver_sifive_gpio_button_gpio(struct metal_button *button) +{ + if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_gpio_button_pin(struct metal_button *button) +{ + if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) { + return 4; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) { + return 5; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) { + return 6; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) { + return 7; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_gpio_button_interrupt_controller(struct metal_button *button) +{ + if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_gpio_button_interrupt_line(struct metal_button *button) +{ + if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) { + return 0; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) { + return 1; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) { + return 2; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) { + return 3; + } + else { + return 0; + } +} + +static inline char * __metal_driver_sifive_gpio_button_label(struct metal_button *button) +{ + if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_0) { + return "BTN0"; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_1) { + return "BTN1"; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_2) { + return "BTN2"; + } + else if ((uintptr_t)button == (uintptr_t)&__metal_dt_button_3) { + return "BTN3"; + } + else { + return ""; + } +} + + + +/* --------------------- sifive_gpio_led ------------ */ +static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return (struct metal_gpio *)&__metal_dt_gpio_10060000; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return 0; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return 1; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return 2; + } + else { + return 0; + } +} + +static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return "LD0red"; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return "LD0green"; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return "LD0blue"; + } + else { + return ""; + } +} + + + +/* --------------------- sifive_gpio_switch ------------ */ +static inline struct metal_gpio * __metal_driver_sifive_gpio_switch_gpio(struct metal_switch *flip) +{ + return NULL; +} + +static inline int __metal_driver_sifive_gpio_switch_pin(struct metal_switch *flip) +{ + return 0; +} + +static inline struct metal_interrupt * __metal_driver_sifive_gpio_switch_interrupt_controller(struct metal_switch *flip) +{ + if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_0) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_1) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_2) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_3) { + return (struct metal_interrupt *)&__metal_dt_global_external_interrupts; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_gpio_switch_interrupt_line(struct metal_switch *flip) +{ + if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_0) { + return 0; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_1) { + return 1; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_2) { + return 2; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_3) { + return 3; + } + else { + return 0; + } +} + +static inline char * __metal_driver_sifive_gpio_switch_label(struct metal_switch *flip) +{ + if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_0) { + return "SW0"; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_1) { + return "SW1"; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_2) { + return "SW2"; + } + else if ((uintptr_t)flip == (uintptr_t)&__metal_dt_switch_3) { + return "SW3"; + } + else { + return ""; + } +} + + + +/* --------------------- sifive_spi0 ------------ */ +static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_20004000) { + return METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_20004000) { + return METAL_SIFIVE_SPI0_20004000_SIZE; + } + else { + return 0; + } +} + +static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +{ + return (struct metal_clock *)&__metal_dt_tlclk.clock; +} + +static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +{ + return NULL; +} + +static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +{ + return 0; +} + +static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +{ + return 0; +} + + + +/* --------------------- sifive_test0 ------------ */ +static inline unsigned long __metal_driver_sifive_test0_base( ) +{ + return 16384; +} + +static inline unsigned long __metal_driver_sifive_test0_size( ) +{ + return 4096; +} + + + +/* --------------------- sifive_uart0 ------------ */ +static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) { + return METAL_SIFIVE_UART0_20000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) { + return METAL_SIFIVE_UART0_20000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) { + return METAL_MAX_UART_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_20000000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return NULL; + } +} -/* From pmp@0 */ -struct metal_pmp __metal_dt_pmp_0 = { - .num_regions = METAL_RISCV_PMP_0_NUM_REGIONS, -}; +static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) +{ + return 25; +} + +static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) +{ + return (struct metal_clock *)&__metal_dt_tlclk.clock; +} -/* From global_external_interrupts */ -struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { - .vtable = &__metal_driver_vtable_sifive_global_external_interrupts0, - .irc.vtable = &__metal_driver_vtable_sifive_global_external_interrupts0.global0_vtable, - .init_done = 0, -/* From interrupt_controller@c000000 */ - .interrupt_parent = &__metal_dt_interrupt_controller_c000000.controller, - .num_interrupts = METAL_MAX_GLOBAL_EXT_INTERRUPTS, - .interrupt_lines[0] = 21, - .interrupt_lines[1] = 22, - .interrupt_lines[2] = 23, - .interrupt_lines[3] = 24, -}; +static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +{ + return NULL; +} -/* From gpio@10060000 */ -struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10060000 = { - .vtable = &__metal_driver_vtable_sifive_gpio0, - .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, - .base = METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS, - .size = METAL_SIFIVE_GPIO0_10060000_SIZE, -/* From interrupt_controller@c000000 */ - .interrupt_parent = &__metal_dt_interrupt_controller_c000000.controller, - .num_interrupts = METAL_MAX_GPIO_INTERRUPTS, - .interrupt_lines[0] = 27, - .interrupt_lines[1] = 28, - .interrupt_lines[2] = 29, - .interrupt_lines[3] = 30, -}; - -/* From gpio@20002000 */ -struct __metal_driver_sifive_gpio0 __metal_dt_gpio_20002000 = { - .vtable = &__metal_driver_vtable_sifive_gpio0, - .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, - .base = METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS, - .size = METAL_SIFIVE_GPIO0_20002000_SIZE, -/* From interrupt_controller@c000000 */ - .interrupt_parent = &__metal_dt_interrupt_controller_c000000.controller, - .num_interrupts = METAL_MAX_GPIO_INTERRUPTS, - .interrupt_lines[0] = 1, - .interrupt_lines[1] = 2, - .interrupt_lines[2] = 3, - .interrupt_lines[3] = 4, - .interrupt_lines[4] = 5, - .interrupt_lines[5] = 6, - .interrupt_lines[6] = 7, - .interrupt_lines[7] = 8, - .interrupt_lines[8] = 9, - .interrupt_lines[9] = 10, - .interrupt_lines[10] = 11, - .interrupt_lines[11] = 12, - .interrupt_lines[12] = 13, - .interrupt_lines[13] = 14, - .interrupt_lines[14] = 15, - .interrupt_lines[15] = 16, -}; - -/* From button@0 */ -struct __metal_driver_sifive_gpio_button __metal_dt_button_0 = { - .vtable = &__metal_driver_vtable_sifive_button, - .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 4UL, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 0UL, - .label = "BTN0", -}; - -/* From button@1 */ -struct __metal_driver_sifive_gpio_button __metal_dt_button_1 = { - .vtable = &__metal_driver_vtable_sifive_button, - .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 5UL, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 1UL, - .label = "BTN1", -}; +static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +{ + return 0; +} -/* From button@2 */ -struct __metal_driver_sifive_gpio_button __metal_dt_button_2 = { - .vtable = &__metal_driver_vtable_sifive_button, - .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 6UL, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 2UL, - .label = "BTN2", -}; +static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +{ + return 0; +} -/* From button@3 */ -struct __metal_driver_sifive_gpio_button __metal_dt_button_3 = { - .vtable = &__metal_driver_vtable_sifive_button, - .button.vtable = &__metal_driver_vtable_sifive_button.button_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 7UL, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 3UL, - .label = "BTN3", -}; -/* From led@0red */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = { - .vtable = &__metal_driver_vtable_sifive_led, - .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 0UL, - .label = "LD0red", -}; -/* From led@0green */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = { - .vtable = &__metal_driver_vtable_sifive_led, - .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 1UL, - .label = "LD0green", -}; +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ -/* From led@0blue */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = { - .vtable = &__metal_driver_vtable_sifive_led, - .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, -/* From gpio@10060000 */ - .gpio = &__metal_dt_gpio_10060000, - .pin = 2UL, - .label = "LD0blue", -}; -/* From switch@0 */ -struct __metal_driver_sifive_gpio_switch __metal_dt_switch_0 = { - .vtable = &__metal_driver_vtable_sifive_switch, - .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, - .gpio = NULL, - .pin = 0, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 0UL, - .label = "SW0", -}; +/* --------------------- sifive_fe310_g000_hfxosc ------------ */ -/* From switch@1 */ -struct __metal_driver_sifive_gpio_switch __metal_dt_switch_1 = { - .vtable = &__metal_driver_vtable_sifive_switch, - .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, - .gpio = NULL, - .pin = 0, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 1UL, - .label = "SW1", -}; -/* From switch@2 */ -struct __metal_driver_sifive_gpio_switch __metal_dt_switch_2 = { - .vtable = &__metal_driver_vtable_sifive_switch, - .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, - .gpio = NULL, - .pin = 0, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 2UL, - .label = "SW2", -}; +/* --------------------- sifive_fe310_g000_pll ------------ */ -/* From switch@3 */ -struct __metal_driver_sifive_gpio_switch __metal_dt_switch_3 = { - .vtable = &__metal_driver_vtable_sifive_switch, - .flip.vtable = &__metal_driver_vtable_sifive_switch.switch_vtable, - .gpio = NULL, - .pin = 0, -/* From global_external_interrupts */ - .interrupt_parent = &__metal_dt_global_external_interrupts.irc, - .interrupt_line = 3UL, - .label = "SW3", -}; -/* From spi@20004000 */ -struct __metal_driver_sifive_spi0 __metal_dt_spi_20004000 = { - .vtable = &__metal_driver_vtable_sifive_spi0, - .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, - .control_base = METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS, - .control_size = METAL_SIFIVE_SPI0_20004000_SIZE, -/* From tlclk */ - .clock = &__metal_dt_tlclk.clock, - .pinmux = NULL, -}; +/* --------------------- sifive_fe310_g000_prci ------------ */ -/* From teststatus@4000 */ -struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = { - .vtable = &__metal_driver_vtable_sifive_test0, - .shutdown.vtable = &__metal_driver_vtable_sifive_test0.shutdown, - .base = 16384UL, - .size = 4096UL, -}; -/* From serial@20000000 */ -struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000 = { - .vtable = &__metal_driver_vtable_sifive_uart0, - .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, - .control_base = METAL_SIFIVE_UART0_20000000_BASE_ADDRESS, - .control_size = METAL_SIFIVE_UART0_20000000_SIZE, -/* From tlclk */ - .clock = &__metal_dt_tlclk.clock, - .pinmux = NULL, -/* From interrupt_controller@c000000 */ - .interrupt_parent = &__metal_dt_interrupt_controller_c000000.controller, - .num_interrupts = METAL_MAX_UART_INTERRUPTS, - .interrupt_line = 25UL, -}; +/* --------------------- sifive_fu540_c000_l2 ------------ */ #define __METAL_DT_MAX_MEMORIES 2 @@ -555,7 +943,8 @@ struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { #define __METAL_DT_TESTSTATUS_4000_HANDLE (&__metal_dt_teststatus_4000.shutdown) +#endif /* MACROS_ELSE_COREIP_E76_ARTY__METAL_H*/ #endif /* ! __METAL_MACHINE_MACROS */ -#endif /* COREIP_E76_ARTY__METAL_H*/ + #endif /* ! ASSEMBLY */ diff --git a/bsp/coreip-e76-arty/metal.ramrodata.lds b/bsp/coreip-e76-arty/metal.ramrodata.lds index 2c0d61e..2399c34 100644 --- a/bsp/coreip-e76-arty/metal.ramrodata.lds +++ b/bsp/coreip-e76-arty/metal.ramrodata.lds @@ -1,3 +1,9 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ + OUTPUT_ARCH("riscv") ENTRY(_enter) @@ -161,18 +167,18 @@ SECTIONS *(.rdata) *(.rodata .rodata.*) *(.gnu.linkonce.r.*) - *(.data .data.*) - *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); - *(.sdata .sdata.* .sdata2.*) - *(.gnu.linkonce.s.*) . = ALIGN(8); *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*) + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.* .sdata2.*) + *(.gnu.linkonce.s.*) } >ram AT>flash :ram_init diff --git a/bsp/coreip-e76-arty/metal.scratchpad.lds b/bsp/coreip-e76-arty/metal.scratchpad.lds index fe384ff..f218377 100644 --- a/bsp/coreip-e76-arty/metal.scratchpad.lds +++ b/bsp/coreip-e76-arty/metal.scratchpad.lds @@ -1,3 +1,9 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ + OUTPUT_ARCH("riscv") ENTRY(_enter) @@ -58,6 +64,12 @@ SECTIONS *(.rdata) *(.rodata .rodata.*) *(.gnu.linkonce.r.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) } >ram AT>ram :ram @@ -170,12 +182,6 @@ SECTIONS PROVIDE( __global_pointer$ = . + 0x800 ); *(.sdata .sdata.* .sdata2.*) *(.gnu.linkonce.s.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) } >ram AT>ram :ram_init diff --git a/bsp/coreip-e76-arty/settings.mk b/bsp/coreip-e76-arty/settings.mk index 62d3775..115db75 100644 --- a/bsp/coreip-e76-arty/settings.mk +++ b/bsp/coreip-e76-arty/settings.mk @@ -1,3 +1,9 @@ +# Copyright 2019 SiFive, Inc # +# SPDX-License-Identifier: Apache-2.0 # +# ----------------------------------- # +# [XXXXX] 20-05-2019 14-26-10 # +# ----------------------------------- # + RISCV_ARCH=rv32imafc RISCV_ABI=ilp32f RISCV_CMODEL=medlow |