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-rw-r--r--bsp/coreip-e76-arty/design.dts5
1 files changed, 1 insertions, 4 deletions
diff --git a/bsp/coreip-e76-arty/design.dts b/bsp/coreip-e76-arty/design.dts
index 1ea526f..c1ef3b2 100644
--- a/bsp/coreip-e76-arty/design.dts
+++ b/bsp/coreip-e76-arty/design.dts
@@ -28,6 +28,7 @@
next-level-cache = <&L14 &L15>;
reg = <0x0>;
riscv,isa = "rv32imafc";
+ riscv,pmpregions = <8>;
status = "okay";
timebase-frequency = <65000000>;
hardware-exec-breakpoint-count = <4>;
@@ -47,10 +48,6 @@
#size-cells = <1>;
compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus";
ranges;
- pmp: pmp@0 {
- compatible = "riscv,pmp";
- regions = <8>;
- };
L2: clint@2000000 {
compatible = "riscv,clint0";
interrupts-extended = <&L4 3 &L4 7>;