diff options
Diffstat (limited to 'bsp/coreip-s54-arty/metal-platform.h')
| -rw-r--r-- | bsp/coreip-s54-arty/metal-platform.h | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/bsp/coreip-s54-arty/metal-platform.h b/bsp/coreip-s54-arty/metal-platform.h index e715d34..7f1e2d0 100644 --- a/bsp/coreip-s54-arty/metal-platform.h +++ b/bsp/coreip-s54-arty/metal-platform.h @@ -1,3 +1,9 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* [XXXXX] 20-05-2019 14-26-10 */ +/* ----------------------------------- */ + #ifndef COREIP_S54_ARTY__METAL_PLATFORM_H #define COREIP_S54_ARTY__METAL_PLATFORM_H @@ -8,7 +14,9 @@ /* From clint@2000000 */ #define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL +#define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL #define METAL_RISCV_CLINT0_2000000_SIZE 65536UL +#define METAL_RISCV_CLINT0_0_SIZE 65536UL #define METAL_RISCV_CLINT0 #define METAL_RISCV_CLINT0_MSIP_BASE 0UL @@ -17,9 +25,13 @@ /* From interrupt_controller@c000000 */ #define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL +#define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL #define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL +#define METAL_RISCV_PLIC0_0_SIZE 67108864UL #define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL +#define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL #define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 27UL +#define METAL_RISCV_PLIC0_0_RISCV_NDEV 27UL #define METAL_RISCV_PLIC0 #define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL @@ -33,9 +45,15 @@ #define METAL_RISCV_PMP +/* From global_external_interrupts */ + +#define METAL_SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0 + /* From gpio@20002000 */ #define METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS 536879104UL +#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 536879104UL #define METAL_SIFIVE_GPIO0_20002000_SIZE 4096UL +#define METAL_SIFIVE_GPIO0_0_SIZE 4096UL #define METAL_SIFIVE_GPIO0 #define METAL_SIFIVE_GPIO0_VALUE 0UL @@ -56,9 +74,58 @@ #define METAL_SIFIVE_GPIO0_IOF_SEL 60UL #define METAL_SIFIVE_GPIO0_OUT_XOR 64UL +/* From button@0 */ + +/* From button@1 */ + +/* From button@2 */ + +/* From button@3 */ + +#define METAL_SIFIVE_GPIO_BUTTONS + +/* From led@0red */ + +/* From led@0green */ + +/* From led@0blue */ + +#define METAL_SIFIVE_GPIO_LEDS + +/* From switch@0 */ + +/* From switch@1 */ + +/* From switch@2 */ + +/* From switch@3 */ + +#define METAL_SIFIVE_GPIO_SWITCHES + +/* From local_external_interrupts_0 */ + +#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 + +/* From pwm@20005000 */ +#define METAL_SIFIVE_PWM0_20005000_BASE_ADDRESS 536891392UL +#define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 536891392UL +#define METAL_SIFIVE_PWM0_20005000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_0_SIZE 4096UL + +#define METAL_SIFIVE_PWM0 +#define METAL_SIFIVE_PWM0_PWMCFG 0UL +#define METAL_SIFIVE_PWM0_PWMCOUNT 8UL +#define METAL_SIFIVE_PWM0_PWMS 16UL +#define METAL_SIFIVE_PWM0_PWMCMP0 32UL +#define METAL_SIFIVE_PWM0_PWMCMP1 36UL +#define METAL_SIFIVE_PWM0_PWMCMP2 40UL +#define METAL_SIFIVE_PWM0_PWMCMP3 44UL + /* From spi@20004000 */ #define METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS 536887296UL +#define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 536887296UL #define METAL_SIFIVE_SPI0_20004000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_0_SIZE 4096UL #define METAL_SIFIVE_SPI0 #define METAL_SIFIVE_SPI0_SCKDIV 0UL @@ -80,14 +147,18 @@ /* From teststatus@4000 */ #define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL +#define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL #define METAL_SIFIVE_TEST0_4000_SIZE 4096UL +#define METAL_SIFIVE_TEST0_0_SIZE 4096UL #define METAL_SIFIVE_TEST0 #define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL /* From serial@20000000 */ #define METAL_SIFIVE_UART0_20000000_BASE_ADDRESS 536870912UL +#define METAL_SIFIVE_UART0_0_BASE_ADDRESS 536870912UL #define METAL_SIFIVE_UART0_20000000_SIZE 4096UL +#define METAL_SIFIVE_UART0_0_SIZE 4096UL #define METAL_SIFIVE_UART0 #define METAL_SIFIVE_UART0_TXDATA 0UL |