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-rw-r--r--bsp/coreip-s54-rtl/metal-inline.h3
-rw-r--r--bsp/coreip-s54-rtl/metal-platform.h2
-rw-r--r--bsp/coreip-s54-rtl/metal.default.lds3
-rw-r--r--bsp/coreip-s54-rtl/metal.h12
-rw-r--r--bsp/coreip-s54-rtl/metal.ramrodata.lds3
-rw-r--r--bsp/coreip-s54-rtl/metal.scratchpad.lds3
-rw-r--r--bsp/coreip-s54-rtl/settings.mk3
7 files changed, 22 insertions, 7 deletions
diff --git a/bsp/coreip-s54-rtl/metal-inline.h b/bsp/coreip-s54-rtl/metal-inline.h
index 9fe2c39..a04cbc1 100644
--- a/bsp/coreip-s54-rtl/metal-inline.h
+++ b/bsp/coreip-s54-rtl/metal-inline.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 21-05-2019 10-54-34 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
#ifndef ASSEMBLY
@@ -27,6 +27,7 @@ extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte
/* --------------------- cpu ------------ */
+extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu);
extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu);
extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu);
extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu);
diff --git a/bsp/coreip-s54-rtl/metal-platform.h b/bsp/coreip-s54-rtl/metal-platform.h
index d5f6de8..2175c30 100644
--- a/bsp/coreip-s54-rtl/metal-platform.h
+++ b/bsp/coreip-s54-rtl/metal-platform.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 21-05-2019 10-54-34 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
#ifndef COREIP_S54_RTL__METAL_PLATFORM_H
diff --git a/bsp/coreip-s54-rtl/metal.default.lds b/bsp/coreip-s54-rtl/metal.default.lds
index becfaf5..e5be410 100644
--- a/bsp/coreip-s54-rtl/metal.default.lds
+++ b/bsp/coreip-s54-rtl/metal.default.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 21-05-2019 10-54-34 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -29,6 +29,7 @@ SECTIONS
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+ PROVIDE(__metal_boot_hart = 0);
.init :
diff --git a/bsp/coreip-s54-rtl/metal.h b/bsp/coreip-s54-rtl/metal.h
index c47f29e..3880110 100644
--- a/bsp/coreip-s54-rtl/metal.h
+++ b/bsp/coreip-s54-rtl/metal.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 21-05-2019 10-54-34 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
#ifndef ASSEMBLY
@@ -175,6 +175,16 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte
/* --------------------- cpu ------------ */
+static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu)
+{
+ if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
+ return 0;
+ }
+ else {
+ return -1;
+ }
+}
+
static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu)
{
if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
diff --git a/bsp/coreip-s54-rtl/metal.ramrodata.lds b/bsp/coreip-s54-rtl/metal.ramrodata.lds
index 79a9105..e9f838a 100644
--- a/bsp/coreip-s54-rtl/metal.ramrodata.lds
+++ b/bsp/coreip-s54-rtl/metal.ramrodata.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 21-05-2019 10-54-34 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -29,6 +29,7 @@ SECTIONS
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+ PROVIDE(__metal_boot_hart = 0);
.init :
diff --git a/bsp/coreip-s54-rtl/metal.scratchpad.lds b/bsp/coreip-s54-rtl/metal.scratchpad.lds
index 1b0941c..e46abb7 100644
--- a/bsp/coreip-s54-rtl/metal.scratchpad.lds
+++ b/bsp/coreip-s54-rtl/metal.scratchpad.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 21-05-2019 10-54-34 */
+/* [XXXXX] 23-05-2019 13-29-49 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -29,6 +29,7 @@ SECTIONS
__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+ PROVIDE(__metal_boot_hart = 0);
.init :
diff --git a/bsp/coreip-s54-rtl/settings.mk b/bsp/coreip-s54-rtl/settings.mk
index 389d403..a25dc18 100644
--- a/bsp/coreip-s54-rtl/settings.mk
+++ b/bsp/coreip-s54-rtl/settings.mk
@@ -1,7 +1,7 @@
# Copyright 2019 SiFive, Inc #
# SPDX-License-Identifier: Apache-2.0 #
# ----------------------------------- #
-# [XXXXX] 21-05-2019 10-54-34 #
+# [XXXXX] 23-05-2019 13-29-49 #
# ----------------------------------- #
RISCV_ARCH=rv64imafdc
@@ -11,3 +11,4 @@ RISCV_CMODEL=medany
COREIP_MEM_WIDTH=64
TARGET_TAGS=rtl
+TARGET_DHRY_ITERS=2000