summaryrefslogtreecommitdiff
path: root/bsp/coreip-u54mc-rtl
diff options
context:
space:
mode:
Diffstat (limited to 'bsp/coreip-u54mc-rtl')
-rw-r--r--bsp/coreip-u54mc-rtl/design.dts9
1 files changed, 5 insertions, 4 deletions
diff --git a/bsp/coreip-u54mc-rtl/design.dts b/bsp/coreip-u54mc-rtl/design.dts
index 27a3c94..beba177 100644
--- a/bsp/coreip-u54mc-rtl/design.dts
+++ b/bsp/coreip-u54mc-rtl/design.dts
@@ -18,6 +18,7 @@
next-level-cache = <&L33>;
reg = <0x0>;
riscv,isa = "rv64imac";
+ riscv,pmpregions = <8>;
sifive,dtim = <&L7>;
sifive,itim = <&L6>;
status = "okay";
@@ -46,6 +47,7 @@
next-level-cache = <&L33>;
reg = <0x1>;
riscv,isa = "rv64imafdc";
+ riscv,pmpregions = <8>;
sifive,itim = <&L11>;
status = "okay";
timebase-frequency = <1000000>;
@@ -74,6 +76,7 @@
next-level-cache = <&L33>;
reg = <0x2>;
riscv,isa = "rv64imafdc";
+ riscv,pmpregions = <8>;
sifive,itim = <&L15>;
status = "okay";
timebase-frequency = <1000000>;
@@ -102,6 +105,7 @@
next-level-cache = <&L33>;
reg = <0x3>;
riscv,isa = "rv64imafdc";
+ riscv,pmpregions = <8>;
sifive,itim = <&L19>;
status = "okay";
timebase-frequency = <1000000>;
@@ -130,6 +134,7 @@
next-level-cache = <&L33>;
reg = <0x4>;
riscv,isa = "rv64imafdc";
+ riscv,pmpregions = <8>;
sifive,itim = <&L23>;
status = "okay";
timebase-frequency = <1000000>;
@@ -150,10 +155,6 @@
#size-cells = <2>;
compatible = "SiFive,FU540G-soc", "fu540-soc", "sifive-soc", "simple-bus";
ranges;
- pmp: pmp@0 {
- compatible = "riscv,pmp";
- regions = <8>;
- };
L30: axi4-periph-port@20000000 {
#address-cells = <2>;
#size-cells = <2>;