diff options
Diffstat (limited to 'bsp/env/coreplexip-e31-arty/init.c')
| -rw-r--r-- | bsp/env/coreplexip-e31-arty/init.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/bsp/env/coreplexip-e31-arty/init.c b/bsp/env/coreplexip-e31-arty/init.c index 888f04f..1f8b679 100644 --- a/bsp/env/coreplexip-e31-arty/init.c +++ b/bsp/env/coreplexip-e31-arty/init.c @@ -19,7 +19,7 @@ extern int main(int argc, char** argv); extern void TRAP_ENTRY(); -static unsigned long get_cpu_freq() +unsigned long get_cpu_freq() { return CPU_FREQ; } @@ -64,6 +64,7 @@ extern my_interrupt_function_ptr_t localISR[]; #endif #ifndef VECT_IRQ +uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) __attribute__((noinline)); uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) { if (0){ @@ -90,6 +91,16 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) } #endif +#ifdef USE_CLIC +void trap_entry(void) __attribute__((interrupt("SiFive-CLIC-preemptible"), aligned(64))); +void trap_entry(void) +{ + unsigned long mcause = read_csr(mcause); + unsigned long mepc = read_csr(mepc); + handle_trap(mcause, mepc); +} +#endif + void _init() { #ifndef NO_INIT @@ -97,7 +108,11 @@ void _init() puts("core freq at " STR(CPU_FREQ) " Hz\n"); +#ifdef USE_CLIC + write_csr(mtvec, ((unsigned long)&trap_entry | MTVEC_CLIC)); +#else write_csr(mtvec, ((unsigned long)&TRAP_ENTRY | MTVEC_VECTORED)); +#endif #endif } |