diff options
Diffstat (limited to 'bsp/env/coreplexip-e31-arty')
| -rw-r--r-- | bsp/env/coreplexip-e31-arty/init.c | 15 | ||||
| -rw-r--r-- | bsp/env/coreplexip-e31-arty/platform.h | 5 |
2 files changed, 18 insertions, 2 deletions
diff --git a/bsp/env/coreplexip-e31-arty/init.c b/bsp/env/coreplexip-e31-arty/init.c index 409eeb4..1f8b679 100644 --- a/bsp/env/coreplexip-e31-arty/init.c +++ b/bsp/env/coreplexip-e31-arty/init.c @@ -64,6 +64,7 @@ extern my_interrupt_function_ptr_t localISR[]; #endif #ifndef VECT_IRQ +uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) __attribute__((noinline)); uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) { if (0){ @@ -90,6 +91,16 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) } #endif +#ifdef USE_CLIC +void trap_entry(void) __attribute__((interrupt("SiFive-CLIC-preemptible"), aligned(64))); +void trap_entry(void) +{ + unsigned long mcause = read_csr(mcause); + unsigned long mepc = read_csr(mepc); + handle_trap(mcause, mepc); +} +#endif + void _init() { #ifndef NO_INIT @@ -97,7 +108,11 @@ void _init() puts("core freq at " STR(CPU_FREQ) " Hz\n"); +#ifdef USE_CLIC + write_csr(mtvec, ((unsigned long)&trap_entry | MTVEC_CLIC)); +#else write_csr(mtvec, ((unsigned long)&TRAP_ENTRY | MTVEC_VECTORED)); +#endif #endif } diff --git a/bsp/env/coreplexip-e31-arty/platform.h b/bsp/env/coreplexip-e31-arty/platform.h index 0ac341e..6fa79ea 100644 --- a/bsp/env/coreplexip-e31-arty/platform.h +++ b/bsp/env/coreplexip-e31-arty/platform.h @@ -7,10 +7,10 @@ #if __riscv_xlen == 32 #define MCAUSE_INT 0x80000000UL -#define MCAUSE_CAUSE 0x7FFFFFFFUL +#define MCAUSE_CAUSE 0x000003FFUL #else #define MCAUSE_INT 0x8000000000000000UL -#define MCAUSE_CAUSE 0x7FFFFFFFFFFFFFFFUL +#define MCAUSE_CAUSE 0x00000000000003FFUL #endif #ifdef VECT_IRQ @@ -18,6 +18,7 @@ #else #define MTVEC_VECTORED 0x00 #endif +#define MTVEC_CLIC 0x02 #define IRQ_M_LOCAL 16 #define MIP_MLIP(x) (1 << (IRQ_M_LOCAL + x)) |