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-rw-r--r--bsp/env/freedom-e300-hifive1/dhrystone.lds157
-rw-r--r--bsp/env/freedom-e300-hifive1/flash.lds161
-rw-r--r--bsp/env/freedom-e300-hifive1/init.c238
-rw-r--r--bsp/env/freedom-e300-hifive1/openocd.cfg34
-rw-r--r--bsp/env/freedom-e300-hifive1/platform.h133
-rw-r--r--bsp/env/freedom-e300-hifive1/settings.mk3
6 files changed, 0 insertions, 726 deletions
diff --git a/bsp/env/freedom-e300-hifive1/dhrystone.lds b/bsp/env/freedom-e300-hifive1/dhrystone.lds
deleted file mode 100644
index cc9cd9b..0000000
--- a/bsp/env/freedom-e300-hifive1/dhrystone.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-OUTPUT_ARCH( "riscv" )
-
-ENTRY( _start )
-
-MEMORY
-{
- flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
- ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
-}
-
-PHDRS
-{
- flash PT_LOAD;
- ram_init PT_LOAD;
- ram PT_NULL;
-}
-
-SECTIONS
-{
- __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
-
- .init :
- {
- KEEP (*(SORT_NONE(.init)))
- } >flash AT>flash :flash
-
- .text :
- {
- *(.text.unlikely .text.unlikely.*)
- *(.text.startup .text.startup.*)
- *(.text .text.*)
- *(.gnu.linkonce.t.*)
- } >flash AT>flash :flash
-
- .fini :
- {
- KEEP (*(SORT_NONE(.fini)))
- } >flash AT>flash :flash
-
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
-
- . = ALIGN(4);
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >flash AT>flash :flash
-
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
- KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >flash AT>flash :flash
-
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
- KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >flash AT>flash :flash
-
- .ctors :
- {
- /* gcc uses crtbegin.o to find the start of
- the constructors, so we make sure it is
- first. Because this is a wildcard, it
- doesn't matter if the user does not
- actually link against crtbegin.o; the
- linker won't look for a file to match a
- wildcard. The wildcard also means that it
- doesn't matter which directory crtbegin.o
- is in. */
- KEEP (*crtbegin.o(.ctors))
- KEEP (*crtbegin?.o(.ctors))
- /* We don't want to include the .ctor section from
- the crtend.o file until after the sorted ctors.
- The .ctor section from the crtend file contains the
- end of ctors marker and it must be last */
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- } >flash AT>flash :flash
-
- .dtors :
- {
- KEEP (*crtbegin.o(.dtors))
- KEEP (*crtbegin?.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- } >flash AT>flash :flash
-
- .lalign :
- {
- . = ALIGN(4);
- PROVIDE( _data_lma = . );
- } >flash AT>flash :flash
-
- .dalign :
- {
- . = ALIGN(4);
- PROVIDE( _data = . );
- } >ram AT>flash :ram_init
-
- .data :
- {
- *(.rdata)
- *(.rodata .rodata.*)
- *(.gnu.linkonce.r.*)
- *(.data .data.*)
- *(.gnu.linkonce.d.*)
- . = ALIGN(8);
- PROVIDE( __global_pointer$ = . + 0x800 );
- *(.sdata .sdata.*)
- *(.gnu.linkonce.s.*)
- . = ALIGN(8);
- *(.srodata.cst16)
- *(.srodata.cst8)
- *(.srodata.cst4)
- *(.srodata.cst2)
- *(.srodata .srodata.*)
- } >ram AT>flash :ram_init
-
- . = ALIGN(4);
- PROVIDE( _edata = . );
- PROVIDE( edata = . );
-
- PROVIDE( _fbss = . );
- PROVIDE( __bss_start = . );
- .bss :
- {
- *(.sbss*)
- *(.gnu.linkonce.sb.*)
- *(.bss .bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN(4);
- } >ram AT>ram :ram
-
- . = ALIGN(8);
- PROVIDE( _end = . );
- PROVIDE( end = . );
-
- .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
- {
- PROVIDE( _heap_end = . );
- . = __stack_size;
- PROVIDE( _sp = . );
- } >ram AT>ram :ram
-}
diff --git a/bsp/env/freedom-e300-hifive1/flash.lds b/bsp/env/freedom-e300-hifive1/flash.lds
deleted file mode 100644
index 6b37141..0000000
--- a/bsp/env/freedom-e300-hifive1/flash.lds
+++ /dev/null
@@ -1,161 +0,0 @@
-OUTPUT_ARCH( "riscv" )
-
-ENTRY( _start )
-
-MEMORY
-{
- flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
- ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
-}
-
-PHDRS
-{
- flash PT_LOAD;
- ram_init PT_LOAD;
- ram PT_NULL;
-}
-
-SECTIONS
-{
- __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
-
- .init :
- {
- KEEP (*(SORT_NONE(.init)))
- } >flash AT>flash :flash
-
- .text :
- {
- *(.text.unlikely .text.unlikely.*)
- *(.text.startup .text.startup.*)
- *(.text .text.*)
- *(.gnu.linkonce.t.*)
- } >flash AT>flash :flash
-
- .fini :
- {
- KEEP (*(SORT_NONE(.fini)))
- } >flash AT>flash :flash
-
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
-
- .rodata :
- {
- *(.rdata)
- *(.rodata .rodata.*)
- *(.gnu.linkonce.r.*)
- } >flash AT>flash :flash
-
- . = ALIGN(4);
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >flash AT>flash :flash
-
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
- KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >flash AT>flash :flash
-
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
- KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >flash AT>flash :flash
-
- .ctors :
- {
- /* gcc uses crtbegin.o to find the start of
- the constructors, so we make sure it is
- first. Because this is a wildcard, it
- doesn't matter if the user does not
- actually link against crtbegin.o; the
- linker won't look for a file to match a
- wildcard. The wildcard also means that it
- doesn't matter which directory crtbegin.o
- is in. */
- KEEP (*crtbegin.o(.ctors))
- KEEP (*crtbegin?.o(.ctors))
- /* We don't want to include the .ctor section from
- the crtend.o file until after the sorted ctors.
- The .ctor section from the crtend file contains the
- end of ctors marker and it must be last */
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- } >flash AT>flash :flash
-
- .dtors :
- {
- KEEP (*crtbegin.o(.dtors))
- KEEP (*crtbegin?.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- } >flash AT>flash :flash
-
- .lalign :
- {
- . = ALIGN(4);
- PROVIDE( _data_lma = . );
- } >flash AT>flash :flash
-
- .dalign :
- {
- . = ALIGN(4);
- PROVIDE( _data = . );
- } >ram AT>flash :ram_init
-
- .data :
- {
- *(.data .data.*)
- *(.gnu.linkonce.d.*)
- . = ALIGN(8);
- PROVIDE( __global_pointer$ = . + 0x800 );
- *(.sdata .sdata.*)
- *(.gnu.linkonce.s.*)
- . = ALIGN(8);
- *(.srodata.cst16)
- *(.srodata.cst8)
- *(.srodata.cst4)
- *(.srodata.cst2)
- *(.srodata .srodata.*)
- } >ram AT>flash :ram_init
-
- . = ALIGN(4);
- PROVIDE( _edata = . );
- PROVIDE( edata = . );
-
- PROVIDE( _fbss = . );
- PROVIDE( __bss_start = . );
- .bss :
- {
- *(.sbss*)
- *(.gnu.linkonce.sb.*)
- *(.bss .bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN(4);
- } >ram AT>ram :ram
-
- . = ALIGN(8);
- PROVIDE( _end = . );
- PROVIDE( end = . );
-
- .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
- {
- PROVIDE( _heap_end = . );
- . = __stack_size;
- PROVIDE( _sp = . );
- } >ram AT>ram :ram
-}
diff --git a/bsp/env/freedom-e300-hifive1/init.c b/bsp/env/freedom-e300-hifive1/init.c
deleted file mode 100644
index 621a6e2..0000000
--- a/bsp/env/freedom-e300-hifive1/init.c
+++ /dev/null
@@ -1,238 +0,0 @@
-#include <stdint.h>
-#include <stdio.h>
-#include <unistd.h>
-
-#include "platform.h"
-#include "encoding.h"
-
-extern int main(int argc, char** argv);
-extern void trap_entry();
-
-static unsigned long mtime_lo(void)
-{
- return *(volatile unsigned long *)(CLINT_CTRL_ADDR + CLINT_MTIME);
-}
-
-#ifdef __riscv32
-
-static uint32_t mtime_hi(void)
-{
- return *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
-}
-
-uint64_t get_timer_value()
-{
- while (1) {
- uint32_t hi = mtime_hi();
- uint32_t lo = mtime_lo();
- if (hi == mtime_hi())
- return ((uint64_t)hi << 32) | lo;
- }
-}
-
-#else /* __riscv32 */
-
-uint64_t get_timer_value()
-{
- return mtime_lo();
-}
-
-#endif
-
-unsigned long get_timer_freq()
-{
- return 32768;
-}
-
-static void use_hfrosc(int div, int trim)
-{
- // Make sure the HFROSC is running at its default setting
- PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
- while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0) ;
- PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
-}
-
-static void use_pll(int refsel, int bypass, int r, int f, int q)
-{
- // Ensure that we aren't running off the PLL before we mess with it.
- if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
- // Make sure the HFROSC is running at its default setting
- use_hfrosc(4, 16);
- }
-
- // Set PLL Source to be HFXOSC if available.
- uint32_t config_value = 0;
-
- config_value |= PLL_REFSEL(refsel);
-
- if (bypass) {
- // Bypass
- config_value |= PLL_BYPASS(1);
-
- PRCI_REG(PRCI_PLLCFG) = config_value;
-
- // If we don't have an HFXTAL, this doesn't really matter.
- // Set our Final output divide to divide-by-1:
- PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
- } else {
- // In case we are executing from QSPI,
- // (which is quite likely) we need to
- // set the QSPI clock divider appropriately
- // before boosting the clock frequency.
-
- // Div = f_sck/2
- SPI0_REG(SPI_REG_SCKDIV) = 8;
-
- // Set DIV Settings for PLL
- // Both HFROSC and HFXOSC are modeled as ideal
- // 16MHz sources (assuming dividers are set properly for
- // HFROSC).
- // (Legal values of f_REF are 6-48MHz)
-
- // Set DIVR to divide-by-2 to get 8MHz frequency
- // (legal values of f_R are 6-12 MHz)
-
- config_value |= PLL_BYPASS(1);
- config_value |= PLL_R(r);
-
- // Set DIVF to get 512Mhz frequncy
- // There is an implied multiply-by-2, 16Mhz.
- // So need to write 32-1
- // (legal values of f_F are 384-768 MHz)
- config_value |= PLL_F(f);
-
- // Set DIVQ to divide-by-2 to get 256 MHz frequency
- // (legal values of f_Q are 50-400Mhz)
- config_value |= PLL_Q(q);
-
- // Set our Final output divide to divide-by-1:
- PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-
- PRCI_REG(PRCI_PLLCFG) = config_value;
-
- // Un-Bypass the PLL.
- PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
-
- // Wait for PLL Lock
- // Note that the Lock signal can be glitchy.
- // Need to wait 100 us
- // RTC is running at 32kHz.
- // So wait 4 ticks of RTC.
- uint32_t now = mtime_lo();
- while (mtime_lo() - now < 4) ;
-
- // Now it is safe to check for PLL Lock
- while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0) ;
- }
-
- // Switch over to PLL Clock source
- PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);
-}
-
-static void use_default_clocks()
-{
- // Turn off the LFROSC
- AON_REG(AON_LFROSC) &= ~ROSC_EN(1);
-
- // Use HFROSC
- use_hfrosc(4, 16);
-}
-
-static unsigned long __attribute__((noinline)) measure_cpu_freq(size_t n)
-{
- unsigned long start_mtime, delta_mtime;
- unsigned long mtime_freq = get_timer_freq();
-
- // Don't start measuruing until we see an mtime tick
- unsigned long tmp = mtime_lo();
- do {
- start_mtime = mtime_lo();
- } while (start_mtime == tmp);
-
- unsigned long start_mcycle = read_csr(mcycle);
-
- do {
- delta_mtime = mtime_lo() - start_mtime;
- } while (delta_mtime < n);
-
- unsigned long delta_mcycle = read_csr(mcycle) - start_mcycle;
-
- return (delta_mcycle / delta_mtime) * mtime_freq
- + ((delta_mcycle % delta_mtime) * mtime_freq) / delta_mtime;
-}
-
-unsigned long get_cpu_freq()
-{
- static uint32_t cpu_freq;
-
- if (!cpu_freq) {
- // warm up I$
- measure_cpu_freq(1);
- // measure for real
- cpu_freq = measure_cpu_freq(10);
- }
-
- return cpu_freq;
-}
-
-static void uart_init(size_t baud_rate)
-{
- GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
- GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
- UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
- UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
-}
-
-
-
-#ifdef USE_PLIC
-extern void handle_m_ext_interrupt();
-#endif
-
-#ifdef USE_M_TIME
-extern void handle_m_time_interrupt();
-#endif
-
-uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
-{
- if (0){
-#ifdef USE_PLIC
- // External Machine-Level interrupt from PLIC
- } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
- handle_m_ext_interrupt();
-#endif
-#ifdef USE_M_TIME
- // External Machine-Level interrupt from PLIC
- } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
- handle_m_time_interrupt();
-#endif
- }
- else {
- write(1, "trap\n", 5);
- _exit(1 + mcause);
- }
- return epc;
-}
-
-void _init()
-{
-
- #ifndef NO_INIT
- use_default_clocks();
- use_pll(0, 0, 1, 31, 1);
- uart_init(115200);
-
- printf("core freq at %d Hz\n", get_cpu_freq());
-
- write_csr(mtvec, &trap_entry);
- if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
- write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
- write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
- }
- #endif
-
-}
-
-void _fini()
-{
-}
diff --git a/bsp/env/freedom-e300-hifive1/openocd.cfg b/bsp/env/freedom-e300-hifive1/openocd.cfg
deleted file mode 100644
index b531e9c..0000000
--- a/bsp/env/freedom-e300-hifive1/openocd.cfg
+++ /dev/null
@@ -1,34 +0,0 @@
-adapter_khz 10000
-
-interface ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
-
-ftdi_layout_init 0x0008 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
-
-#Reset Stretcher logic on FE310 is ~1 second long
-#This doesn't apply if you use
-# ftdi_set_signal, but still good to document
-#adapter_nsrst_delay 1500
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
-init
-#reset -- This type of reset is not implemented yet
-if {[ info exists pulse_srst]} {
- ftdi_set_signal nSRST 0
- ftdi_set_signal nSRST z
- #Wait for the reset stretcher
- #It will work without this, but
- #will incur lots of delays for later commands.
- sleep 1500
-}
-halt
-#flash protect 0 64 last off
diff --git a/bsp/env/freedom-e300-hifive1/platform.h b/bsp/env/freedom-e300-hifive1/platform.h
deleted file mode 100644
index 806fcfc..0000000
--- a/bsp/env/freedom-e300-hifive1/platform.h
+++ /dev/null
@@ -1,133 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PLATFORM_H
-#define _SIFIVE_PLATFORM_H
-
-// Some things missing from the official encoding.h
-#define MCAUSE_INT 0x80000000
-#define MCAUSE_CAUSE 0x7FFFFFFF
-
-#include "sifive/const.h"
-#include "sifive/devices/aon.h"
-#include "sifive/devices/clint.h"
-#include "sifive/devices/gpio.h"
-#include "sifive/devices/otp.h"
-#include "sifive/devices/plic.h"
-#include "sifive/devices/prci.h"
-#include "sifive/devices/pwm.h"
-#include "sifive/devices/spi.h"
-#include "sifive/devices/uart.h"
-
-/****************************************************************************
- * Platform definitions
- *****************************************************************************/
-
-// Memory map
-#define MASKROM_MEM_ADDR _AC(0x00001000,UL)
-#define TRAPVEC_TABLE_CTRL_ADDR _AC(0x00001010,UL)
-#define OTP_MEM_ADDR _AC(0x00020000,UL)
-#define CLINT_CTRL_ADDR _AC(0x02000000,UL)
-#define PLIC_CTRL_ADDR _AC(0x0C000000,UL)
-#define AON_CTRL_ADDR _AC(0x10000000,UL)
-#define PRCI_CTRL_ADDR _AC(0x10008000,UL)
-#define OTP_CTRL_ADDR _AC(0x10010000,UL)
-#define GPIO_CTRL_ADDR _AC(0x10012000,UL)
-#define UART0_CTRL_ADDR _AC(0x10013000,UL)
-#define SPI0_CTRL_ADDR _AC(0x10014000,UL)
-#define PWM0_CTRL_ADDR _AC(0x10015000,UL)
-#define UART1_CTRL_ADDR _AC(0x10023000,UL)
-#define SPI1_CTRL_ADDR _AC(0x10024000,UL)
-#define PWM1_CTRL_ADDR _AC(0x10025000,UL)
-#define SPI2_CTRL_ADDR _AC(0x10034000,UL)
-#define PWM2_CTRL_ADDR _AC(0x10035000,UL)
-#define SPI0_MEM_ADDR _AC(0x20000000,UL)
-#define MEM_CTRL_ADDR _AC(0x80000000,UL)
-
-// IOF masks
-#define IOF0_SPI1_MASK _AC(0x000007FC,UL)
-#define SPI11_NUM_SS (4)
-#define IOF_SPI1_SS0 (2u)
-#define IOF_SPI1_SS1 (8u)
-#define IOF_SPI1_SS2 (9u)
-#define IOF_SPI1_SS3 (10u)
-#define IOF_SPI1_MOSI (3u)
-#define IOF_SPI1_MISO (4u)
-#define IOF_SPI1_SCK (5u)
-#define IOF_SPI1_DQ0 (3u)
-#define IOF_SPI1_DQ1 (4u)
-#define IOF_SPI1_DQ2 (6u)
-#define IOF_SPI1_DQ3 (7u)
-
-#define IOF0_SPI2_MASK _AC(0xFC000000,UL)
-#define SPI2_NUM_SS (1)
-#define IOF_SPI2_SS0 (26u)
-#define IOF_SPI2_MOSI (27u)
-#define IOF_SPI2_MISO (28u)
-#define IOF_SPI2_SCK (29u)
-#define IOF_SPI2_DQ0 (27u)
-#define IOF_SPI2_DQ1 (28u)
-#define IOF_SPI2_DQ2 (30u)
-#define IOF_SPI2_DQ3 (31u)
-
-//#define IOF0_I2C_MASK _AC(0x00003000,UL)
-
-#define IOF0_UART0_MASK _AC(0x00030000, UL)
-#define IOF_UART0_RX (16u)
-#define IOF_UART0_TX (17u)
-
-#define IOF0_UART1_MASK _AC(0x03000000, UL)
-#define IOF_UART1_RX (24u)
-#define IOF_UART1_TX (25u)
-
-#define IOF1_PWM0_MASK _AC(0x0000000F, UL)
-#define IOF1_PWM1_MASK _AC(0x00780000, UL)
-#define IOF1_PWM2_MASK _AC(0x00003C00, UL)
-
-// Interrupt numbers
-#define INT_RESERVED 0
-#define INT_WDOGCMP 1
-#define INT_RTCCMP 2
-#define INT_UART0_BASE 3
-#define INT_UART1_BASE 4
-#define INT_SPI0_BASE 5
-#define INT_SPI1_BASE 6
-#define INT_SPI2_BASE 7
-#define INT_GPIO_BASE 8
-#define INT_PWM0_BASE 40
-#define INT_PWM1_BASE 44
-#define INT_PWM2_BASE 48
-
-// Helper functions
-#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
-#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
-#define AON_REG(offset) _REG32(AON_CTRL_ADDR, offset)
-#define CLINT_REG(offset) _REG32(CLINT_CTRL_ADDR, offset)
-#define GPIO_REG(offset) _REG32(GPIO_CTRL_ADDR, offset)
-#define OTP_REG(offset) _REG32(OTP_CTRL_ADDR, offset)
-#define PLIC_REG(offset) _REG32(PLIC_CTRL_ADDR, offset)
-#define PRCI_REG(offset) _REG32(PRCI_CTRL_ADDR, offset)
-#define PWM0_REG(offset) _REG32(PWM0_CTRL_ADDR, offset)
-#define PWM1_REG(offset) _REG32(PWM1_CTRL_ADDR, offset)
-#define PWM2_REG(offset) _REG32(PWM2_CTRL_ADDR, offset)
-#define SPI0_REG(offset) _REG32(SPI0_CTRL_ADDR, offset)
-#define SPI1_REG(offset) _REG32(SPI1_CTRL_ADDR, offset)
-#define SPI2_REG(offset) _REG32(SPI2_CTRL_ADDR, offset)
-#define UART0_REG(offset) _REG32(UART0_CTRL_ADDR, offset)
-#define UART1_REG(offset) _REG32(UART1_CTRL_ADDR, offset)
-
-// Misc
-
-#include <stdint.h>
-
-#define NUM_GPIO 32
-
-#define PLIC_NUM_INTERRUPTS 52
-#define PLIC_NUM_PRIORITIES 7
-
-#include "hifive1.h"
-
-unsigned long get_cpu_freq(void);
-unsigned long get_timer_freq(void);
-uint64_t get_timer_value(void);
-
-#endif /* _SIFIVE_PLATFORM_H */
diff --git a/bsp/env/freedom-e300-hifive1/settings.mk b/bsp/env/freedom-e300-hifive1/settings.mk
deleted file mode 100644
index 230fccc..0000000
--- a/bsp/env/freedom-e300-hifive1/settings.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-# Describes the CPU on this board to the rest of the SDK.
-RISCV_ARCH := rv32imac
-RISCV_ABI := ilp32
generated by cgit v1.2.1-18-gbd029 (git 2.20.0) at 2024-05-20 15:24:22 +0000