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-rw-r--r--bsp/coreip-e31-arty/settings.mk2
-rw-r--r--bsp/coreip-e31-rtl/settings.mk2
2 files changed, 2 insertions, 2 deletions
diff --git a/bsp/coreip-e31-arty/settings.mk b/bsp/coreip-e31-arty/settings.mk
index 0b9c2cb..c2a2547 100644
--- a/bsp/coreip-e31-arty/settings.mk
+++ b/bsp/coreip-e31-arty/settings.mk
@@ -1,5 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
-RISCV_CMODEL=medlow
+RISCV_CMODEL=medany
TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e31-rtl/settings.mk b/bsp/coreip-e31-rtl/settings.mk
index f60f250..50ec3c7 100644
--- a/bsp/coreip-e31-rtl/settings.mk
+++ b/bsp/coreip-e31-rtl/settings.mk
@@ -1,6 +1,6 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
-RISCV_CMODEL=medlow
+RISCV_CMODEL=medany
COREIP_MEM_WIDTH=32