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-rwxr-xr-xscripts/fixup-dts107
-rwxr-xr-xscripts/open-docs20
-rw-r--r--scripts/standalone.mk18
-rwxr-xr-xscripts/submodules-use-ssh.sh2
4 files changed, 64 insertions, 83 deletions
diff --git a/scripts/fixup-dts b/scripts/fixup-dts
index 278b835..8b2457f 100755
--- a/scripts/fixup-dts
+++ b/scripts/fixup-dts
@@ -38,10 +38,10 @@ if [ `grep -c 'riscv,pmp' ${dts}` -eq 0 ]; then
# Check for targets without PMP support
TARGET=`echo ${dts} | cut -d '/' -f 1`
- if [ $TARGET != "freedom-e310-arty" -a \
- $TARGET != "sifive-hifive1" -a \
- $TARGET != "coreip-e20-rtl" -a \
- $TARGET != "coreip-e20-arty" ]; then
+ if [ "$TARGET" != "freedom-e310-arty" -a \
+ "$TARGET" != "sifive-hifive1" -a \
+ "$TARGET" != "coreip-e20-rtl" -a \
+ "$TARGET" != "coreip-e20-arty" ]; then
${SED} -i '/riscv,isa/a riscv,pmpregions = <1>;' ${dts}
@@ -105,84 +105,27 @@ if [ `grep -c 'stdout-path' ${dts}` -eq 0 ]; then
fi
-# Add a test memory node if one doesn't exist
-
-if [ `grep -c 'sifive,testram0' ${dts}` -eq 0 ]; then
-
- # bullet and U cores have a memory defined already
- if [ `grep -c 'sifive,bullet0' ${dts}` -eq 0 -a `grep -c 'SiFive,FU' ${dts}` -eq 0 ]; then
-
- echo "$0: Test memory node not found in ${dts}."
-
- # The heuristic for determining which memory address contains the
- # program code loaded by the RTL testbench is determined by taking
- # the design ports and sorting them in order of (periph, sys, mem),
- # and then lexicographically by protocol.
-
- port_types="periph sys mem"
- protocols="ahb axi4 tl"
-
- for port_type in ${port_types}; do
- for protocol in ${protocols}; do
-
- # Check if the port exists
- if [ `grep -c "${protocol}-${port_type}-port" ${dts}` -ne 0 ]; then
-
- # Build the node name
- port_node_name=`egrep -o "${protocol}-${port_type}-port@[a-fA-F0-9]+" ${dts}`
- echo -e "$0: \tUsing node \t${port_node_name}"
-
- # Get the address and size cells
- address_cells=`cat ${dts} | tr -d '\n\t' | grep -oP "${port_node_name}.*?address-cells = <\K(\d+)"`
- echo -e "$0: \tAddress cells \t${address_cells}"
- size_cells=`cat ${dts} | tr -d '\n\t' | grep -oP "${port_node_name}.*?size-cells = <\K(\d+)"`
- echo -e "$0: \tSize cells \t${size_cells}"
-
- # Get the base address and size
- if [ ${address_cells} -eq 1 -a ${size_cells} -eq 1 ]; then
- address_and_size=(`cat ${dts} | tr -d '\n\t' | grep -oP "${port_node_name}.*?ranges = <0x\d+ \K(0x\d+ 0x\d+)"`)
- base_address=${address_and_size[0]}
- size=${address_and_size[1]}
- elif [ ${address_cells} -eq 1 -a ${size_cells} -eq 2 ]; then
- address_and_size=(`cat ${dts} | tr -d '\n\t' | grep -oP "${port_node_name}.*?ranges = <0x\d+ \K(0x\d+ 0x\d+ 0x\d+)"`)
- base_address=${address_and_size[0]}
- size="${address_and_size[1]} ${address_and_size[2]}"
- elif [ ${address_cells} -eq 2 -a ${size_cells} -eq 1 ]; then
- address_and_size=(`cat ${dts} | tr -d '\n\t' | grep -oP "${port_node_name}.*?ranges = <0x\d+ 0x\d+ \K(0x\d+ 0x\d+ 0x\d+)"`)
- base_address="${address_and_size[0]} ${address_and_size[1]}"
- size=${address_and_size[2]}
- elif [ ${address_cells} -eq 2 -a ${size_cells} -eq 2 ]; then
- address_and_size=(`cat ${dts} | tr -d '\n\t' | grep -oP "${port_node_name}.*?ranges = <0x\d+ 0x\d+ \K(0x\d+ 0x\d+ 0x\d+ 0x\d+)"`)
- base_address="${address_and_size[0]} ${address_and_size[1]}"
- size="${address_and_size[2]} ${address_and_size[3]}"
- fi
- echo -e "$0: \tBase addr \t${base_address}"
- echo -e "$0: \tSize \t\t${size}"
-
- # Build the name of the testram node
- if [ "${address_and_size[0]}" == "0x0" ]; then
- node_name_addr=`echo ${address_and_size[1]} | cut -c 3-`
- else
- node_name_addr=`echo ${address_and_size[0]} | cut -c 3-`
- fi
-
- # Determine word size from ISA bitness
- if [ `grep -c 'riscv,isa = "rv32' ${dts}` -ne 0 ]; then
- word_size=4
- else
- word_size=8
- fi
- echo -e "$0: \tWord size \t${word_size}"
-
- # Create the test memory
- ${SED} -i "s/ranges;/ranges;\n\t\ttest_memory: testram@${node_name_addr} {\n\t\t\tcompatible = \"sifive,testram0\";\n\t\t\treg = <${base_address} ${size}>;\n\t\t\treg-names = \"mem\";\n\t\t\tword-size-bytes = <${word_size}>;\n\t\t};/" ${dts}
- echo -e "$0: \tAdded testram@${node_name_addr}"
-
- # Break out of both loops
- break 2
- fi
- done
- done
+# FPGA targets need a 0x400000 byte offset into their SPI flash
+
+# Is the target an FPGA?
+if [ `echo ${dts} | grep -c 'arty'` -ne 0 -o `echo ${dts} | grep -c 'fpga'` -ne 0 ] ; then
+ # Is there a metal,entry property in the chosen node?
+ if [ `grep -c 'metal,entry' ${dts}` -eq 0 ] ; then
+ echo "$0: FPGA target needs metal,entry property to set boot offset."
+
+ # Find the SPI device with the lowest base address
+ first_spi_node=`grep -oE "spi@[[:xdigit:]]+?" ${dts} | sort | head -n 1`
+
+ # Get the DTS node label of that SPI device
+ spi_entry_label=`grep -oE "[^[:space:]]+?:\s+?${first_spi_node}" ${dts} | cut -d ':' -f 1`
+
+ if [ `grep -c 'chosen' ${dts}` -eq 0 ]; then
+ ${SED} -i "/cpus/i chosen {\n};" ${dts}
+ fi
+
+ ${SED} -i "/chosen/a metal,entry = <&${spi_entry_label} 0x400000>;" ${dts}
+
+ echo -e "$0: \tAdded metal,entry for SPI node ${first_spi_node} with label ${spi_entry_label}"
fi
fi
diff --git a/scripts/open-docs b/scripts/open-docs
new file mode 100755
index 0000000..8ad5299
--- /dev/null
+++ b/scripts/open-docs
@@ -0,0 +1,20 @@
+#!/bin/bash
+
+SDK_PATH="$( cd "$(dirname "$0")/.." ; pwd -P )"
+DOCS_PATH=$SDK_PATH/doc/html/index.html
+
+XDG_OPEN=`which xdg-open`
+OPEN=`which open`
+
+if [ "$XDG_OPEN" != "" ]; then
+ echo "Opening $DOCS_PATH"
+ $XDG_OPEN $DOCS_PATH
+
+elif [ "$OPEN" != "" ]; then
+ echo "Opening $DOCS_PATH"
+ $OPEN $DOCS_PATH
+
+else
+ echo "Please open $DOCS_PATH in your preferred HTML viewer"
+fi
+
diff --git a/scripts/standalone.mk b/scripts/standalone.mk
index 6f87950..d0740cd 100644
--- a/scripts/standalone.mk
+++ b/scripts/standalone.mk
@@ -49,6 +49,14 @@ ifeq ($(LINK_TARGET),)
endif
endif
+ifeq ($(PROGRAM),coremark)
+ifeq ($(CONFIGURATION),release)
+ifeq ($(LINK_TARGET),)
+LINK_TARGET = ramrodata
+endif
+endif
+endif
+
ifeq ($(LINK_TARGET),)
LINK_TARGET = default
endif
@@ -127,6 +135,15 @@ endif
RISCV_XCFLAGS += -DDHRY_ITERS=$(TARGET_DHRY_ITERS)
endif
+ifeq ($(PROGRAM),coremark)
+ifeq ($(RISCV_SERIES),sifive-7-series)
+RISCV_XCFLAGS += -O2 -fno-common -funroll-loops -finline-functions -funroll-all-loops --param max-inline-insns-auto=20 -falign-functions=8 -falign-jumps=8 -falign-loops=8 --param inline-min-speedup=10 -mtune=sifive-7-series -ffast-math
+else
+RISCV_XCFLAGS += -O2 -fno-common -funroll-loops -finline-functions --param max-inline-insns-auto=20 -falign-functions=4 -falign-jumps=4 -falign-loops=4 --param inline-min-speedup=10
+endif
+RISCV_XCFLAGS += -DITERATIONS=$(TARGET_CORE_ITERS)
+endif
+
# Turn on garbage collection for unused sections
RISCV_LDFLAGS += -Wl,--gc-sections
# Turn on linker map file generation
@@ -171,6 +188,7 @@ $(PROGRAM_ELF): \
$(BSP_DIR)/metal.$(LINK_TARGET).lds
mkdir -p $(dir $@)
$(MAKE) -C $(SRC_DIR) $(basename $(notdir $@)) \
+ PORT_DIR=$(PORT_DIR) \
AR=$(RISCV_AR) \
CC=$(RISCV_GCC) \
CXX=$(RISCV_GXX) \
diff --git a/scripts/submodules-use-ssh.sh b/scripts/submodules-use-ssh.sh
index 25a270d..106af2b 100755
--- a/scripts/submodules-use-ssh.sh
+++ b/scripts/submodules-use-ssh.sh
@@ -1,4 +1,4 @@
-#!/usr/bin/env sh
+#!/bin/bash
# By default, when you clone Freedom E SDK, submodules are instantiated with their
# origin URLs pointing to GitHub's HTTPS URL for the repository.
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-26 09:12:26 +0000