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2018-01-02updated project filesDrew Barbier
2018-01-02Merge commit 'cee980238e2dbd7c9af0eb79bd5621a4dc73c234' into fs3Drew Barbier
2017-12-31Bump riscv-gnu-toolchain and openocd for releasePalmer Dabbelt
2017-12-28udpated launch filesDrew Barbier
2017-12-28project and debug launch updates for beta 3Drew Barbier
2017-11-21Merge pull request #82 from sifive/e51dhrystonedbarbi1
Make space for e51 dhrystone
2017-11-21make some space forDrew Barbier
2017-11-21Merge pull request #81 from sifive/dhrystone-artyPalmer Dabbelt
Dhrystone arty
2017-11-21The E31 and E51 have 16KiB of RAMDrew Barbier
2017-11-21coreplexip dhrystone updatesDrew Barbier
2017-11-21Merge pull request #79 from sifive/small-putsPalmer Dabbelt
Implement a smaller puts
2017-11-21Implement a smaller putsPalmer Dabbelt
The e31's init.c calls puts intsead of printf, which oddly enough is a lot bigger: since we wrap printf, puts pulls in a lot of newlib. This adds a wrapped puts so it's very small.
2017-11-20dhrystone score to reflect current resultDrew Barbier
2017-11-20Update dhrystone sectionDrew Barbier
2017-11-17Merge pull request #78 from sifive/dhrystonePalmer Dabbelt
Speed up Dhrystone on the HiFive1
2017-11-17Speed up Dhrystone on the HiFive1Palmer Dabbelt
There's a handful of things that went wrong here: * The read-only data sections were mapped to flash, which is very slow. I just put them in the data segment, so they end up in the scratchpad. This is about a 10x hit, so it's really important. * The toolchain was an old version, which didn't have a fast memcpy implementation on 32-bit systems. This is about a 2x hit. * Some compiler flags were incorrect, including * -Os instead of -O3 * Missing -mexplicit-relocs * Missing -DNOENUM * Missing -falign-functions=4 I haven't checked how much those hurt With this, I get $ make software BOARD=freedom-e300-hifive1 PROGRAM=dhrystone LINK_TARGET=dhrystone $ make upload BOARD=freedom-e300-hifive1 PROGRAM=dhrystone LINK_TARGET=dhrystone Execution starts, 10000000 runs through Dhrystone Execution ends Final values of the variables used in the benchmark: Int_Glob: 5 should be: 5 Bool_Glob: 1 should be: 1 Ch_1_Glob: A should be: A Ch_2_Glob: B should be: B Arr_1_Glob[8]: 7 should be: 7 Arr_2_Glob[8][7]: 10000010 should be: Number_Of_Runs + 10 Ptr_Glob-> Ptr_Comp: -2147470264 should be: (implementation-dependent) Discr: 0 should be: 0 Enum_Comp: 2 should be: 2 Int_Comp: 17 should be: 17 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Next_Ptr_Glob-> Ptr_Comp: -2147470264 should be: (implementation-dependent), same as above Discr: 0 should be: 0 Enum_Comp: 1 should be: 1 Int_Comp: 18 should be: 18 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Int_1_Loc: 5 should be: 5 Int_2_Loc: 13 should be: 13 Int_3_Loc: 7 should be: 7 Enum_Loc: 1 should be: 1 Str_1_Loc: DHRYSTONE PROGRAM, 1'ST STRING should be: DHRYSTONE PROGRAM, 1'ST STRING Str_2_Loc: DHRYSTONE PROGRAM, 2'ND STRING should be: DHRYSTONE PROGRAM, 2'ND STRING Microseconds for one run through Dhrystone: 1.3 Dhrystones per Second: 714285.6 which is 1.55 DMIPS/MHz at 262 MHz. It's still a bit slower than our current stuff, but I don't remember what was actually in the HiFive1 so I'm not sure what we should be getting. I verified the clock is accurate with a stopwatch. I haven't bothered to go look through the binary, but I think we're about 10 cycles off so it should be managable.
2017-10-06Merge pull request #67 from dgrubb/Makefile-tweaksMegan Wachs
Update Makefile with more user-friendly clean options
2017-09-22Fix typo in help (#75)pbing
2017-09-22Fix name resolving issue (#74)pbing
2017-09-22Fix `RISC_PATH` -> `RISCV_PATH` in README (#72)Frank
2017-08-22Update to the August 18th OpenOCD and toolchain releasesPalmer Dabbelt
2017-08-15Merge branch 'master' of github.com:sifive/freedom-e-sdkGleb Gagarin
2017-08-15blacklisted watchdog program for coreplexip-e51-arty boardGleb Gagarin
2017-08-15updated OpenOCD versionGleb Gagarin
2017-08-10Merge pull request #70 from sifive/ecalldbarbi1
added ecall to vectored irq example
2017-08-10added ecall to vectored irq exampleDrew Barbier
2017-08-07HiFive1 AON Watchdog exampleDrew Barbier
2017-07-27Merge pull request #69 from sifive/vectordbarbi1
Vector
2017-07-26changed synch trap entry to match other vectorsDrew Barbier
2017-07-26removed save/restore of x18Drew Barbier
2017-07-26E31 vectored_interrupt.c as a linked fileDrew Barbier
2017-07-26only save/restore caller registers on trap entryDrew Barbier
2017-07-26only save/restore "caller" registers on trap entryDrew Barbier
2017-07-26removed bin file commited by accidentDrew Barbier
2017-07-26fixed commentsDrew Barbier
2017-07-26fixed TRAP_EXIT macro. TRAP_ENTRY/EXIT2 only saves/restores calleeDrew Barbier
registers
2017-07-26E31 FS ProjectDrew Barbier
2017-07-25too many .aling 2'sDrew Barbier
2017-07-25FS debug launch fileDrew Barbier
2017-07-25added vectored interrupt exampleDrew Barbier
2017-06-26Update Makefile with more user-friendly clean optionsdgrubb
1) Change target 'clean' to refer to 'software_clean' rather than 'toolchain-clean' and 'openocd-clean'. 2) Update Makefile help to reflect changes.
2017-06-15removed language filesDrew Barbier
2017-06-15E31 linker script updateDrew Barbier
2017-06-15E51 linker script updatesDrew Barbier
2017-06-15linker file updateDrew Barbier
2017-06-14Update openocd to v20170612Palmer Dabbelt
2017-06-14Merge pull request #64 from sifive/multicore-scratchpadPalmer Dabbelt
Add support for multicore systems and scratchpad-only systems
2017-06-14led_fade doesn't build on the e300-artyPalmer Dabbelt
2017-06-14Add a SMP examplePalmer Dabbelt
This just prints "hello world" on two cores. It contains an example of how to initialize a multi-core system using IPIs, and a simple spin lock.
2017-06-14Ignore some generated binariesPalmer Dabbelt
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