Age | Commit message (Collapse) | Author | |
---|---|---|---|
2019-03-18 | Update Arty clock to reflects HW | Bunnaroath Sou | |
2019-03-05 | Update/add E31, E34, S51, S54 arty targets for all 19.2 CoreIPs release | Bunnaroath Sou | |
2019-02-11 | Update BSPs for hw-exec-breakpoint | Bunnaroath Sou | |
2019-02-04 | Replace all mee with metal | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-30 | Add PMPs to coreip DTSs | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-09 | Update DTS and freedom-mee to support interrupt | Bunnaroath Sou | |
2019-01-03 | Add fixed-clocks to Arty boards | Nathaniel Graff | |
The serial device needs a clock in the DTS to initialize. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2018-12-13 | Add MEE BSP for E31 CoreIP Arty | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> |