Age | Commit message (Collapse) | Author | |
---|---|---|---|
2019-04-30 | Update metal.*, *.dts and settings to latest | Bunnaroath Sou | |
2019-04-12 | Update BSPs for Unleashed and U54(MC) | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-26 | Making dhrystone public | Bunnaroath Sou | |
2019-03-26 | Merge pull request #211 from sifive/reglists | Carsten Gosvig | |
Added design.reglist files to all bsp's based on screenlog output | |||
2019-03-25 | Update header to include PLIC, CLIC SUBINTERRUPTS | Bunnaroath Sou | |
2019-03-21 | Update lds files to exclude itim in .text and PLIC subinterrupts | Bunnaroath Sou | |
2019-03-21 | Added design.reglist files to all bsp's based on screenlog output | cgsfv | |
2019-03-19 | Remove accidental added files | Bunnaroath Sou | |
2019-03-18 | Remove metal.lds which is now metal.default.lds | Bunnaroath Sou | |
2019-03-18 | Add new linker target files for default, ramrodata, scratchpad | Bunnaroath Sou | |
2019-03-18 | Update Arty clock to reflects HW | Bunnaroath Sou | |
2019-03-14 | Create TARGET_TAGS | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-07 | Update BSPs | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Update/add E31, E34, S51, S54 arty targets for all 19.2 CoreIPs release | Bunnaroath Sou | |
2019-03-05 | Add RISCV_CMODEL to settings.mk | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-02-27 | Spellcheck correction readme for bsp targets for E20, E21, E31/Arty, S51/Arty | Bunnaroath Sou | |
2019-02-26 | Add corrected formatting for bullet lists | Kevin Mills | |
Markdown bullet lists should: (1) have a blank line before and after the list; (2) start each list item at the beginning of the line (no leading white-space) The markdown processor in Freedom Studio enforces these standards and does not render correctly otherwise. | |||
2019-02-25 | Adding readme to bsp targets for E20, E21, E31/Arty, S51/Arty | Bunnaroath Sou | |
2019-02-14 | Update BSPs | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-02-11 | Update BSPs for hw-exec-breakpoint | Bunnaroath Sou | |
2019-02-04 | Regen BSPs for metal rename | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-02-04 | Replace all mee with metal | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-02-01 | Update BSP files and freedom-mee to reflect their latest update | Bunnaroath Sou | |
2019-01-31 | Update BSP files after unit test e24 clic interrupts | Bunnaroath Sou | |
2019-01-30 | Update BSPs for PMPs | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-30 | Add PMPs to coreip DTSs | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-29 | Regen BSPs for separate stacks and heaps | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-15 | Update mee.h files for freedom-metal clic support | Bunnaroath Sou | |
2019-01-11 | Update freedom-mee and mee.h files to pickup interrupt fixes | Bunnaroath Sou | |
2019-01-09 | Update DTS and freedom-mee to support interrupt | Bunnaroath Sou | |
2019-01-07 | Merge pull request #127 from sifive/itim | Nathaniel Graff | |
Add an ITIM example | |||
2019-01-07 | Update BSPs for ITIM | Nathaniel Graff | |
2019-01-04 | Add OpenOCD configurations to Arty boards | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-03 | Update BSPs for Arty Clocks | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-01-03 | Add fixed-clocks to Arty boards | Nathaniel Graff | |
The serial device needs a clock in the DTS to initialize. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2018-12-14 | Fix COREIP_HEX_WIDTH | Palmer Dabbelt | |
I must have been too tired last night... Signed-off-by: Palmer Dabbelt <palmer@sifive.com> | |||
2018-12-13 | Add support for generating coreip hex files via elf2hex | Palmer Dabbelt | |
This just calls elf2hex on the compiled elf files, producing a hex file that can be fed into RTL simulation. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> | |||
2018-12-13 | Add MEE BSP for E31 CoreIP Arty | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> |