freedom-e-sdk - my bad beginner RISC-V assembly LED blinking code.

Age	Commit message (Expand)	Author
2019-03-26	Making dhrystone public	Bunnaroath Sou
2019-03-26	Merge pull request #211 from sifive/reglists	Carsten Gosvig
2019-03-25	Update header to include PLIC, CLIC SUBINTERRUPTS	Bunnaroath Sou
2019-03-21	Update lds files to exclude itim in .text and PLIC subinterrupts	Bunnaroath Sou
2019-03-21	Added design.reglist files to all bsp's based on screenlog output	cgsfv
2019-03-18	Make rtl target to use ram from dtim, flash from testram	Bunnaroath Sou
2019-03-18	Remove metal.lds which is now metal.default.lds	Bunnaroath Sou
2019-03-18	Add new linker target files for default, ramrodata, scratchpad	Bunnaroath Sou
2019-03-18	Update Arty clock to reflects HW	Bunnaroath Sou
2019-03-14	Fix typos and formatting in settings.mk	Nathaniel Graff
2019-03-14	Create TARGET_TAGS	Nathaniel Graff
2019-03-07	Rename coreip-X to coreip-X-rtl	Nathaniel Graff