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path: root/bsp/env/coreplexip-e31-arty
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2019-03-07Remove legacy BSPNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-06-29Add a CLIC interrupt examplePalmer Dabbelt
This example is fairly simple, but it does at least demonstrate how to use a C-based preemptable interrupt handler that's been registered in CLIC mode on a SiFive E21.
2017-11-21make some space forDrew Barbier
2017-11-21The E31 and E51 have 16KiB of RAMDrew Barbier
2017-11-21coreplexip dhrystone updatesDrew Barbier
2017-07-25added vectored interrupt exampleDrew Barbier
2017-06-14Call puts instead of printf when printing constantsPalmer Dabbelt
printf doesn't fit in the scratchpad, but since there's really no reason to call it on constant strings it can be replaced with puts. With this change, the "hello" example fits in the scratchpad.
2017-06-14Add linker scripts that target the scratchpadPalmer Dabbelt
Everything still defaults to the flash, but users can optionally select the scratchpad. Note that you have to be pretty careful about your scratchpad programs, most of them won't fit. For example, printf is too big to fit in the scratchpad.
2017-06-10Just lump all the RAM sections togetherPalmer Dabbelt
Since our loader doesn't support multiple sections anyway, there's really no reason to have all these sections floating around. They're causing trouble due to misalignment so it's easiest to just group them together so we can properly enforce alignment.
2017-06-09Use the correct global pointer symbolPalmer Dabbelt
2017-06-09Don't use .section\nALIGN, reorder sdata and srodataPalmer Dabbelt
I'm hoping this will make everything more likely to align. We can't use the other mechanism because our loader is lazy and assumes all the sections are contiguous.
2017-06-08Specify alignment on the .sdata and .srodata sectionsPalmer Dabbelt
Without these alignment directives the sections are only required to be aligned on word-sized boundries, but we sometimes require double-word alignment. This allows the linker to sanely emit these sections.
2017-05-05coreplex-e51: Correct width of MCAUSEmwachs5
2017-05-05coreplexip-e51-arty: MCAUSE is XLEN-bits wide.Megan Wachs
2017-05-04Update SDK For E31/E51 Coreplex IP EvaluationMegan Wachs