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my bad beginner RISC-V assembly LED blinking code.
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freedom-e300-hifive1
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Author
2017-01-24
Use consistent OpenOCD config for Arty and HiFive1
Megan Wachs
2017-01-11
reduce code duplication and apply the same flags to Arty board
mwachs5
2017-01-11
Add the 'bootloader' which ships on HiFive1 Boards.
mwachs5
2017-01-03
Regularize timing code
Andrew Waterman
2017-01-03
Improve HiFive1 CPU frequency measurement routine
Andrew Waterman
2016-12-20
Separate .text.unlikely and .text.startup from .text
Andrew Waterman
2016-12-20
Pass argc and argv to main()
Andrew Waterman
2016-12-17
Remove unncessary srst delay when connecting with OpenOCD to HiFive1
Megan Wachs
2016-12-14
Move start.S and entry.S to a common directory
Albert Ou
2016-12-14
Merge pull request #25 from sifive/add_srst_option
Megan Wachs
2016-12-14
hifive1: Update OpenOCD Config script to optionally allow pulsing SRST
Megan Wachs
2016-12-14
Refactor libc stubs into libwrap
Albert Ou
2016-12-13
Use more standard form of _init()
Megan Wachs
2016-12-13
Use cleaner .S files
Megan Wachs
2016-12-11
Add some missing LICENSE headers.
Megan Wachs
2016-12-11
platform: add more defines which are generally needed
Megan Wachs
2016-12-09
demo_gpio: Correct trap_entry handling to enable timer/ext interrupts
Megan Wachs
2016-12-07
Merge pull request #17 from sifive/enable-fpu
Scott Johnson
2016-12-07
Initialize FPU properly
Scott Johnson
2016-12-07
Place .init_array/.fini_array sections in flash instead of RAM
Albert Ou
2016-12-06
Enable FPU in MSTATUS CSR during init
Scott Johnson
2016-11-30
Bump Everything to Match new Freedom Repo (#8)
Megan Wachs