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2018-12-12Merge pull request #76 from sifive/e300_arty_fixPalmer Dabbelt
E300 Arty: Don't specify the expected ID
2018-08-08Include <encoding.h> so MSTATUS_FS is visible to start.SPalmer Dabbelt
2018-07-08support clint only projectsDrew Barbier
2018-07-08FS projectsDrew Barbier
2018-07-05support the E20Drew Barbier
2018-07-04clic driver level and priority functionsDrew Barbier
2018-07-02short msi handlerDrew Barbier
2018-07-02update descriptionDrew Barbier
2018-07-02dont use pre-empt with buttonsDrew Barbier
2018-07-02e2 and clic startDrew Barbier
2018-06-29Add a CLIC interrupt examplePalmer Dabbelt
This example is fairly simple, but it does at least demonstrate how to use a C-based preemptable interrupt handler that's been registered in CLIC mode on a SiFive E21.
2018-01-26restore entry.SDrew Barbier
2018-01-04add FS dhrystone projectDrew Barbier
2017-11-21make some space forDrew Barbier
2017-11-21The E31 and E51 have 16KiB of RAMDrew Barbier
2017-11-21coreplexip dhrystone updatesDrew Barbier
2017-11-17Speed up Dhrystone on the HiFive1Palmer Dabbelt
There's a handful of things that went wrong here: * The read-only data sections were mapped to flash, which is very slow. I just put them in the data segment, so they end up in the scratchpad. This is about a 10x hit, so it's really important. * The toolchain was an old version, which didn't have a fast memcpy implementation on 32-bit systems. This is about a 2x hit. * Some compiler flags were incorrect, including * -Os instead of -O3 * Missing -mexplicit-relocs * Missing -DNOENUM * Missing -falign-functions=4 I haven't checked how much those hurt With this, I get $ make software BOARD=freedom-e300-hifive1 PROGRAM=dhrystone LINK_TARGET=dhrystone $ make upload BOARD=freedom-e300-hifive1 PROGRAM=dhrystone LINK_TARGET=dhrystone Execution starts, 10000000 runs through Dhrystone Execution ends Final values of the variables used in the benchmark: Int_Glob: 5 should be: 5 Bool_Glob: 1 should be: 1 Ch_1_Glob: A should be: A Ch_2_Glob: B should be: B Arr_1_Glob[8]: 7 should be: 7 Arr_2_Glob[8][7]: 10000010 should be: Number_Of_Runs + 10 Ptr_Glob-> Ptr_Comp: -2147470264 should be: (implementation-dependent) Discr: 0 should be: 0 Enum_Comp: 2 should be: 2 Int_Comp: 17 should be: 17 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Next_Ptr_Glob-> Ptr_Comp: -2147470264 should be: (implementation-dependent), same as above Discr: 0 should be: 0 Enum_Comp: 1 should be: 1 Int_Comp: 18 should be: 18 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Int_1_Loc: 5 should be: 5 Int_2_Loc: 13 should be: 13 Int_3_Loc: 7 should be: 7 Enum_Loc: 1 should be: 1 Str_1_Loc: DHRYSTONE PROGRAM, 1'ST STRING should be: DHRYSTONE PROGRAM, 1'ST STRING Str_2_Loc: DHRYSTONE PROGRAM, 2'ND STRING should be: DHRYSTONE PROGRAM, 2'ND STRING Microseconds for one run through Dhrystone: 1.3 Dhrystones per Second: 714285.6 which is 1.55 DMIPS/MHz at 262 MHz. It's still a bit slower than our current stuff, but I don't remember what was actually in the HiFive1 so I'm not sure what we should be getting. I verified the clock is accurate with a stopwatch. I haven't bothered to go look through the binary, but I think we're about 10 cycles off so it should be managable.
2017-11-16E300 Arty: Don't need to specify the expected ID, just tell it where the ↵mwachs5
SPIFlash controller is. This allows it to work for newer versions of the E300 Arty Dev Kit as well.
2017-07-26changed synch trap entry to match other vectorsDrew Barbier
2017-07-26removed save/restore of x18Drew Barbier
2017-07-26only save/restore caller registers on trap entryDrew Barbier
2017-07-26fixed TRAP_EXIT macro. TRAP_ENTRY/EXIT2 only saves/restores calleeDrew Barbier
registers
2017-07-25too many .aling 2'sDrew Barbier
2017-07-25added vectored interrupt exampleDrew Barbier
2017-06-14Add a SMP examplePalmer Dabbelt
This just prints "hello world" on two cores. It contains an example of how to initialize a multi-core system using IPIs, and a simple spin lock.
2017-06-14Call puts instead of printf when printing constantsPalmer Dabbelt
printf doesn't fit in the scratchpad, but since there's really no reason to call it on constant strings it can be replaced with puts. With this change, the "hello" example fits in the scratchpad.
2017-06-14Add linker scripts that target the scratchpadPalmer Dabbelt
Everything still defaults to the flash, but users can optionally select the scratchpad. Note that you have to be pretty careful about your scratchpad programs, most of them won't fit. For example, printf is too big to fit in the scratchpad.
2017-06-14New Freedom Studio Examples (#66)Megan Wachs
* examples ported to ilg build plugin * project cleanup * CoreplexIP-E31 ilg projects * E51FPGA ilg projects * Tested Debug * debug launch files * E31 Debug Launch Files * removed typo project * E51 launch files. Forgotten E31 File * Missing coreplexip files * examples ported to ilg build plugin * project cleanup * CoreplexIP-E31 ilg projects * E51FPGA ilg projects * Tested Debug * debug launch files * E31 Debug Launch Files * removed typo project * E51 launch files. Forgotten E31 File * Missing coreplexip files * starting fresh * HiFive1 demo_gpio and libwrap * hifive1 hello * debug launchers for hello and demo_gpio * hifive1 led_fade * led_fade: Since E300 Arty Dev Kit doesn't have a PRCI, the led_fade demo doesn't really work on it. * update include paths to ease generating stand-alone zips * Adding E51 Examples * E51 demo launch files * E31 Demos * E31 demo launch files
2017-06-10Just lump all the RAM sections togetherPalmer Dabbelt
Since our loader doesn't support multiple sections anyway, there's really no reason to have all these sections floating around. They're causing trouble due to misalignment so it's easiest to just group them together so we can properly enforce alignment.
2017-06-09Use the correct global pointer symbolPalmer Dabbelt
2017-06-09Don't use .section\nALIGN, reorder sdata and srodataPalmer Dabbelt
I'm hoping this will make everything more likely to align. We can't use the other mechanism because our loader is lazy and assumes all the sections are contiguous.
2017-06-09Don't call _{init,fini} in start.S, we call libc_{init,fini}_arryPalmer Dabbelt
2017-06-09Print the exit codes as unsigned numbersPalmer Dabbelt
Without this I get a message that looks like Program has exited with code 0x/0000008 which doesn't make any sense. This prints Progam has exited with code:0x80000008
2017-06-08Specify alignment on the .sdata and .srodata sectionsPalmer Dabbelt
Without these alignment directives the sections are only required to be aligned on word-sized boundries, but we sometimes require double-word alignment. This allows the linker to sanely emit these sections.
2017-05-08revert backDrew Barbier
2017-05-07changed write_hex to new defDrew Barbier
2017-05-07Merge remote-tracking branch 'origin/master' into freedom-studioDrew Barbier
2017-05-05coreplex-e51: Correct width of MCAUSEmwachs5
2017-05-05coreplexip-e51-arty: MCAUSE is XLEN-bits wide.Megan Wachs
2017-05-05updated demo_gpioDrew Barbier
2017-05-04Update SDK For E31/E51 Coreplex IP EvaluationMegan Wachs
2017-02-01Additional PRCI driver support. Make the code usable by C++ programs as well.Megan Wachs
2017-01-31add a 'driver' common PRCI functions.Megan Wachs
2017-01-31Move plic_driver code to a common location.Megan Wachs
2017-01-24Use consistent OpenOCD config for Arty and HiFive1Megan Wachs
2017-01-11reduce code duplication and apply the same flags to Arty boardmwachs5
2017-01-11Add the 'bootloader' which ships on HiFive1 Boards.mwachs5
2017-01-03Regularize timing codeAndrew Waterman
Provide get_timer_value() and get_timer_freq() and use them. On Arty, they use mcycle and the known-fixed core frequency, whereas on HiFive1 they use mtime and the known-fixed mtime frequency.
2017-01-03Improve HiFive1 CPU frequency measurement routineAndrew Waterman
- Warm up I$ first. - Correct for integer division truncation error. - Wait for an RTC clock edge before starting the timing loop, which removes an error proportional to the number of loop iterations, allowing us to run for far less time.
2017-01-03Keep mtvec 4-byte alignedAndrew Waterman