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2019-01-09Update DTS and freedom-mee to support interruptBunnaroath Sou
2019-01-07Update HiFive 1 to pull .itim sections into .textNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-01-07Merge pull request #127 from sifive/itimNathaniel Graff
Add an ITIM example
2019-01-07Update BSPs for ITIMNathaniel Graff
2019-01-04Fix BSP update script for MacOSNathaniel Graff
MacOS ls requires flags to appear before file arguments. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-01-04Add OpenOCD configurations to Arty boardsNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-01-03HiFive 1 does not have an ITIMNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-01-03Update BSPs for Arty ClocksNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-01-03Add fixed-clocks to Arty boardsNathaniel Graff
The serial device needs a clock in the DTS to initialize. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-17Merge pull request #119 from sifive/dt-tools-updaterPalmer Dabbelt
Add script for updating MEE BSPs
2018-12-14Add script for updating MEE BSPsNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-14Fix COREIP_HEX_WIDTHPalmer Dabbelt
I must have been too tired last night... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-12-13Add support for generating coreip hex files via elf2hexPalmer Dabbelt
This just calls elf2hex on the compiled elf files, producing a hex file that can be fed into RTL simulation. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-12-13Add MEE BSP for S51 CoreIP ArtyNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-13Add MEE BSP for S51 CoreIPNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-13Add MEE BSP for E31 CoreIP ArtyNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-13Add MEE BSP for E31 CoreIPNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-13Add MEE BSP for Freedom E310 ArtyNathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-13Add MEE BSP for SiFive HiFive1Nathaniel Graff
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-12Merge pull request #76 from sifive/e300_arty_fixPalmer Dabbelt
E300 Arty: Don't specify the expected ID
2018-09-11fix for loopDrew Barbier
2018-08-08Include <encoding.h> so MSTATUS_FS is visible to start.SPalmer Dabbelt
2018-07-08support clint only projectsDrew Barbier
2018-07-08FS projectsDrew Barbier
2018-07-05support the E20Drew Barbier
2018-07-05fix level calculationDrew Barbier
2018-07-04clic driver level and priority functionsDrew Barbier
2018-07-02short msi handlerDrew Barbier
2018-07-02update descriptionDrew Barbier
2018-07-02accessors for other clic registersDrew Barbier
2018-07-02dont use pre-empt with buttonsDrew Barbier
2018-07-02e2 and clic startDrew Barbier
2018-06-29Add a CLIC interrupt examplePalmer Dabbelt
This example is fairly simple, but it does at least demonstrate how to use a C-based preemptable interrupt handler that's been registered in CLIC mode on a SiFive E21.
2018-03-29bsp:devices:spi.h: fix sckmode fields valueGwenhael Goavec-Merou
2018-01-26restore entry.SDrew Barbier
2018-01-04add FS dhrystone projectDrew Barbier
2018-01-02Add _FUNC aliases for newlib-2.5.0Palmer Dabbelt
I'm not sure what the policy actaully is here, but some newlib functions now have an extra underscore before them. This defines a bunch of aliases and some more wrappers to link against the correct newlib functions for 2.5.0 but maintain compatibility with 2.4.0.
2017-11-21make some space forDrew Barbier
2017-11-21The E31 and E51 have 16KiB of RAMDrew Barbier
2017-11-21coreplexip dhrystone updatesDrew Barbier
2017-11-21Implement a smaller putsPalmer Dabbelt
The e31's init.c calls puts intsead of printf, which oddly enough is a lot bigger: since we wrap printf, puts pulls in a lot of newlib. This adds a wrapped puts so it's very small.
2017-11-17Speed up Dhrystone on the HiFive1Palmer Dabbelt
There's a handful of things that went wrong here: * The read-only data sections were mapped to flash, which is very slow. I just put them in the data segment, so they end up in the scratchpad. This is about a 10x hit, so it's really important. * The toolchain was an old version, which didn't have a fast memcpy implementation on 32-bit systems. This is about a 2x hit. * Some compiler flags were incorrect, including * -Os instead of -O3 * Missing -mexplicit-relocs * Missing -DNOENUM * Missing -falign-functions=4 I haven't checked how much those hurt With this, I get $ make software BOARD=freedom-e300-hifive1 PROGRAM=dhrystone LINK_TARGET=dhrystone $ make upload BOARD=freedom-e300-hifive1 PROGRAM=dhrystone LINK_TARGET=dhrystone Execution starts, 10000000 runs through Dhrystone Execution ends Final values of the variables used in the benchmark: Int_Glob: 5 should be: 5 Bool_Glob: 1 should be: 1 Ch_1_Glob: A should be: A Ch_2_Glob: B should be: B Arr_1_Glob[8]: 7 should be: 7 Arr_2_Glob[8][7]: 10000010 should be: Number_Of_Runs + 10 Ptr_Glob-> Ptr_Comp: -2147470264 should be: (implementation-dependent) Discr: 0 should be: 0 Enum_Comp: 2 should be: 2 Int_Comp: 17 should be: 17 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Next_Ptr_Glob-> Ptr_Comp: -2147470264 should be: (implementation-dependent), same as above Discr: 0 should be: 0 Enum_Comp: 1 should be: 1 Int_Comp: 18 should be: 18 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Int_1_Loc: 5 should be: 5 Int_2_Loc: 13 should be: 13 Int_3_Loc: 7 should be: 7 Enum_Loc: 1 should be: 1 Str_1_Loc: DHRYSTONE PROGRAM, 1'ST STRING should be: DHRYSTONE PROGRAM, 1'ST STRING Str_2_Loc: DHRYSTONE PROGRAM, 2'ND STRING should be: DHRYSTONE PROGRAM, 2'ND STRING Microseconds for one run through Dhrystone: 1.3 Dhrystones per Second: 714285.6 which is 1.55 DMIPS/MHz at 262 MHz. It's still a bit slower than our current stuff, but I don't remember what was actually in the HiFive1 so I'm not sure what we should be getting. I verified the clock is accurate with a stopwatch. I haven't bothered to go look through the binary, but I think we're about 10 cycles off so it should be managable.
2017-11-16E300 Arty: Don't need to specify the expected ID, just tell it where the ↵mwachs5
SPIFlash controller is. This allows it to work for newer versions of the E300 Arty Dev Kit as well.
2017-07-26changed synch trap entry to match other vectorsDrew Barbier
2017-07-26removed save/restore of x18Drew Barbier
2017-07-26only save/restore caller registers on trap entryDrew Barbier
2017-07-26fixed TRAP_EXIT macro. TRAP_ENTRY/EXIT2 only saves/restores calleeDrew Barbier
registers
2017-07-25too many .aling 2'sDrew Barbier
2017-07-25added vectored interrupt exampleDrew Barbier
2017-06-14Add a SMP examplePalmer Dabbelt
This just prints "hello world" on two cores. It contains an example of how to initialize a multi-core system using IPIs, and a simple spin lock.
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