Age | Commit message (Collapse) | Author | |
---|---|---|---|
2019-04-12 | Add HiFive Unleashed board files | Nathaniel Graff | |
Includes: - design.dts (including nodes for Vera board hardware) - openocd.cfg - settings.mk - README.md Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-04-11 | Add missing PMP nodes | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-31 | Enhance update-target script to also generate settings.mk | Bunnaroath Sou | |
2019-03-26 | Making dhrystone public | Bunnaroath Sou | |
2019-03-26 | Merge pull request #211 from sifive/reglists | Carsten Gosvig | |
Added design.reglist files to all bsp's based on screenlog output | |||
2019-03-25 | Merge pull request #214 from sifive/rc1-breakage | Bunnaroath Sou | |
Update header to include PLIC, CLIC SUBINTERRUPTS | |||
2019-03-25 | Update header to include PLIC, CLIC SUBINTERRUPTS | Bunnaroath Sou | |
2019-03-25 | Add option to not run fixup-dts to update-targets.sh | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-25 | Run scripts/fixup-dts from update-targets.sh | Nathaniel Graff | |
2019-03-21 | Update lds files to exclude itim in .text and PLIC subinterrupts | Bunnaroath Sou | |
2019-03-21 | Added design.reglist files to all bsp's based on screenlog output | cgsfv | |
2019-03-19 | Remove accidental added files | Bunnaroath Sou | |
2019-03-18 | Make rtl target to use ram from dtim, flash from testram | Bunnaroath Sou | |
2019-03-18 | Remove metal.lds which is now metal.default.lds | Bunnaroath Sou | |
2019-03-18 | Add new linker target files for default, ramrodata, scratchpad | Bunnaroath Sou | |
2019-03-18 | Update Arty clock to reflects HW | Bunnaroath Sou | |
2019-03-18 | Add link target options to tools and env | Bunnaroath Sou | |
2019-03-14 | Remove SEGGER_JLINK_OB from settings.mk | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-14 | Fix typos and formatting in settings.mk | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-14 | Create TARGET_TAGS | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-07 | Rename coreip-X to coreip-X-rtl | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-07 | Merge pull request #195 from sifive/remove-legacy | Nathaniel Graff | |
Remove legacy BSPs and Software | |||
2019-03-07 | Update BSPs | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-07 | Fix the metal,entry chosen node in the 2-series Arty targets | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-07 | Remove legacy BSP | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-06 | Merge pull request #194 from sifive/arty-19.2 | Bunnaroath Sou | |
Add E76, S76 arty targets for all 19.2 CoreIPs release | |||
2019-03-06 | Add E76, S76 arty targets for all 19.2 CoreIPs release | Bunnaroath Sou | |
2019-03-06 | Fix HiFive1 Rev B BSP | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-06 | Merge pull request #192 from sifive/arty-19.2 | Bunnaroath Sou | |
Update/add E20, E21, E24 arty targets for all 19.2 CoreIPs release | |||
2019-03-06 | Update/add E20, E21, E24 arty targets for all 19.2 CoreIPs release | Bunnaroath Sou | |
2019-03-05 | Make update script independent of bash | Bunnaroath Sou | |
2019-03-05 | Merge pull request #190 from sifive/coreip-19.2 | Bunnaroath Sou | |
Update/add E31, E34, S51, S54 arty targets for all 19.2 CoreIPs release | |||
2019-03-05 | Merge pull request #188 from sifive/hifive1-revb | Nathaniel Graff | |
Add HiFive1 RevB Support | |||
2019-03-05 | Update/add E31, E34, S51, S54 arty targets for all 19.2 CoreIPs release | Bunnaroath Sou | |
2019-03-05 | Add codemodel settings for new targets | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Generate .hex for HiFive1 RevB | Nathaniel Graff | |
Set COREIP_MEM_WIDTH to cause the build system to generate a .hex file. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Generate BSP for HiFive1 RevB | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Add HiFive1 RevB to update-targets script | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Add HiFive1 Rev B | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Remove PMP reference from hifive1 | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-05 | Add RISCV_CMODEL to settings.mk | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | |||
2019-03-01 | E76, S76 pmp not working, floating compiler/linker not working | Bunnaroath Sou | |
2019-03-01 | Add CoreIPs E76, S76 for 19.2 rel | Bunnaroath Sou | |
2019-03-01 | Add CoreIPs E34, S54 and update S51 for 19.2 rel | Bunnaroath Sou | |
2019-03-01 | Update CoreIPs E20, E21, E31 and E24 for 19.2 rel | Bunnaroath Sou | |
2019-02-27 | Spellcheck correction readme for bsp targets for E20, E21, E31/Arty, S51/Arty | Bunnaroath Sou | |
2019-02-26 | Add corrected formatting for bullet lists | Kevin Mills | |
Markdown bullet lists should: (1) have a blank line before and after the list; (2) start each list item at the beginning of the line (no leading white-space) The markdown processor in Freedom Studio enforces these standards and does not render correctly otherwise. | |||
2019-02-25 | Adding readme to bsp targets for E20, E21, E31/Arty, S51/Arty | Bunnaroath Sou | |
2019-02-22 | Adding Standard CoreIPs forE20, E21 support | Bunnaroath Sou | |
2019-02-15 | Put back CLIC_SUBINTERRUPTS outside of MACHINE_MACROS | Nathaniel Graff | |
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> |