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AgeCommit message (Expand)Author
2019-03-26Making dhrystone publicBunnaroath Sou
2019-03-26Merge pull request #211 from sifive/reglistsCarsten Gosvig
2019-03-25Merge pull request #214 from sifive/rc1-breakageBunnaroath Sou
2019-03-25Update header to include PLIC, CLIC SUBINTERRUPTSBunnaroath Sou
2019-03-25Add option to not run fixup-dts to update-targets.shNathaniel Graff
2019-03-25Run scripts/fixup-dts from update-targets.shNathaniel Graff
2019-03-21Update lds files to exclude itim in .text and PLIC subinterruptsBunnaroath Sou
2019-03-21Added design.reglist files to all bsp's based on screenlog outputcgsfv
2019-03-19Remove accidental added filesBunnaroath Sou
2019-03-18Make rtl target to use ram from dtim, flash from testramBunnaroath Sou
2019-03-18Remove metal.lds which is now metal.default.ldsBunnaroath Sou
2019-03-18Add new linker target files for default, ramrodata, scratchpadBunnaroath Sou
2019-03-18Update Arty clock to reflects HWBunnaroath Sou
2019-03-18Add link target options to tools and envBunnaroath Sou
2019-03-14Remove SEGGER_JLINK_OB from settings.mkNathaniel Graff
2019-03-14Fix typos and formatting in settings.mkNathaniel Graff
2019-03-14Create TARGET_TAGSNathaniel Graff
2019-03-07Rename coreip-X to coreip-X-rtlNathaniel Graff
2019-03-07Merge pull request #195 from sifive/remove-legacyNathaniel Graff
2019-03-07Update BSPsNathaniel Graff
2019-03-07Fix the metal,entry chosen node in the 2-series Arty targetsNathaniel Graff
2019-03-07Remove legacy BSPNathaniel Graff
2019-03-06Merge pull request #194 from sifive/arty-19.2Bunnaroath Sou
2019-03-06Add E76, S76 arty targets for all 19.2 CoreIPs releaseBunnaroath Sou
2019-03-06Fix HiFive1 Rev B BSPNathaniel Graff
2019-03-06Merge pull request #192 from sifive/arty-19.2Bunnaroath Sou
2019-03-06Update/add E20, E21, E24 arty targets for all 19.2 CoreIPs releaseBunnaroath Sou
2019-03-05Make update script independent of bashBunnaroath Sou
2019-03-05Merge pull request #190 from sifive/coreip-19.2Bunnaroath Sou
2019-03-05Merge pull request #188 from sifive/hifive1-revbNathaniel Graff
2019-03-05Update/add E31, E34, S51, S54 arty targets for all 19.2 CoreIPs releaseBunnaroath Sou
2019-03-05Add codemodel settings for new targetsNathaniel Graff
2019-03-05Generate .hex for HiFive1 RevBNathaniel Graff
2019-03-05Generate BSP for HiFive1 RevBNathaniel Graff
2019-03-05Add HiFive1 RevB to update-targets scriptNathaniel Graff
2019-03-05Add HiFive1 Rev BNathaniel Graff
2019-03-05Remove PMP reference from hifive1Nathaniel Graff
2019-03-05Add RISCV_CMODEL to settings.mkNathaniel Graff
2019-03-01E76, S76 pmp not working, floating compiler/linker not workingBunnaroath Sou
2019-03-01Add CoreIPs E76, S76 for 19.2 relBunnaroath Sou
2019-03-01Add CoreIPs E34, S54 and update S51 for 19.2 relBunnaroath Sou
2019-03-01Update CoreIPs E20, E21, E31 and E24 for 19.2 relBunnaroath Sou
2019-02-27Spellcheck correction readme for bsp targets for E20, E21, E31/Arty, S51/ArtyBunnaroath Sou
2019-02-26Add corrected formatting for bullet listsKevin Mills
2019-02-25Adding readme to bsp targets for E20, E21, E31/Arty, S51/ArtyBunnaroath Sou
2019-02-22Adding Standard CoreIPs forE20, E21 supportBunnaroath Sou
2019-02-15Put back CLIC_SUBINTERRUPTS outside of MACHINE_MACROSNathaniel Graff
2019-02-14Update BSPsNathaniel Graff
2019-02-14Add clocking and pinmux to the SPI on hifive1Nathaniel Graff
2019-02-11Update BSPs for hw-exec-breakpointBunnaroath Sou
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