freedom-e-sdk - my bad beginner RISC-V assembly LED blinking code.

Age	Commit message (Collapse)	Author
2017-06-10	Just lump all the RAM sections together	Palmer Dabbelt
	Since our loader doesn't support multiple sections anyway, there's really no reason to have all these sections floating around. They're causing trouble due to misalignment so it's easiest to just group them together so we can properly enforce alignment.
2017-06-09	Use the correct global pointer symbol	Palmer Dabbelt

2017-06-09	Don't use .section\nALIGN, reorder sdata and srodata	Palmer Dabbelt
	I'm hoping this will make everything more likely to align. We can't use the other mechanism because our loader is lazy and assumes all the sections are contiguous.
2017-06-09	Don't call _{init,fini} in start.S, we call libc_{init,fini}_arry	Palmer Dabbelt

2017-06-09	Print the exit codes as unsigned numbers	Palmer Dabbelt
	Without this I get a message that looks like Program has exited with code 0x/0000008 which doesn't make any sense. This prints Progam has exited with code:0x80000008
2017-06-08	Specify alignment on the .sdata and .srodata sections	Palmer Dabbelt
	Without these alignment directives the sections are only required to be aligned on word-sized boundries, but we sometimes require double-word alignment. This allows the linker to sanely emit these sections.
2017-05-08	revert back	Drew Barbier

2017-05-07	changed write_hex to new def	Drew Barbier

2017-05-07	Merge remote-tracking branch 'origin/master' into freedom-studio	Drew Barbier

2017-05-05	coreplex-e51: Correct width of MCAUSE	mwachs5

2017-05-05	write_hex: allow for different size error codes	Megan Wachs

2017-05-05	coreplexip-e51-arty: MCAUSE is XLEN-bits wide.	Megan Wachs

2017-05-05	updated demo_gpio	Drew Barbier

2017-05-04	Update SDK For E31/E51 Coreplex IP Evaluation	Megan Wachs

2017-02-02	prci: Clean up the hfrosc-driven-pll FPU testing.	Megan Wachs

2017-02-02	prci: Simplify the targeted f_cpu function by measuring HFROSC frequency ↵	Megan Wachs
	first, then using it as the PLL source. This is also safer as it is less risk of using PLL out of its range.
2017-02-01	PRCI: This doesn't exist on the Arty and potentially other devices, so ↵	Megan Wachs
	exclude it if there is not PRCI_BASE_ADDR on the system.
2017-02-01	PRCI: add control for the target CPU frequency (to allow a minimum, maximum, ↵	Megan Wachs
	or closest match)
2017-02-01	Additional PRCI driver support. Make the code usable by C++ programs as well.	Megan Wachs

2017-01-31	add a 'driver' common PRCI functions.	Megan Wachs

2017-01-31	Move plic_driver code to a common location.	Megan Wachs

2017-01-24	Use consistent OpenOCD config for Arty and HiFive1	Megan Wachs

2017-01-11	reduce code duplication and apply the same flags to Arty board	mwachs5

2017-01-11	Add the 'bootloader' which ships on HiFive1 Boards.	mwachs5

2017-01-05	Merge pull request #38 from sifive/benchmarking	Andrew Waterman
	Benchmarking
2017-01-03	Regularize timing code	Andrew Waterman
	Provide get_timer_value() and get_timer_freq() and use them. On Arty, they use mcycle and the known-fixed core frequency, whereas on HiFive1 they use mtime and the known-fixed mtime frequency.
2017-01-03	Improve HiFive1 CPU frequency measurement routine	Andrew Waterman
	- Warm up I$ first. - Correct for integer division truncation error. - Wait for an RTC clock edge before starting the timing loop, which removes an error proportional to the number of loop iterations, allowing us to run for far less time.
2017-01-03	Keep mtvec 4-byte aligned	Andrew Waterman

2016-12-24	Bump OpenOCD to pick up corrected malloc in Flashing code. Add 'verify' to ↵	mwachs5
	ensure Flash is loaded correctly.
2016-12-20	Separate .text.unlikely and .text.startup from .text	Andrew Waterman
	This improves the instruction stream's spatial locality.
2016-12-20	Avoid jal to weak symbols	Andrew Waterman
	The symbol may be overridden and end up out of range of JAL.
2016-12-20	Pass argc and argv to main()	Andrew Waterman

2016-12-17	Merge pull request #29 from sifive/remove_srst_delay	Megan Wachs
	Remove unncessary srst delay when connecting with OpenOCD to HiFive1
2016-12-17	Remove unncessary srst delay when connecting with OpenOCD to HiFive1	Megan Wachs

2016-12-17	Correct init/fini functions for Arty Dev Kit	Megan Wachs

2016-12-14	Move start.S and entry.S to a common directory	Albert Ou

2016-12-14	Merge pull request #25 from sifive/add_srst_option	Megan Wachs
	hifive1: Update OpenOCD Config script to optionally allow pulsing SRST
2016-12-14	hifive1: Update OpenOCD Config script to optionally allow pulsing SRST	Megan Wachs

2016-12-14	Refactor libc stubs into libwrap	Albert Ou
	The --wrap feature of GNU ld supports a cleaner framework for linking in alternative implementations of libc functions without cpp hacks. Place wrappers in separate object files to reduce static code size.
2016-12-13	Use more standard form of _init()	Megan Wachs

2016-12-13	Use cleaner .S files	Megan Wachs

2016-12-11	Add some missing LICENSE headers.	Megan Wachs

2016-12-11	platform: add more defines which are generally needed	Megan Wachs

2016-12-09	demo_gpio: Make the demo more interesting with interrupts that actually do ↵	Megan Wachs
	things.
2016-12-09	demo_gpio: Correct trap_entry handling to enable timer/ext interrupts	Megan Wachs

2016-12-07	Merge pull request #17 from sifive/enable-fpu	Scott Johnson
	Enable FPU in MSTATUS CSR during init
2016-12-07	Initialize FPU properly	Scott Johnson
	* Only attempts if FPU actually implemented in design * Also initializes rounding modes, which are undefined at reset
2016-12-07	Place .init_array/.fini_array sections in flash instead of RAM	Albert Ou
	This appears to resolve the issue of .sdata being assigned an incorrect LMA (ld warning "section `.sdata' can't be allocated in segment 1").
2016-12-07	Deduplicate freedom-e300-arty files	Albert Ou

2016-12-06	Enable FPU in MSTATUS CSR during init	Scott Johnson
	This way, chips with FPU can run FPU instructions without taking exceptions. I've confirmed that dhrystone still runs successfully even on chips with no FPU.