From 3cd57c399b080cc3eee813c339258fbb287bf95e Mon Sep 17 00:00:00 2001
From: Bunnaroath Sou <bsou@sifive.com>
Date: Fri, 1 Mar 2019 23:24:36 -0800
Subject: E76, S76 pmp not working, floating compiler/linker not working
---
bsp/coreip-e24/settings.mk | 4 ++--
bsp/coreip-e34/settings.mk | 4 ++--
bsp/coreip-e76/design.dts | 4 ----
bsp/coreip-e76/metal.h | 11 -----------
bsp/coreip-e76/settings.mk | 4 ++--
bsp/coreip-s54/settings.mk | 4 ++--
bsp/coreip-s76/design.dts | 4 ----
bsp/coreip-s76/metal.h | 11 -----------
bsp/coreip-s76/settings.mk | 4 ++--
9 files changed, 10 insertions(+), 40 deletions(-)
diff --git a/bsp/coreip-e24/settings.mk b/bsp/coreip-e24/settings.mk
index e89e1ee..0c818ec 100644
--- a/bsp/coreip-e24/settings.mk
+++ b/bsp/coreip-e24/settings.mk
@@ -1,5 +1,5 @@
#write_config_file
-RISCV_ARCH=rv32imafc
-RISCV_ABI=ilp32f
+RISCV_ARCH=rv32imac
+RISCV_ABI=ilp32
COREIP_MEM_WIDTH=32
diff --git a/bsp/coreip-e34/settings.mk b/bsp/coreip-e34/settings.mk
index e89e1ee..0c818ec 100644
--- a/bsp/coreip-e34/settings.mk
+++ b/bsp/coreip-e34/settings.mk
@@ -1,5 +1,5 @@
#write_config_file
-RISCV_ARCH=rv32imafc
-RISCV_ABI=ilp32f
+RISCV_ARCH=rv32imac
+RISCV_ABI=ilp32
COREIP_MEM_WIDTH=32
diff --git a/bsp/coreip-e76/design.dts b/bsp/coreip-e76/design.dts
index 49bd3de..6d94a9b 100644
--- a/bsp/coreip-e76/design.dts
+++ b/bsp/coreip-e76/design.dts
@@ -40,10 +40,6 @@
#size-cells = <1>;
compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus";
ranges;
- pmp: pmp@0 {
- compatible = "riscv,pmp";
- regions = <8>;
- };
L11: axi4-periph-port@20000000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/bsp/coreip-e76/metal.h b/bsp/coreip-e76/metal.h
index f66710e..22f8073 100644
--- a/bsp/coreip-e76/metal.h
+++ b/bsp/coreip-e76/metal.h
@@ -56,9 +56,6 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller;
asm (".weak __metal_dt_interrupt_controller_c000000");
struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000;
-asm (".weak __metal_dt_pmp_0");
-struct metal_pmp __metal_dt_pmp_0;
-
/* From global_external_interrupts */
asm (".weak __metal_dt_global_external_interrupts");
struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts;
@@ -112,11 +109,6 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
.interrupt_controller = 1,
};
-/* From pmp@0 */
-struct metal_pmp __metal_dt_pmp_0 = {
- .num_regions = 8UL,
-};
-
/* From global_external_interrupts */
struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = {
.vtable = &__metal_driver_vtable_sifive_global_external_interrupts0,
@@ -289,9 +281,6 @@ struct __metal_driver_cpu *__metal_cpu_table[] = {
#define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
-/* From pmp@0 */
-#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0)
-
/* From global_external_interrupts */
#define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc)
diff --git a/bsp/coreip-e76/settings.mk b/bsp/coreip-e76/settings.mk
index b05997c..3dcc8c7 100644
--- a/bsp/coreip-e76/settings.mk
+++ b/bsp/coreip-e76/settings.mk
@@ -1,5 +1,5 @@
#write_config_file
-RISCV_ARCH=rv32imafc
-RISCV_ABI=ilp32f
+RISCV_ARCH=rv32imac
+RISCV_ABI=ilp32
COREIP_MEM_WIDTH=64
diff --git a/bsp/coreip-s54/settings.mk b/bsp/coreip-s54/settings.mk
index 3d1ed75..553417e 100644
--- a/bsp/coreip-s54/settings.mk
+++ b/bsp/coreip-s54/settings.mk
@@ -1,3 +1,3 @@
-RISCV_ARCH=rv64imafdc
-RISCV_ABI=lp64d
+RISCV_ARCH=rv64imac
+RISCV_ABI=lp64
COREIP_MEM_WIDTH=64
diff --git a/bsp/coreip-s76/design.dts b/bsp/coreip-s76/design.dts
index febe87f..f27053d 100644
--- a/bsp/coreip-s76/design.dts
+++ b/bsp/coreip-s76/design.dts
@@ -40,10 +40,6 @@
#size-cells = <2>;
compatible = "SiFive,FS760G-soc", "fs710-soc", "sifive-soc", "simple-bus";
ranges;
- pmp: pmp@0 {
- compatible = "riscv,pmp";
- regions = <8>;
- };
L11: axi4-periph-port@20000000 {
#address-cells = <2>;
#size-cells = <2>;
diff --git a/bsp/coreip-s76/metal.h b/bsp/coreip-s76/metal.h
index b6a5b15..c4a874b 100644
--- a/bsp/coreip-s76/metal.h
+++ b/bsp/coreip-s76/metal.h
@@ -56,9 +56,6 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller;
asm (".weak __metal_dt_interrupt_controller_c000000");
struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000;
-asm (".weak __metal_dt_pmp_0");
-struct metal_pmp __metal_dt_pmp_0;
-
/* From global_external_interrupts */
asm (".weak __metal_dt_global_external_interrupts");
struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts;
@@ -112,11 +109,6 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
.interrupt_controller = 1,
};
-/* From pmp@0 */
-struct metal_pmp __metal_dt_pmp_0 = {
- .num_regions = 8UL,
-};
-
/* From global_external_interrupts */
struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = {
.vtable = &__metal_driver_vtable_sifive_global_external_interrupts0,
@@ -289,9 +281,6 @@ struct __metal_driver_cpu *__metal_cpu_table[] = {
#define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
-/* From pmp@0 */
-#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0)
-
/* From global_external_interrupts */
#define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc)
diff --git a/bsp/coreip-s76/settings.mk b/bsp/coreip-s76/settings.mk
index 3d1ed75..553417e 100644
--- a/bsp/coreip-s76/settings.mk
+++ b/bsp/coreip-s76/settings.mk
@@ -1,3 +1,3 @@
-RISCV_ARCH=rv64imafdc
-RISCV_ABI=lp64d
+RISCV_ARCH=rv64imac
+RISCV_ABI=lp64
COREIP_MEM_WIDTH=64
--
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