From abbf5a2ef4b46218a1b24ef6afd6cf7b35a87e55 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 00:40:06 -0500
Subject: e2 and clic start

---
 bsp/drivers/clic/clic_driver.c             |  90 ++++++++++++++++
 bsp/drivers/clic/clic_driver.h             |  36 +++++++
 bsp/env/common.mk                          |   2 +-
 bsp/env/coreip-e2-arty/init.c              |  95 +++++++++++++++++
 bsp/env/coreip-e2-arty/openocd.cfg         |   1 +
 bsp/env/coreip-e2-arty/platform.h          |  92 +++++++++++++++++
 bsp/env/coreip-e2-arty/settings.mk         |   1 +
 bsp/env/coreip-e2-arty/tim-split.lds       | 157 ++++++++++++++++++++++++++++
 bsp/env/coreip-e2-arty/tim.lds             | 161 +++++++++++++++++++++++++++++
 bsp/env/coreplexip-e21-arty/dhrystone.lds  |   1 -
 bsp/env/coreplexip-e21-arty/flash.lds      |   1 -
 bsp/env/coreplexip-e21-arty/init.c         |   1 -
 bsp/env/coreplexip-e21-arty/openocd.cfg    |   1 -
 bsp/env/coreplexip-e21-arty/platform.h     |   1 -
 bsp/env/coreplexip-e21-arty/scratchpad.lds |   1 -
 bsp/env/coreplexip-e21-arty/settings.mk    |   1 -
 bsp/include/sifive/devices/clic.h          |  29 +-----
 software/clic_vectored/Makefile            |  10 ++
 software/clic_vectored/clic_vectored       | Bin 0 -> 73836 bytes
 software/clic_vectored/clic_vectored.c     |  95 +++++++++++++++++
 20 files changed, 744 insertions(+), 32 deletions(-)
 create mode 100644 bsp/drivers/clic/clic_driver.c
 create mode 100644 bsp/drivers/clic/clic_driver.h
 create mode 100644 bsp/env/coreip-e2-arty/init.c
 create mode 120000 bsp/env/coreip-e2-arty/openocd.cfg
 create mode 100644 bsp/env/coreip-e2-arty/platform.h
 create mode 120000 bsp/env/coreip-e2-arty/settings.mk
 create mode 100644 bsp/env/coreip-e2-arty/tim-split.lds
 create mode 100644 bsp/env/coreip-e2-arty/tim.lds
 delete mode 120000 bsp/env/coreplexip-e21-arty/dhrystone.lds
 delete mode 120000 bsp/env/coreplexip-e21-arty/flash.lds
 delete mode 120000 bsp/env/coreplexip-e21-arty/init.c
 delete mode 120000 bsp/env/coreplexip-e21-arty/openocd.cfg
 delete mode 120000 bsp/env/coreplexip-e21-arty/platform.h
 delete mode 120000 bsp/env/coreplexip-e21-arty/scratchpad.lds
 delete mode 120000 bsp/env/coreplexip-e21-arty/settings.mk
 create mode 100644 software/clic_vectored/Makefile
 create mode 100755 software/clic_vectored/clic_vectored
 create mode 100644 software/clic_vectored/clic_vectored.c

diff --git a/bsp/drivers/clic/clic_driver.c b/bsp/drivers/clic/clic_driver.c
new file mode 100644
index 0000000..8acf4d2
--- /dev/null
+++ b/bsp/drivers/clic/clic_driver.c
@@ -0,0 +1,90 @@
+// See LICENSE for license details.
+
+#include "sifive/devices/clic.h"
+#include "clic/clic_driver.h"
+#include "platform.h"
+#include "encoding.h"
+#include <string.h>
+
+
+void volatile_memzero(uint8_t * base, unsigned int size) {
+  volatile uint8_t * ptr;
+  for (ptr = base; ptr < (base + size); ptr++){
+    *ptr = 0;
+  }
+}
+
+// Note that there are no assertions or bounds checking on these
+// parameter values.
+void clic_init (
+                clic_instance_t * this_clic,
+                uintptr_t hart_addr,
+                interrupt_function_ptr_t* vect_table,
+                interrupt_function_ptr_t default_handler,
+                uint32_t num_irq,
+                uint32_t num_config_bits
+                )
+{
+  this_clic->hart_addr=  hart_addr;
+  this_clic->vect_table= vect_table;
+  this_clic->num_config_bits= num_config_bits;
+
+  //initialize vector table
+  for(int i=0;i++;i<num_irq)  {
+    this_clic->vect_table[i] = default_handler;
+  }
+
+  //set base vectors
+  write_csr(mtvt, vect_table);
+
+
+  //clear all interrupt enables and pending
+  volatile_memzero((uint8_t*)(this_clic->hart_addr+CLIC_INTIE), num_irq);
+  volatile_memzero((uint8_t*)(this_clic->hart_addr+CLIC_INTIP), num_irq);
+
+  //clear nlbits and nvbits; all interrupts trap to level 15
+  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG)=0;
+
+}
+
+void clic_install_handler (clic_instance_t * this_clic, uint32_t source, interrupt_function_ptr_t handler) {
+    this_clic->vect_table[source] = handler;
+}
+
+void clic_enable_interrupt (clic_instance_t * this_clic, uint32_t source) {
+    *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIE+source) = 1;
+}
+
+void clic_disable_interrupt (clic_instance_t * this_clic, uint32_t source){
+  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIE+source) = 0;
+}
+
+void clic_set_pending(clic_instance_t * this_clic, uint32_t source){
+  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIP+source) = 1;
+}
+
+void clic_clear_pending(clic_instance_t * this_clic, uint32_t source){
+  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIP+source) = 0;
+}
+
+//should return max level set. if level set doesn't match requested, check nlbits
+void clic_set_level (clic_instance_t * this_clic, uint32_t source, uint32_t level){
+  
+}
+
+void clic_get_level (clic_instance_t * this_clic, uint32_t source, uint32_t level){
+
+}
+
+void clic_set_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority){
+
+}
+
+void clic_get_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority){
+
+
+}
+
+
+
+
diff --git a/bsp/drivers/clic/clic_driver.h b/bsp/drivers/clic/clic_driver.h
new file mode 100644
index 0000000..6e8cf0b
--- /dev/null
+++ b/bsp/drivers/clic/clic_driver.h
@@ -0,0 +1,36 @@
+// See LICENSE file for licence details
+
+#ifndef PLIC_DRIVER_H
+#define PLIC_DRIVER_H
+
+
+__BEGIN_DECLS
+
+#include "platform.h"
+
+typedef void (*interrupt_function_ptr_t) (void);
+
+typedef struct __clic_instance_t
+{
+  uintptr_t hart_addr;
+  interrupt_function_ptr_t* vect_table;
+  uint32_t num_config_bits;
+  uint32_t num_sources;  
+} clic_instance_t;
+
+// Note that there are no assertions or bounds checking on these
+// parameter values.
+void clic_init (clic_instance_t * this_clic, uintptr_t hart_addr, interrupt_function_ptr_t* vect_table, interrupt_function_ptr_t default_handler, uint32_t num_irq,uint32_t num_config_bits);
+void clic_install_handler (clic_instance_t * this_clic, uint32_t source, interrupt_function_ptr_t handler);
+void clic_enable_interrupt (clic_instance_t * this_clic, uint32_t source);
+void clic_disable_interrupt (clic_instance_t * this_clic, uint32_t source);
+void clic_set_pending(clic_instance_t * this_clic, uint32_t source);
+void clic_clear_pending(clic_instance_t * this_clic, uint32_t source);
+void clic_set_level (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
+void clic_get_level (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
+void clic_set_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
+void clic_get_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
+
+__END_DECLS
+
+#endif
diff --git a/bsp/env/common.mk b/bsp/env/common.mk
index 4566b80..74939a5 100644
--- a/bsp/env/common.mk
+++ b/bsp/env/common.mk
@@ -25,7 +25,7 @@ INCLUDES += -I$(PLATFORM_DIR)
 TOOL_DIR = $(BSP_BASE)/../toolchain/bin
 
 LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles
-LDFLAGS += -L$(ENV_DIR)
+LDFLAGS += -L$(ENV_DIR) --specs=nano.specs
 
 ASM_OBJS := $(ASM_SRCS:.S=.o)
 C_OBJS := $(C_SRCS:.c=.o)
diff --git a/bsp/env/coreip-e2-arty/init.c b/bsp/env/coreip-e2-arty/init.c
new file mode 100644
index 0000000..aaf213c
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/init.c
@@ -0,0 +1,95 @@
+//See LICENSE for license details.
+#include <stdint.h>
+#include <stdio.h>
+#include <unistd.h>
+
+#include "platform.h"
+#include "encoding.h"
+
+#define CPU_FREQ 32000000
+#define XSTR(x) #x
+#define STR(x) XSTR(x)
+
+extern int main(int argc, char** argv);
+
+unsigned long get_cpu_freq()
+{
+  return CPU_FREQ;
+}
+
+unsigned long get_timer_freq()
+{
+  return get_cpu_freq();
+}
+
+uint64_t get_timer_value()
+{
+#if __riscv_xlen == 32
+  while (1) {
+    uint32_t hi = read_csr(mcycleh);
+    uint32_t lo = read_csr(mcycle);
+    if (hi == read_csr(mcycleh))
+      return ((uint64_t)hi << 32) | lo;
+  }
+#else
+  return read_csr(mcycle);
+#endif
+}
+
+static void uart_init(size_t baud_rate)
+{
+  UART0_REG(UART_REG_DIV) = (get_cpu_freq() ) / baud_rate - 1;
+  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
+}
+
+
+typedef void (*interrupt_function_ptr_t) (void);
+interrupt_function_ptr_t localISR[CLIC_NUM_INTERRUPTS] __attribute__((aligned(64)));
+
+void trap_entry(void) __attribute__((interrupt("SiFive-CLIC-preemptible"), aligned(64)));
+void trap_entry(void)
+{
+  unsigned long mcause = read_csr(mcause);
+  unsigned long mepc = read_csr(mepc);
+  if (mcause & MCAUSE_INT)  {
+    localISR[mcause & MCAUSE_CAUSE] ();
+  } else {
+    while(1);
+  }
+}
+
+#ifdef CLIC_DIRECT
+#else
+void default_handler(void)__attribute__((interrupt("SiFive-CLIC-preemptible")));;
+#endif
+void default_handler(void)
+{
+  puts("default handler\n");
+  while(1);
+}
+
+void _init()
+{
+#ifndef NO_INIT
+  uart_init(115200);
+
+  puts("core freq at " STR(CPU_FREQ) " Hz\n");
+
+//initialize vector table
+  for(int i=0;i++;i<CLIC_NUM_INTERRUPTS)  {
+    localISR[i] = &default_handler;
+  }
+  write_csr(mtvt, localISR);
+
+#ifdef CLIC_DIRECT
+  write_csr(mtvec, ((unsigned long)&trap_entry | MTVEC_CLIC));
+#else
+  write_csr(mtvec, ((unsigned long)&trap_entry | MTVEC_CLIC_VECT));
+#endif
+
+#endif
+}
+
+void _fini()
+{
+}
diff --git a/bsp/env/coreip-e2-arty/openocd.cfg b/bsp/env/coreip-e2-arty/openocd.cfg
new file mode 120000
index 0000000..2f4de8d
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/openocd.cfg
@@ -0,0 +1 @@
+../coreplexip-e31-arty/openocd.cfg
\ No newline at end of file
diff --git a/bsp/env/coreip-e2-arty/platform.h b/bsp/env/coreip-e2-arty/platform.h
new file mode 100644
index 0000000..8ee0a83
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/platform.h
@@ -0,0 +1,92 @@
+// See LICENSE for license details.
+
+#ifndef _SIFIVE_PLATFORM_H
+#define _SIFIVE_PLATFORM_H
+
+// Some things missing from the official encoding.h
+
+#if __riscv_xlen == 32
+#define MCAUSE_INT         0x80000000UL
+#define MCAUSE_CAUSE       0x000003FFUL
+#else
+#define MCAUSE_INT         0x8000000000000000UL
+#define MCAUSE_CAUSE       0x00000000000003FFUL
+#endif
+
+#define MTVEC_DIRECT       0X00
+#define MTVEC_VECTORED     0x01
+#define MTVEC_CLIC         0x02
+#define MTVEC_CLIC_VECT    0X03
+
+
+#include "sifive/const.h"
+#include "sifive/devices/gpio.h"
+#include "sifive/devices/clic.h"
+#include "sifive/devices/pwm.h"
+#include "sifive/devices/spi.h"
+#include "sifive/devices/uart.h"
+
+/****************************************************************************
+ * Platform definitions
+ *****************************************************************************/
+
+// Memory map
+#define CLINT_CTRL_ADDR _AC(0x02000000,UL)
+#define CLIC_HART0_ADDR _AC(0x02800000, UL)
+#define GPIO_CTRL_ADDR _AC(0x20002000,UL)
+#define PWM0_CTRL_ADDR _AC(0x20005000,UL)
+#define RAM_MEM_ADDR _AC(0x80000000,UL)
+#define RAM_MEM_SIZE _AC(0x10000,UL)
+#define SPI0_CTRL_ADDR _AC(0x20004000,UL)
+#define SPI0_MEM_ADDR _AC(0x40000000,UL)
+#define SPI0_MEM_SIZE _AC(0x20000000,UL)
+#define TESTBENCH_MEM_ADDR _AC(0x20000000,UL)
+#define TESTBENCH_MEM_SIZE _AC(0x10000000,UL)
+//#define TRAPVEC_TABLE_CTRL_ADDR _AC(0x00001010,UL)
+#define UART0_CTRL_ADDR _AC(0x20000000,UL)
+
+// IOF masks
+
+// Interrupt numbers
+#define RESERVED_INT_BASE 0
+#define UART0_INT_BASE 1
+#define EXTERNAL_INT_BASE 2
+#define SPI0_INT_BASE 6
+#define GPIO_INT_BASE 7
+#define PWM0_INT_BASE 23
+
+// Helper functions
+#define _REG64(p, i) (*(volatile uint64_t *)((p) + (i)))
+#define _REG32(p, i) (*(volatile uint32_t *)((p) + (i)))
+#define _REG16(p, i) (*(volatile uint16_t *)((p) + (i)))
+#define SET_BITS(reg, mask, value) if ((value) == 0) { (reg) &= ~(mask); } else { (reg) |= (mask); }
+#define CLINT_REG(offset) _REG32(CLINT_CTRL_ADDR, offset)
+#define CLIC0_REG(offset) _REG32(CLIC_HART0_ADDR, offset)
+#define CLIC0_REG8(offset)   (*(volatile uint8_t *)((CLIC_HART0_ADDR) + (offset)))
+#define GPIO_REG(offset) _REG32(GPIO_CTRL_ADDR, offset)
+#define PWM0_REG(offset) _REG32(PWM0_CTRL_ADDR, offset)
+#define SPI0_REG(offset) _REG32(SPI0_CTRL_ADDR, offset)
+#define UART0_REG(offset) _REG32(UART0_CTRL_ADDR, offset)
+#define CLINT_REG(offset) _REG32(CLINT_CTRL_ADDR, offset)
+#define CLIC0_REG64(offset) _REG64(CLIC_HART0_ADDR, offset)
+#define GPIO_REG64(offset) _REG64(GPIO_CTRL_ADDR, offset)
+#define PWM0_REG64(offset) _REG64(PWM0_CTRL_ADDR, offset)
+#define SPI0_REG64(offset) _REG64(SPI0_CTRL_ADDR, offset)
+#define UART0_REG64(offset) _REG64(UART0_CTRL_ADDR, offset)
+
+// Misc
+
+#define NUM_GPIO 16
+
+#define CLIC_NUM_INTERRUPTS 28 + 16
+#define CLIC_NUM_CONFIG_BITS 4 //2 for E20
+
+#define HAS_BOARD_BUTTONS
+
+#include "coreplexip-arty.h"
+
+unsigned long get_cpu_freq(void);
+unsigned long get_timer_freq(void);
+uint64_t get_timer_value(void);
+
+#endif /* _SIFIVE_PLATFORM_H */
diff --git a/bsp/env/coreip-e2-arty/settings.mk b/bsp/env/coreip-e2-arty/settings.mk
new file mode 120000
index 0000000..2b2a962
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/settings.mk
@@ -0,0 +1 @@
+../coreplexip-e31-arty/settings.mk
\ No newline at end of file
diff --git a/bsp/env/coreip-e2-arty/tim-split.lds b/bsp/env/coreip-e2-arty/tim-split.lds
new file mode 100644
index 0000000..eab4bd3
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/tim-split.lds
@@ -0,0 +1,157 @@
+OUTPUT_ARCH( "riscv" )
+
+ENTRY( _start )
+
+MEMORY
+{
+  flash (rxai!w) : ORIGIN = 0x80008000, LENGTH = 32K
+  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 32K
+}
+
+PHDRS
+{
+  flash PT_LOAD;
+  ram_init PT_LOAD;
+  ram PT_NULL;
+}
+
+SECTIONS
+{
+  __stack_size = DEFINED(__stack_size) ? __stack_size : 1K;
+
+  .init           :
+  {
+    KEEP (*(SORT_NONE(.init)))
+  } >flash AT>flash :flash
+
+  .text           :
+  {
+    *(.text.unlikely .text.unlikely.*)
+    *(.text.startup .text.startup.*)
+    *(.text .text.*)
+    *(.gnu.linkonce.t.*)
+  } >flash AT>flash :flash
+
+  .fini           :
+  {
+    KEEP (*(SORT_NONE(.fini)))
+  } >flash AT>flash :flash
+
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+
+  . = ALIGN(4);
+
+  .preinit_array  :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >flash AT>flash :flash
+
+  .init_array     :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >flash AT>flash :flash
+
+  .fini_array     :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >flash AT>flash :flash
+
+  .ctors          :
+  {
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  } >flash AT>flash :flash
+
+  .dtors          :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  } >flash AT>flash :flash
+
+  .lalign         :
+  {
+    . = ALIGN(4);
+    PROVIDE( _data_lma = . );
+  } >flash AT>flash :flash
+
+  .dalign         :
+  {
+    . = ALIGN(4);
+    PROVIDE( _data = . );
+  } >ram AT>flash :ram_init
+
+  .data          :
+  {
+    *(.rdata)
+    *(.rodata .rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.data .data.*)
+    *(.gnu.linkonce.d.*)
+    . = ALIGN(8);
+    PROVIDE( __global_pointer$ = . + 0x800 );
+    *(.sdata .sdata.*)
+    *(.gnu.linkonce.s.*)
+    . = ALIGN(8);
+    *(.srodata.cst16)
+    *(.srodata.cst8)
+    *(.srodata.cst4)
+    *(.srodata.cst2)
+    *(.srodata .srodata.*)
+  } >ram AT>flash :ram_init
+
+  . = ALIGN(4);
+  PROVIDE( _edata = . );
+  PROVIDE( edata = . );
+
+  PROVIDE( _fbss = . );
+  PROVIDE( __bss_start = . );
+  .bss            :
+  {
+    *(.sbss*)
+    *(.gnu.linkonce.sb.*)
+    *(.bss .bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(4);
+  } >ram AT>ram :ram
+
+  . = ALIGN(8);
+  PROVIDE( _end = . );
+  PROVIDE( end = . );
+
+  .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
+  {
+    PROVIDE( _heap_end = . );
+    . = __stack_size;
+    PROVIDE( _sp = . );
+  } >ram AT>ram :ram
+}
diff --git a/bsp/env/coreip-e2-arty/tim.lds b/bsp/env/coreip-e2-arty/tim.lds
new file mode 100644
index 0000000..7dfb36b
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/tim.lds
@@ -0,0 +1,161 @@
+OUTPUT_ARCH( "riscv" )
+
+ENTRY( _start )
+
+MEMORY
+{
+  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 64K
+}
+
+PHDRS
+{
+  ram PT_LOAD;
+  ram_init PT_LOAD;
+  ram PT_NULL;
+}
+
+SECTIONS
+{
+  __stack_size = DEFINED(__stack_size) ? __stack_size : 1K;
+
+  .init           :
+  {
+    KEEP (*(SORT_NONE(.init)))
+  } >ram AT>ram :ram
+
+  .text           :
+  {
+    *(.text.unlikely .text.unlikely.*)
+    *(.text.startup .text.startup.*)
+    *(.text .text.*)
+    *(.gnu.linkonce.t.*)
+  } >ram AT>ram :ram
+
+  .fini           :
+  {
+    KEEP (*(SORT_NONE(.fini)))
+  } >ram AT>ram :ram
+
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+
+  .rodata         :
+  {
+    *(.rdata)
+    *(.rodata .rodata.*)
+    *(.gnu.linkonce.r.*)
+  } >ram AT>ram :ram
+
+  . = ALIGN(4);
+
+  .preinit_array  :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >ram AT>ram :ram
+
+  .init_array     :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >ram AT>ram :ram
+
+  .fini_array     :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >ram AT>ram :ram
+
+  .ctors          :
+  {
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  } >ram AT>ram :ram
+
+  .dtors          :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  } >ram AT>ram :ram
+
+  .lalign         :
+  {
+    . = ALIGN(4);
+    PROVIDE( _data_lma = . );
+  } >ram AT>ram :ram
+
+  .dalign         :
+  {
+    . = ALIGN(4);
+    PROVIDE( _data = . );
+  } >ram AT>ram :ram_init
+
+  .data          :
+  {
+    *(.data .data.*)
+    *(.gnu.linkonce.d.*)
+    . = ALIGN(8);
+    PROVIDE( __global_pointer$ = . + 0x800 );
+    *(.sdata .sdata.*)
+    *(.gnu.linkonce.s.*)
+    . = ALIGN(8);
+    *(.srodata.cst16)
+    *(.srodata.cst8)
+    *(.srodata.cst4)
+    *(.srodata.cst2)
+    *(.srodata .srodata.*)
+  } >ram AT>ram :ram_init
+
+  . = ALIGN(4);
+  PROVIDE( _edata = . );
+  PROVIDE( edata = . );
+
+  PROVIDE( _fbss = . );
+  PROVIDE( __bss_start = . );
+  .bss            :
+  {
+    *(.sbss*)
+    *(.gnu.linkonce.sb.*)
+    *(.bss .bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(4);
+  } >ram AT>ram :ram
+
+  . = ALIGN(8);
+  PROVIDE( _end = . );
+  PROVIDE( end = . );
+
+  .stack :
+  {
+    . = ALIGN(8);
+    . += __stack_size;
+    PROVIDE( _sp = . );
+    PROVIDE( _heap_end = . );
+  } >ram AT>ram :ram
+}
diff --git a/bsp/env/coreplexip-e21-arty/dhrystone.lds b/bsp/env/coreplexip-e21-arty/dhrystone.lds
deleted file mode 120000
index 8459e13..0000000
--- a/bsp/env/coreplexip-e21-arty/dhrystone.lds
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/dhrystone.lds
\ No newline at end of file
diff --git a/bsp/env/coreplexip-e21-arty/flash.lds b/bsp/env/coreplexip-e21-arty/flash.lds
deleted file mode 120000
index 54c1026..0000000
--- a/bsp/env/coreplexip-e21-arty/flash.lds
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/flash.lds
\ No newline at end of file
diff --git a/bsp/env/coreplexip-e21-arty/init.c b/bsp/env/coreplexip-e21-arty/init.c
deleted file mode 120000
index de048a9..0000000
--- a/bsp/env/coreplexip-e21-arty/init.c
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/init.c
\ No newline at end of file
diff --git a/bsp/env/coreplexip-e21-arty/openocd.cfg b/bsp/env/coreplexip-e21-arty/openocd.cfg
deleted file mode 120000
index 2f4de8d..0000000
--- a/bsp/env/coreplexip-e21-arty/openocd.cfg
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/openocd.cfg
\ No newline at end of file
diff --git a/bsp/env/coreplexip-e21-arty/platform.h b/bsp/env/coreplexip-e21-arty/platform.h
deleted file mode 120000
index 311ca36..0000000
--- a/bsp/env/coreplexip-e21-arty/platform.h
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/platform.h
\ No newline at end of file
diff --git a/bsp/env/coreplexip-e21-arty/scratchpad.lds b/bsp/env/coreplexip-e21-arty/scratchpad.lds
deleted file mode 120000
index 7fbe10a..0000000
--- a/bsp/env/coreplexip-e21-arty/scratchpad.lds
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/scratchpad.lds
\ No newline at end of file
diff --git a/bsp/env/coreplexip-e21-arty/settings.mk b/bsp/env/coreplexip-e21-arty/settings.mk
deleted file mode 120000
index 2b2a962..0000000
--- a/bsp/env/coreplexip-e21-arty/settings.mk
+++ /dev/null
@@ -1 +0,0 @@
-../coreplexip-e31-arty/settings.mk
\ No newline at end of file
diff --git a/bsp/include/sifive/devices/clic.h b/bsp/include/sifive/devices/clic.h
index b31e1ce..e8dc2df 100644
--- a/bsp/include/sifive/devices/clic.h
+++ b/bsp/include/sifive/devices/clic.h
@@ -3,8 +3,7 @@
 #ifndef _SIFIVE_CLIC_H
 #define _SIFIVE_CLIC_H
 
-#define CLIC_CTRL_ADDR _AC(0x2000000,UL)
-
+#define CLIC_HART0          0x00800000
 #define CLIC_MSIP           0x0000
 #define CLIC_MSIP_size      0x4
 #define CLIC_MTIMECMP       0x4000
@@ -12,10 +11,10 @@
 #define CLIC_MTIME          0xBFF8
 #define CLIC_MTIME_size     0x8
 
-#define CLIC_INTIP          0x0800000
-#define CLIC_INTIE          0x0800400
-#define CLIC_INTCFG         0x0800800
-#define CLIC_CFG            0x0800c00
+#define CLIC_INTIP          0x000
+#define CLIC_INTIE          0x400
+#define CLIC_INTCFG         0x800
+#define CLIC_CFG            0xc00
 
 // These interrupt IDs are consistent across old and new mtvec modes
 #define SSIPID              1
@@ -27,23 +26,5 @@
 #define CSIPID              12
 #define LOCALINTIDBASE      16
 
-#define CLIC_REG(offset)    _REG32(CLIC_CTRL_ADDR, offset)
-#define CLIC_REG8(offset)   (*(volatile uint8_t *)((CLIC_CTRL_ADDR) + (offset)))
-
-#ifndef CLINT_CTRL_ADDR
-#define CLINT_CTRL_ADDR CLIC_CTRL_ADDR
-#endif
-#ifndef CLINT_REG
-#define CLINT_REG CLIC_REG
-#endif
-#ifndef CLINT_MSIP
-#define CLINT_MSIP CLIC_MSIP
-#endif
-#ifndef CLINT_MTIME
-#define CLINT_MTIME CLIC_MTIME
-#endif
-#ifndef CLINT_MTIMECMP
-#define CLINT_MTIMECMP CLIC_MTIMECMP
-#endif
 
 #endif /* _SIFIVE_CLIC_H */ 
diff --git a/software/clic_vectored/Makefile b/software/clic_vectored/Makefile
new file mode 100644
index 0000000..d6e2342
--- /dev/null
+++ b/software/clic_vectored/Makefile
@@ -0,0 +1,10 @@
+TARGET = clic_vectored
+CFLAGS += -Og -fno-builtin-printf
+
+BSP_BASE = ../../bsp
+
+C_SRCS += clic_vectored.c
+
+C_SRCS += $(BSP_BASE)/drivers/clic/clic_driver.c
+
+include $(BSP_BASE)/env/common.mk
diff --git a/software/clic_vectored/clic_vectored b/software/clic_vectored/clic_vectored
new file mode 100755
index 0000000..df33c93
Binary files /dev/null and b/software/clic_vectored/clic_vectored differ
diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
new file mode 100644
index 0000000..9ae99e3
--- /dev/null
+++ b/software/clic_vectored/clic_vectored.c
@@ -0,0 +1,95 @@
+// See LICENSE for license details.
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "platform.h"
+#include <string.h>
+#include "encoding.h"
+#include <unistd.h>
+#include "sifive/devices/clic.h"
+#include "clic/clic_driver.h"
+
+#ifndef _SIFIVE_COREPLEXIP_ARTY_H
+#error 'local_interrupts' demo only supported for Core IP Eval Kits
+#endif
+
+// Global Variable used to show
+// software interrupts.
+volatile uint32_t g_debouncing;
+
+// vector table defined in init.c
+typedef void (*interrupt_function_ptr_t) (void);
+extern interrupt_function_ptr_t localISR[CLIC_NUM_INTERRUPTS]; 
+extern void default_handler(void);
+
+//clic data structure
+clic_instance_t clic;
+
+const char * instructions_msg = " \
+\n\
+                         SiFive, Inc\n\
+ E21 Core IP Eval Kit 'clic_interrupts' demo.\n\
+\n\
+The Buttons 0-3 and Switch 3 are enabled as local\n\
+interrupts sources. A .5 s 'debounce' timer is used \n\
+between these interrupts. Software interrupts are\n\
+used to print a message while debouncing.\n\
+Note the priority of the interrupts sources.\n\
+\n";
+
+void print_instructions() {
+
+  //write (STDERR_FILENO, instructions_msg, strlen(instructions_msg));
+  printf(instructions_msg);
+
+}
+
+void button_0_isr(void)__attribute__((interrupt("SiFive-CLIC-preemptible")));
+void button_0_isr(void) {
+  // Toggle Red LED
+  const char button_0_msg[] = "Button 0 was pressed. Toggle Red.\n";
+  write (STDOUT_FILENO, button_0_msg, strlen(button_0_msg));  
+  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
+  clic_clear_pending(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
+}
+
+void button_0_setup(void) {
+  clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0), button_0_isr);
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
+}
+
+void config_gpio()  {
+  // Configure LEDs as outputs.
+  GPIO_REG(GPIO_INPUT_EN)    &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
+  GPIO_REG(GPIO_OUTPUT_EN)   |=  ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
+  GPIO_REG(GPIO_OUTPUT_VAL)  &= ((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET)|  (0x1 << BLUE_LED_OFFSET)) ;
+}
+
+int main(int argc, char **argv)
+{
+  clear_csr(mstatus, MSTATUS_MIE);
+  clear_csr(mie, IRQ_M_SOFT);
+  clear_csr(mie, IRQ_M_TIMER);
+
+
+  clic_init(&clic, CLIC_HART0_ADDR, 
+            (interrupt_function_ptr_t*)localISR,
+            default_handler,
+            CLIC_NUM_INTERRUPTS,
+            CLIC_NUM_CONFIG_BITS);
+
+
+  config_gpio();
+  button_0_setup();
+
+  // Enable all global interrupts
+  set_csr(mstatus, MSTATUS_MIE);
+
+
+  print_instructions();
+  while(1);
+
+  return 0;
+
+}
-- 
cgit v1.2.3


From 833e3fadf745dfdec6c8208f6c3b2ffd7b5a6f7f Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 01:48:36 -0500
Subject: dont use pre-empt with buttons

---
 bsp/env/coreip-e2-arty/init.c          | 13 ++++++++-----
 software/clic_vectored/clic_vectored.c |  4 ++--
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/bsp/env/coreip-e2-arty/init.c b/bsp/env/coreip-e2-arty/init.c
index aaf213c..3a4c77c 100644
--- a/bsp/env/coreip-e2-arty/init.c
+++ b/bsp/env/coreip-e2-arty/init.c
@@ -46,7 +46,8 @@ static void uart_init(size_t baud_rate)
 typedef void (*interrupt_function_ptr_t) (void);
 interrupt_function_ptr_t localISR[CLIC_NUM_INTERRUPTS] __attribute__((aligned(64)));
 
-void trap_entry(void) __attribute__((interrupt("SiFive-CLIC-preemptible"), aligned(64)));
+
+void trap_entry(void) __attribute__((interrupt, aligned(64)));
 void trap_entry(void)
 {
   unsigned long mcause = read_csr(mcause);
@@ -54,13 +55,13 @@ void trap_entry(void)
   if (mcause & MCAUSE_INT)  {
     localISR[mcause & MCAUSE_CAUSE] ();
   } else {
-    while(1);
+    while(1); 
   }
 }
 
 #ifdef CLIC_DIRECT
 #else
-void default_handler(void)__attribute__((interrupt("SiFive-CLIC-preemptible")));;
+void default_handler(void)__attribute__((interrupt));;
 #endif
 void default_handler(void)
 {
@@ -76,9 +77,11 @@ void _init()
   puts("core freq at " STR(CPU_FREQ) " Hz\n");
 
 //initialize vector table
-  for(int i=0;i++;i<CLIC_NUM_INTERRUPTS)  {
-    localISR[i] = &default_handler;
+  int i=0;
+  while(i<CLIC_NUM_INTERRUPTS)	{
+    localISR[i++] = default_handler;
   }
+  
   write_csr(mtvt, localISR);
 
 #ifdef CLIC_DIRECT
diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index 9ae99e3..db2435d 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -44,14 +44,14 @@ void print_instructions() {
 
 }
 
-void button_0_isr(void)__attribute__((interrupt("SiFive-CLIC-preemptible")));
+void button_0_isr(void) __attribute__((interrupt));
 void button_0_isr(void) {
   // Toggle Red LED
+  	  
   const char button_0_msg[] = "Button 0 was pressed. Toggle Red.\n";
   write (STDOUT_FILENO, button_0_msg, strlen(button_0_msg));  
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
   clic_clear_pending(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
-  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
 }
 
 void button_0_setup(void) {
-- 
cgit v1.2.3


From 482cb468dd680cd268e483a9b160acb222d1cc3f Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 01:55:06 -0500
Subject: Delete clic_vectored

---
 software/clic_vectored/clic_vectored | Bin 73836 -> 0 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 delete mode 100755 software/clic_vectored/clic_vectored

diff --git a/software/clic_vectored/clic_vectored b/software/clic_vectored/clic_vectored
deleted file mode 100755
index df33c93..0000000
Binary files a/software/clic_vectored/clic_vectored and /dev/null differ
-- 
cgit v1.2.3


From ff3a78a64798c8cce7f2a10256a26a3e91c0351c Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 15:23:10 -0500
Subject: add busy wait and extra buttons/irq

---
 software/clic_vectored/clic_vectored.c | 68 ++++++++++++++++++++++++++--------
 1 file changed, 52 insertions(+), 16 deletions(-)

diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index db2435d..38a564e 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -1,5 +1,4 @@
 // See LICENSE for license details.
-
 #include <stdio.h>
 #include <stdlib.h>
 #include "platform.h"
@@ -8,6 +7,7 @@
 #include <unistd.h>
 #include "sifive/devices/clic.h"
 #include "clic/clic_driver.h"
+#include "sifive/devices/clint.h"
 
 #ifndef _SIFIVE_COREPLEXIP_ARTY_H
 #error 'local_interrupts' demo only supported for Core IP Eval Kits
@@ -27,31 +27,34 @@ clic_instance_t clic;
 
 const char * instructions_msg = " \
 \n\
-                         SiFive, Inc\n\
- E21 Core IP Eval Kit 'clic_interrupts' demo.\n\
+              SiFive, Inc\n\
+ E21 Core IP Eval Kit 'clic_vectored' demo.\n\
+ This demo uses buttons 0, 1, and 2 on the\n\
+ Arty board to trigger vectored clic interrupts.\n\
 \n\
-The Buttons 0-3 and Switch 3 are enabled as local\n\
-interrupts sources. A .5 s 'debounce' timer is used \n\
-between these interrupts. Software interrupts are\n\
-used to print a message while debouncing.\n\
-Note the priority of the interrupts sources.\n\
 \n";
 
 void print_instructions() {
+  write (STDERR_FILENO, instructions_msg, strlen(instructions_msg));
+}
 
-  //write (STDERR_FILENO, instructions_msg, strlen(instructions_msg));
-  printf(instructions_msg);
 
+//busy wait for the specified time
+void wait_ms(uint64_t ms) {
+  static const uint64_t ms_tick = RTC_FREQ/1000;
+  volatile uint64_t * mtime  = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
+  uint64_t then = (ms_tick * ms) + *mtime;
+  while(*mtime<then);
 }
 
 void button_0_isr(void) __attribute__((interrupt));
 void button_0_isr(void) {
   // Toggle Red LED
-  	  
-  const char button_0_msg[] = "Button 0 was pressed. Toggle Red.\n";
-  write (STDOUT_FILENO, button_0_msg, strlen(button_0_msg));  
+  printf("Button 0 was pressed. Toggle Red.\n");
+  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
+  wait_ms(500);
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
-  clic_clear_pending(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
 }
 
 void button_0_setup(void) {
@@ -59,6 +62,36 @@ void button_0_setup(void) {
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
 }
 
+void button_1_isr(void) __attribute__((interrupt));
+void button_1_isr(void) {
+  // Toggle Red LED
+  printf("Button 1 was pressed. Toggle Blue.\n");
+  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
+  wait_ms(500);
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
+  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
+}
+
+void button_1_setup(void) {
+  clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1), button_1_isr);
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
+}
+
+void button_2_isr(void) __attribute__((interrupt));
+void button_2_isr(void) {
+  // Toggle Red LED
+  printf("Button 2 was pressed. Toggle Green.\n");
+  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
+  wait_ms(500);
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
+  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
+}
+
+void button_2_setup(void) {
+  clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2), button_2_isr);
+  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
+}
+
 void config_gpio()  {
   // Configure LEDs as outputs.
   GPIO_REG(GPIO_INPUT_EN)    &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
@@ -72,16 +105,19 @@ int main(int argc, char **argv)
   clear_csr(mie, IRQ_M_SOFT);
   clear_csr(mie, IRQ_M_TIMER);
 
-
+  //initialize clic registers and vector table
   clic_init(&clic, CLIC_HART0_ADDR, 
             (interrupt_function_ptr_t*)localISR,
             default_handler,
             CLIC_NUM_INTERRUPTS,
             CLIC_NUM_CONFIG_BITS);
 
-
+  //initialize gpio and buttons.
+  //each button registers an interrupt handler
   config_gpio();
   button_0_setup();
+  button_1_setup();
+  button_2_setup();
 
   // Enable all global interrupts
   set_csr(mstatus, MSTATUS_MIE);
-- 
cgit v1.2.3


From 264c905f62394221215cd367b638e90c60d70808 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 15:51:39 -0500
Subject: accessors for other clic registers

---
 bsp/drivers/clic/clic_driver.c | 18 ++++++++----------
 bsp/drivers/clic/clic_driver.h |  8 ++++----
 2 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/bsp/drivers/clic/clic_driver.c b/bsp/drivers/clic/clic_driver.c
index 8acf4d2..a4c4694 100644
--- a/bsp/drivers/clic/clic_driver.c
+++ b/bsp/drivers/clic/clic_driver.c
@@ -67,22 +67,20 @@ void clic_clear_pending(clic_instance_t * this_clic, uint32_t source){
   *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIP+source) = 0;
 }
 
-//should return max level set. if level set doesn't match requested, check nlbits
-void clic_set_level (clic_instance_t * this_clic, uint32_t source, uint32_t level){
-  
+void clic_set_intcfg (clic_instance_t * this_clic, uint32_t source, uint32_t intcfg){
+  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTCFG+source) = intcfg;
 }
 
-void clic_get_level (clic_instance_t * this_clic, uint32_t source, uint32_t level){
-
+uint8_t clic_get_intcfg  (clic_instance_t * this_clic, uint32_t source){
+  return *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTCFG+source);
 }
 
-void clic_set_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority){
-
+void clic_set_cliccfg (clic_instance_t * this_clic, uint32_t cfg){
+  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG) = cfg;
 }
 
-void clic_get_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority){
-
-
+uint8_t clic_get_cliccfg  (clic_instance_t * this_clic){
+  return *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG);
 }
 
 
diff --git a/bsp/drivers/clic/clic_driver.h b/bsp/drivers/clic/clic_driver.h
index 6e8cf0b..1fd9bb6 100644
--- a/bsp/drivers/clic/clic_driver.h
+++ b/bsp/drivers/clic/clic_driver.h
@@ -26,10 +26,10 @@ void clic_enable_interrupt (clic_instance_t * this_clic, uint32_t source);
 void clic_disable_interrupt (clic_instance_t * this_clic, uint32_t source);
 void clic_set_pending(clic_instance_t * this_clic, uint32_t source);
 void clic_clear_pending(clic_instance_t * this_clic, uint32_t source);
-void clic_set_level (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
-void clic_get_level (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
-void clic_set_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
-void clic_get_priority (clic_instance_t * this_clic, uint32_t source, uint32_t priority);
+void clic_set_intcfg (clic_instance_t * this_clic, uint32_t source, uint32_t intcfg);
+uint8_t clic_get_intcfg (clic_instance_t * this_clic, uint32_t source);
+void clic_set_cliccfg (clic_instance_t * this_clic, uint32_t cfg);
+uint8_t clic_get_cliccfg  (clic_instance_t * this_clic);
 
 __END_DECLS
 
-- 
cgit v1.2.3


From 835b33318a3b350051ef153d382a5980efe19ed6 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 16:04:45 -0500
Subject: update description

---
 bsp/env/coreip-e2-arty/platform.h      |  2 +-
 software/clic_vectored/clic_vectored.c | 11 ++++++++++-
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/bsp/env/coreip-e2-arty/platform.h b/bsp/env/coreip-e2-arty/platform.h
index 8ee0a83..6bf2121 100644
--- a/bsp/env/coreip-e2-arty/platform.h
+++ b/bsp/env/coreip-e2-arty/platform.h
@@ -79,7 +79,7 @@
 #define NUM_GPIO 16
 
 #define CLIC_NUM_INTERRUPTS 28 + 16
-#define CLIC_NUM_CONFIG_BITS 4 //2 for E20
+#define CLIC_CONFIG_BITS 0x1E //2 for E20
 
 #define HAS_BOARD_BUTTONS
 
diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index 38a564e..a20b1f2 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -31,6 +31,9 @@ const char * instructions_msg = " \
  E21 Core IP Eval Kit 'clic_vectored' demo.\n\
  This demo uses buttons 0, 1, and 2 on the\n\
  Arty board to trigger vectored clic interrupts.\n\
+ The higher the button number, the higher the\n\
+ interupt priority. Hold two buttons down at\n\
+ the same time to see priorities in action.\n\
 \n\
 \n";
 
@@ -59,6 +62,7 @@ void button_0_isr(void) {
 
 void button_0_setup(void) {
   clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0), button_0_isr);
+  clic_set_intcfg(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0), 1<<4);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
 }
 
@@ -74,6 +78,7 @@ void button_1_isr(void) {
 
 void button_1_setup(void) {
   clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1), button_1_isr);
+  clic_set_intcfg(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1), 2<<4);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
 }
 
@@ -89,6 +94,7 @@ void button_2_isr(void) {
 
 void button_2_setup(void) {
   clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2), button_2_isr);
+  clic_set_intcfg(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2), 3<<4);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
 }
 
@@ -110,7 +116,10 @@ int main(int argc, char **argv)
             (interrupt_function_ptr_t*)localISR,
             default_handler,
             CLIC_NUM_INTERRUPTS,
-            CLIC_NUM_CONFIG_BITS);
+            CLIC_CONFIG_BITS);
+
+  //use all 4 config bits for levels
+  clic_set_cliccfg(&clic, CLIC_CONFIG_BITS);
 
   //initialize gpio and buttons.
   //each button registers an interrupt handler
-- 
cgit v1.2.3


From 9d58b2120c5a9b9dbc95c0ea90b16280e36dc9ca Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 2 Jul 2018 22:48:21 -0500
Subject: short msi handler

---
 bsp/env/coreip-e2-arty/platform.h      |  2 +-
 software/clic_vectored/clic_vectored.c | 26 +++++++++++++++++++++++---
 2 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/bsp/env/coreip-e2-arty/platform.h b/bsp/env/coreip-e2-arty/platform.h
index 6bf2121..305726d 100644
--- a/bsp/env/coreip-e2-arty/platform.h
+++ b/bsp/env/coreip-e2-arty/platform.h
@@ -32,7 +32,7 @@
 
 // Memory map
 #define CLINT_CTRL_ADDR _AC(0x02000000,UL)
-#define CLIC_HART0_ADDR _AC(0x02800000, UL)
+#define CLIC_HART0_ADDR _AC(0x02800000,UL)
 #define GPIO_CTRL_ADDR _AC(0x20002000,UL)
 #define PWM0_CTRL_ADDR _AC(0x20005000,UL)
 #define RAM_MEM_ADDR _AC(0x80000000,UL)
diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index a20b1f2..cbc104e 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -98,6 +98,21 @@ void button_2_setup(void) {
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
 }
 
+/*Entry Point for Machine Software Interrupt Handler*/
+uint32_t COUNT;
+void msi_isr()__attribute((interrupt));
+void msi_isr() {
+  //clear the  SW interrupt
+  CLINT_REG(CLINT_MSIP) = 0;
+   COUNT++;
+}
+
+void msi_setup(void)  {
+  clic_install_handler(&clic, MSIPID, msi_isr);
+  clic_set_intcfg(&clic, MSIPID, 1<<4);
+  clic_enable_interrupt(&clic, MSIPID);
+}
+
 void config_gpio()  {
   // Configure LEDs as outputs.
   GPIO_REG(GPIO_INPUT_EN)    &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
@@ -127,13 +142,18 @@ int main(int argc, char **argv)
   button_0_setup();
   button_1_setup();
   button_2_setup();
+  msi_setup();
 
   // Enable all global interrupts
   set_csr(mstatus, MSTATUS_MIE);
-
-
   print_instructions();
-  while(1);
+
+   while(1)  {
+    wait_ms(10000);
+    printf("Count=%d\n", COUNT);
+    //Trigger a SW interrupt
+    CLINT_REG(CLINT_MSIP) = 1;
+  }
 
   return 0;
 
-- 
cgit v1.2.3


From 962b23a3797ba659577056ed3fc57c2d0a77df62 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Wed, 4 Jul 2018 18:48:19 -0500
Subject: clic driver level and priority functions

---
 bsp/drivers/clic/clic_driver.c         | 75 ++++++++++++++++++++++++++++++++++
 bsp/drivers/clic/clic_driver.h         |  8 ++++
 bsp/env/coreip-e2-arty/platform.h      |  2 +-
 software/clic_vectored/clic_vectored.c | 23 ++++++-----
 4 files changed, 97 insertions(+), 11 deletions(-)

diff --git a/bsp/drivers/clic/clic_driver.c b/bsp/drivers/clic/clic_driver.c
index a4c4694..66b24d6 100644
--- a/bsp/drivers/clic/clic_driver.c
+++ b/bsp/drivers/clic/clic_driver.c
@@ -83,6 +83,81 @@ uint8_t clic_get_cliccfg  (clic_instance_t * this_clic){
   return *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG);
 }
 
+//sets an interrupt level based encoding of nmbits, nlbits
+uint8_t clic_set_int_level( clic_instance_t * this_clic, uint32_t source, uint8_t level) {
+  //extract nlbits
+  uint8_t nlbits = clic_get_cliccfg(this_clic);
+  nlbits = (nlbits >>1) & 0x7;
+
+  //shift level right to mask off unused bits
+  level = level>>((this_clic->num_config_bits)-nlbits); //plus this_clic->nmbits which is always 0 for now.
+  //shift level into correct bit position
+  level = level << (8-((this_clic->num_config_bits)-nlbits));
+ 
+  //write to clicintcfg
+  uint8_t current_intcfg = clic_get_intcfg(this_clic, source);
+  clic_set_intcfg(this_clic, source, (current_intcfg | level));
+
+  return level;
+}
+
+//gets an interrupt level based encoding of nmbits, nlbits
+uint8_t clic_get_int_level( clic_instance_t * this_clic, uint32_t source) {
+  uint8_t level;
+  level = clic_get_intcfg(this_clic, source);
+
+  //extract nlbits
+  uint8_t nlbits = clic_get_cliccfg(this_clic);
+  nlbits = (nlbits >>1) & 0x7;
+
+  //shift level
+  level = level >> (8-(this_clic->num_config_bits));
 
+  //shift level right to mask off priority bits
+  level = level>>((this_clic->num_config_bits)-nlbits); //this_clic->nmbits which is always 0 for now.
+
+  return level;
+}
+
+//sets an interrupt priority based encoding of nmbits, nlbits
+uint8_t clic_set_int_priority( clic_instance_t * this_clic, uint32_t source, uint8_t priority) {
+  //priority bits = num_config_bits - nlbits
+  //extract nlbits
+  uint8_t nlbits = clic_get_cliccfg(this_clic);
+  nlbits = (nlbits >>1) & 0x7;
+
+  uint8_t priority_bits = this_clic->num_config_bits-nlbits;
+  if(priority_bits = 0) {
+    //no bits to set
+    return 0;
+  }
+  //mask off unused bits
+  priority = priority >> (8-priority_bits);
+  //shift into the correct bit position
+  priority = priority << (8-(this_clic->num_config_bits));
+
+  //write to clicintcfg
+  uint8_t current_intcfg = clic_get_intcfg(this_clic, source);
+  clic_set_intcfg(this_clic, source, (current_intcfg | priority));
+  return current_intcfg;
+}
+
+//gets an interrupt priority based encoding of nmbits, nlbits
+uint8_t clic_get_int_priority( clic_instance_t * this_clic, uint32_t source) {
+  uint8_t priority;
+  priority = clic_get_intcfg(this_clic, source);
+
+  //extract nlbits
+  uint8_t nlbits = clic_get_cliccfg(this_clic);
+  nlbits = (nlbits >>1) & 0x7;
+
+  //shift left to mask off level bits
+  priority = priority << nlbits;
+
+  //shift priority
+  priority = priority >> (8-((this_clic->num_config_bits)+nlbits));
+
+ return priority;
+}
 
 
diff --git a/bsp/drivers/clic/clic_driver.h b/bsp/drivers/clic/clic_driver.h
index 1fd9bb6..27c34c2 100644
--- a/bsp/drivers/clic/clic_driver.h
+++ b/bsp/drivers/clic/clic_driver.h
@@ -30,6 +30,14 @@ void clic_set_intcfg (clic_instance_t * this_clic, uint32_t source, uint32_t int
 uint8_t clic_get_intcfg (clic_instance_t * this_clic, uint32_t source);
 void clic_set_cliccfg (clic_instance_t * this_clic, uint32_t cfg);
 uint8_t clic_get_cliccfg  (clic_instance_t * this_clic);
+//sets an interrupt level based encoding of nmbits, nlbits
+uint8_t clic_set_int_level( clic_instance_t * this_clic, uint32_t source, uint8_t level);
+//get an interrupt level based encoding of nmbits, nlbits
+uint8_t clic_get_int_level( clic_instance_t * this_clic, uint32_t source);
+//sets an interrupt priority based encoding of nmbits, nlbits
+uint8_t clic_set_int_priority( clic_instance_t * this_clic, uint32_t source, uint8_t priority);
+//sets an interrupt priority based encoding of nmbits, nlbits
+uint8_t clic_get_int_priority( clic_instance_t * this_clic, uint32_t source);
 
 __END_DECLS
 
diff --git a/bsp/env/coreip-e2-arty/platform.h b/bsp/env/coreip-e2-arty/platform.h
index 305726d..ba06160 100644
--- a/bsp/env/coreip-e2-arty/platform.h
+++ b/bsp/env/coreip-e2-arty/platform.h
@@ -79,7 +79,7 @@
 #define NUM_GPIO 16
 
 #define CLIC_NUM_INTERRUPTS 28 + 16
-#define CLIC_CONFIG_BITS 0x1E //2 for E20
+#define CLIC_CONFIG_BITS 4
 
 #define HAS_BOARD_BUTTONS
 
diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index cbc104e..872aba3 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -53,7 +53,8 @@ void wait_ms(uint64_t ms) {
 void button_0_isr(void) __attribute__((interrupt));
 void button_0_isr(void) {
   // Toggle Red LED
-  printf("Button 0 was pressed. Toggle Red.\n");
+  uint8_t level = clic_get_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
+  printf("Button 0 was pressed, interrupt level %d. Toggle Red.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
   wait_ms(500);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
@@ -62,14 +63,15 @@ void button_0_isr(void) {
 
 void button_0_setup(void) {
   clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0), button_0_isr);
-  clic_set_intcfg(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0), 1<<4);
+  clic_set_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0), 1);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
 }
 
 void button_1_isr(void) __attribute__((interrupt));
 void button_1_isr(void) {
   // Toggle Red LED
-  printf("Button 1 was pressed. Toggle Blue.\n");
+  uint8_t level = clic_get_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
+  printf("Button 1 was pressed, interrupt level %d. Toggle Blue.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
   wait_ms(500);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
@@ -78,14 +80,15 @@ void button_1_isr(void) {
 
 void button_1_setup(void) {
   clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1), button_1_isr);
-  clic_set_intcfg(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1), 2<<4);
+  clic_set_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1), 2);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
 }
 
 void button_2_isr(void) __attribute__((interrupt));
 void button_2_isr(void) {
   // Toggle Red LED
-  printf("Button 2 was pressed. Toggle Green.\n");
+  uint8_t level = clic_get_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
+  printf("Button 2 was pressed, interrupt level %d. Toggle Green.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
   wait_ms(500);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
@@ -94,7 +97,7 @@ void button_2_isr(void) {
 
 void button_2_setup(void) {
   clic_install_handler(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2), button_2_isr);
-  clic_set_intcfg(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2), 3<<4);
+  clic_set_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2), 3);
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
 }
 
@@ -104,12 +107,12 @@ void msi_isr()__attribute((interrupt));
 void msi_isr() {
   //clear the  SW interrupt
   CLINT_REG(CLINT_MSIP) = 0;
-   COUNT++;
+  COUNT++;
 }
 
 void msi_setup(void)  {
   clic_install_handler(&clic, MSIPID, msi_isr);
-  clic_set_intcfg(&clic, MSIPID, 1<<4);
+  clic_set_int_level(&clic, MSIPID, 1);
   clic_enable_interrupt(&clic, MSIPID);
 }
 
@@ -133,8 +136,8 @@ int main(int argc, char **argv)
             CLIC_NUM_INTERRUPTS,
             CLIC_CONFIG_BITS);
 
-  //use all 4 config bits for levels
-  clic_set_cliccfg(&clic, CLIC_CONFIG_BITS);
+  //use all 4 config bits for levels, no shv
+  clic_set_cliccfg(&clic, ((CLIC_CONFIG_BITS<<1)|0));
 
   //initialize gpio and buttons.
   //each button registers an interrupt handler
-- 
cgit v1.2.3


From 24010b53cdc225cea7de8662d0b54425f86f8b61 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Thu, 5 Jul 2018 14:14:04 -0500
Subject: fix level calculation

---
 bsp/drivers/clic/clic_driver.c         | 4 ++--
 software/clic_vectored/clic_vectored.c | 5 +----
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/bsp/drivers/clic/clic_driver.c b/bsp/drivers/clic/clic_driver.c
index 66b24d6..0612e58 100644
--- a/bsp/drivers/clic/clic_driver.c
+++ b/bsp/drivers/clic/clic_driver.c
@@ -92,7 +92,7 @@ uint8_t clic_set_int_level( clic_instance_t * this_clic, uint32_t source, uint8_
   //shift level right to mask off unused bits
   level = level>>((this_clic->num_config_bits)-nlbits); //plus this_clic->nmbits which is always 0 for now.
   //shift level into correct bit position
-  level = level << (8-((this_clic->num_config_bits)-nlbits));
+  level = level << (8-this_clic->num_config_bits) + (this_clic->num_config_bits - nlbits);
  
   //write to clicintcfg
   uint8_t current_intcfg = clic_get_intcfg(this_clic, source);
@@ -114,7 +114,7 @@ uint8_t clic_get_int_level( clic_instance_t * this_clic, uint32_t source) {
   level = level >> (8-(this_clic->num_config_bits));
 
   //shift level right to mask off priority bits
-  level = level>>((this_clic->num_config_bits)-nlbits); //this_clic->nmbits which is always 0 for now.
+  level = level>>(this_clic->num_config_bits-nlbits); //this_clic->nmbits which is always 0 for now.
 
   return level;
 }
diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index 872aba3..3f632df 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -57,7 +57,6 @@ void button_0_isr(void) {
   printf("Button 0 was pressed, interrupt level %d. Toggle Red.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
   wait_ms(500);
-  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
 }
 
@@ -74,7 +73,6 @@ void button_1_isr(void) {
   printf("Button 1 was pressed, interrupt level %d. Toggle Blue.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
   wait_ms(500);
-  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
 }
 
@@ -91,7 +89,6 @@ void button_2_isr(void) {
   printf("Button 2 was pressed, interrupt level %d. Toggle Green.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
   wait_ms(500);
-  clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
 }
 
@@ -137,7 +134,7 @@ int main(int argc, char **argv)
             CLIC_CONFIG_BITS);
 
   //use all 4 config bits for levels, no shv
-  clic_set_cliccfg(&clic, ((CLIC_CONFIG_BITS<<1)|0));
+  clic_set_cliccfg(&clic, (CLIC_CONFIG_BITS<<1));
 
   //initialize gpio and buttons.
   //each button registers an interrupt handler
-- 
cgit v1.2.3


From 4967d4690674e553942b7cfe9465de1fc3287faa Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Thu, 5 Jul 2018 16:41:42 -0500
Subject: use new cspid instead of msip

---
 software/clic_vectored/clic_vectored.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index 3f632df..6f19fa3 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -100,17 +100,17 @@ void button_2_setup(void) {
 
 /*Entry Point for Machine Software Interrupt Handler*/
 uint32_t COUNT;
-void msi_isr()__attribute((interrupt));
-void msi_isr() {
+void csip_isr()__attribute((interrupt));
+void csip_isr() {
   //clear the  SW interrupt
-  CLINT_REG(CLINT_MSIP) = 0;
+  clic_clear_pending(&clic, CSIPID);
   COUNT++;
 }
 
-void msi_setup(void)  {
-  clic_install_handler(&clic, MSIPID, msi_isr);
-  clic_set_int_level(&clic, MSIPID, 1);
-  clic_enable_interrupt(&clic, MSIPID);
+void csip_setup(void)  {
+  clic_install_handler(&clic, CSIPID, csip_isr);
+  clic_set_int_level(&clic, CSIPID, 1);
+  clic_enable_interrupt(&clic, CSIPID);
 }
 
 void config_gpio()  {
@@ -142,7 +142,7 @@ int main(int argc, char **argv)
   button_0_setup();
   button_1_setup();
   button_2_setup();
-  msi_setup();
+  csip_setup();
 
   // Enable all global interrupts
   set_csr(mstatus, MSTATUS_MIE);
@@ -152,7 +152,7 @@ int main(int argc, char **argv)
     wait_ms(10000);
     printf("Count=%d\n", COUNT);
     //Trigger a SW interrupt
-    CLINT_REG(CLINT_MSIP) = 1;
+    clic_set_pending(&clic, CSIPID);
   }
 
   return 0;
-- 
cgit v1.2.3


From b5f83a89d41dc2bd0307694ffca4cb4136f32f86 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Thu, 5 Jul 2018 22:32:36 -0500
Subject: preemption support, csipid from button 2

---
 software/clic_vectored/clic_vectored.c | 65 ++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 14 deletions(-)

diff --git a/software/clic_vectored/clic_vectored.c b/software/clic_vectored/clic_vectored.c
index 6f19fa3..37ea723 100644
--- a/software/clic_vectored/clic_vectored.c
+++ b/software/clic_vectored/clic_vectored.c
@@ -28,13 +28,48 @@ clic_instance_t clic;
 const char * instructions_msg = " \
 \n\
               SiFive, Inc\n\
- E21 Core IP Eval Kit 'clic_vectored' demo.\n\
- This demo uses buttons 0, 1, and 2 on the\n\
- Arty board to trigger vectored clic interrupts.\n\
- The higher the button number, the higher the\n\
- interupt priority. Hold two buttons down at\n\
- the same time to see priorities in action.\n\
 \n\
+         5555555555555555555555555\n\
+        5555                   5555\n\
+       5555                     5555\n\
+      5555                       5555\n\
+     5555       5555555555555555555555\n\
+    5555       555555555555555555555555\n\
+   5555                             5555\n\
+  5555                               5555\n\
+ 5555                                 5555\n\
+5555555555555555555555555555          55555\n\
+ 55555           555555555           55555\n\
+   55555           55555           55555\n\
+     55555           5           55555\n\
+       55555                   55555\n\
+         55555               55555\n\
+           55555           55555\n\
+             55555       55555\n\
+               55555   55555\n\
+                 555555555\n\
+                   55555\n\
+                     5\n\
+\n\
+E2 Core IP Eval Kit 'clic_vectored' demo.\n\
+This demo uses buttons 0, 1, and 2 on the\n\
+Arty board to trigger vectored clic interrupts.\n\
+The higher the button number, the higher the\n\
+interupt priority. Button 0's handler runs for\n\
+10 seconds, button 1's for 5, and button 2's for 1.\n\
+Preemption is enabled so that higher priority\n\
+interrupts can be triggered while in low priority\n\
+handlers. The demo also uses the CLIC's software\n\
+interrupt to pend a lower priority interrupt from\n\
+button 2's handler.\n\
+\n\
+Note the buttons are wired directly into the local\n\
+interrupts, so a given interrupt will stay asserted\n\
+as long as the button is being pushed.\n\
+\n\
+This demo works for both the E20 and E21 FPGA\n\
+as long as CLIC_CONFIG_BITS matches the desired\n\
+core.\n\
 \n";
 
 void print_instructions() {
@@ -50,13 +85,13 @@ void wait_ms(uint64_t ms) {
   while(*mtime<then);
 }
 
-void button_0_isr(void) __attribute__((interrupt));
+void button_0_isr(void) __attribute__((interrupt("SiFive-CLIC-preemptible")));
 void button_0_isr(void) {
   // Toggle Red LED
   uint8_t level = clic_get_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
   printf("Button 0 was pressed, interrupt level %d. Toggle Red.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
-  wait_ms(500);
+  wait_ms(10000);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
 }
 
@@ -66,13 +101,13 @@ void button_0_setup(void) {
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_0));
 }
 
-void button_1_isr(void) __attribute__((interrupt));
+void button_1_isr(void) __attribute__((interrupt("SiFive-CLIC-preemptible")));
 void button_1_isr(void) {
   // Toggle Red LED
   uint8_t level = clic_get_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
   printf("Button 1 was pressed, interrupt level %d. Toggle Blue.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
-  wait_ms(500);
+  wait_ms(5000);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
 }
 
@@ -82,13 +117,15 @@ void button_1_setup(void) {
   clic_enable_interrupt(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_1));
 }
 
-void button_2_isr(void) __attribute__((interrupt));
+void button_2_isr(void) __attribute__((interrupt("SiFive-CLIC-preemptible")));
 void button_2_isr(void) {
   // Toggle Red LED
   uint8_t level = clic_get_int_level(&clic, (LOCALINTIDBASE + LOCAL_INT_BTN_2));
-  printf("Button 2 was pressed, interrupt level %d. Toggle Green.\n", level);
+  printf("Button 2 was pressed, interrupt level %d. Pending CSIPID and toggle Green.\n", level);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
-  wait_ms(500);
+  //pend a software interrupt
+  clic_set_pending(&clic, CSIPID);
+  wait_ms(1000);
   GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
 }
 
@@ -103,7 +140,7 @@ uint32_t COUNT;
 void csip_isr()__attribute((interrupt));
 void csip_isr() {
   //clear the  SW interrupt
-  clic_clear_pending(&clic, CSIPID);
+  CLIC0_REG8(CLIC_INTIP + CSIPID) = 0;
   COUNT++;
 }
 
-- 
cgit v1.2.3


From c17273a65d0d2928217d587688f3fe2bea2406e8 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Thu, 5 Jul 2018 22:32:56 -0500
Subject: support the E20

---
 bsp/env/coreip-e2-arty/platform.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/bsp/env/coreip-e2-arty/platform.h b/bsp/env/coreip-e2-arty/platform.h
index ba06160..9ae9864 100644
--- a/bsp/env/coreip-e2-arty/platform.h
+++ b/bsp/env/coreip-e2-arty/platform.h
@@ -79,7 +79,12 @@
 #define NUM_GPIO 16
 
 #define CLIC_NUM_INTERRUPTS 28 + 16
-#define CLIC_CONFIG_BITS 4
+
+#ifdef E20
+   #define CLIC_CONFIG_BITS 2
+#else
+   #define CLIC_CONFIG_BITS 4
+#endif
 
 #define HAS_BOARD_BUTTONS
 
-- 
cgit v1.2.3


From 6cebe81ad76bd44d71297b5ec19fef0b9a01817f Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Sun, 8 Jul 2018 18:02:20 -0500
Subject: FS projects

---
 FreedomStudio/E2FPGA/clic_vectored/.cproject       | 208 ++++++++++++
 FreedomStudio/E2FPGA/clic_vectored/.gitignore      |   1 +
 FreedomStudio/E2FPGA/clic_vectored/.project        | 358 ++++++++++++++++++++
 .../E2FPGA/clic_vectored/sifive-coreip-e2-arty.cfg |  31 ++
 FreedomStudio/E2FPGA/coreplexip_welcome/.cproject  | 210 ++++++++++++
 FreedomStudio/E2FPGA/coreplexip_welcome/.gitignore |   1 +
 FreedomStudio/E2FPGA/coreplexip_welcome/.project   | 358 ++++++++++++++++++++
 .../coreplexip_welcome/sifive-coreip-e2-arty.cfg   |  31 ++
 FreedomStudio/E2FPGA/dhrystone/.cproject           | 216 ++++++++++++
 FreedomStudio/E2FPGA/dhrystone/.gitignore          |   1 +
 FreedomStudio/E2FPGA/dhrystone/.project            | 373 +++++++++++++++++++++
 .../E2FPGA/dhrystone/sifive-coreip-e2-arty.cfg     |  31 ++
 bsp/env/coreip-e2-arty/flash.lds                   | 161 +++++++++
 13 files changed, 1980 insertions(+)
 create mode 100644 FreedomStudio/E2FPGA/clic_vectored/.cproject
 create mode 100644 FreedomStudio/E2FPGA/clic_vectored/.gitignore
 create mode 100644 FreedomStudio/E2FPGA/clic_vectored/.project
 create mode 100644 FreedomStudio/E2FPGA/clic_vectored/sifive-coreip-e2-arty.cfg
 create mode 100644 FreedomStudio/E2FPGA/coreplexip_welcome/.cproject
 create mode 100644 FreedomStudio/E2FPGA/coreplexip_welcome/.gitignore
 create mode 100644 FreedomStudio/E2FPGA/coreplexip_welcome/.project
 create mode 100644 FreedomStudio/E2FPGA/coreplexip_welcome/sifive-coreip-e2-arty.cfg
 create mode 100644 FreedomStudio/E2FPGA/dhrystone/.cproject
 create mode 100644 FreedomStudio/E2FPGA/dhrystone/.gitignore
 create mode 100644 FreedomStudio/E2FPGA/dhrystone/.project
 create mode 100644 FreedomStudio/E2FPGA/dhrystone/sifive-coreip-e2-arty.cfg
 create mode 100644 bsp/env/coreip-e2-arty/flash.lds

diff --git a/FreedomStudio/E2FPGA/clic_vectored/.cproject b/FreedomStudio/E2FPGA/clic_vectored/.cproject
new file mode 100644
index 0000000..85a0e97
--- /dev/null
+++ b/FreedomStudio/E2FPGA/clic_vectored/.cproject
@@ -0,0 +1,208 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug">
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+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.829017513" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" useByScannerDiscovery="false" value="false" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.411410557" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.1839746398" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
+									<listOptionValue builtIn="false" value="c"/>
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+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.1780520059" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
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+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.724386459" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--start-group -Wl,--end-group -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit -Wl,--wrap=puts -Wl,--wrap=_malloc -Wl,--wrap=_free -Wl,--wrap=_open -Wl,--wrap=_lseek -Wl,--wrap=_read -Wl,--wrap=_write -Wl,--wrap=_fstat -Wl,--wrap=_stat -Wl,--wrap=_close -Wl,--wrap=_link -Wl,--wrap=_unlink -Wl,--wrap=_execve -Wl,--wrap=_fork -Wl,--wrap=_getpid -Wl,--wrap=_kill -Wl,--wrap=_wait -Wl,--wrap=_isatty -Wl,--wrap=_times -Wl,--wrap=_sbrk -Wl,--wrap=__exit -Wl,--wrap=_puts" valueType="string"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1308651449" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/bsp/env/coreip-e2-arty/tim-split.lds}&quot;"/>
+								</option>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.221590263" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1622617219" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.308259056" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.1728896073" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1440702077" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.72955671" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.896585596" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1085159845" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.1809323208" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1876163022" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.197772274" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.2070658666" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1974544044" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1826132396" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491" name="Release" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release">
+					<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491." name="/" resourcePath="">
+						<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.798161331" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.417446835" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting.1743854251" name="Create extended listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.1631722448" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.1683678794" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.size" valueType="enumerated"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.1641052347" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.336648016" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.558797525" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.2037007232" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.1742776144" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.1933889928" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.2063832146" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" value="RISC-V GCC/Newlib" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.381172939" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" value="riscv64-unknown-elf-" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.965139584" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" value="gcc" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.165778736" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" value="g++" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.1877651524" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" value="ar" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.1312454454" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" value="objcopy" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.1539636938" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" value="objdump" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.744988053" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" value="size" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.198003765" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" value="make" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.190439479" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" value="rm" valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1087126443" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
+							<builder buildPath="${workspace_loc:/coreplexip_welcome}/Release" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1100639240" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1852055175" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.684576923" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.732504559" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.743554394" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2132640858" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.351634096" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1633934157" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1696261404" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1361926988" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.2097010512" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.446955466" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1446800331" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.917780362" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1881705446" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.453203469" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.511548754" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1318187086" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1829288149" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.663740155" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1315189209" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1728208687" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="coreplexip_welcome.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.84799689" name="Executable" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.743554394;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2132640858">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.424460842;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1695943366">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/>
+		</configuration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/FreedomStudio/E2FPGA/clic_vectored/.gitignore b/FreedomStudio/E2FPGA/clic_vectored/.gitignore
new file mode 100644
index 0000000..3df573f
--- /dev/null
+++ b/FreedomStudio/E2FPGA/clic_vectored/.gitignore
@@ -0,0 +1 @@
+/Debug/
diff --git a/FreedomStudio/E2FPGA/clic_vectored/.project b/FreedomStudio/E2FPGA/clic_vectored/.project
new file mode 100644
index 0000000..171cf91
--- /dev/null
+++ b/FreedomStudio/E2FPGA/clic_vectored/.project
@@ -0,0 +1,358 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>clic_vectored</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>bsp</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>clic_vectored.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/clic_vectored/clic_vectored.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/include</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/clic</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/fe300prci</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreplexip-arty.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-arty.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/encoding.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/entry.S</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/entry.S</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/hifive1.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/hifive1.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/start.S</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/misc</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/stdlib</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/clic/clic_driver.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/clic/clic_driver.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/clic/plic_driver.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/clic/clic_driver.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/dhrystone.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/dhrystone.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/flash.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/flash.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/init.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/init.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/openocd.cfg</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/openocd.cfg</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/platform.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/platform.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/settings.mk</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/settings.mk</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/tim-split.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/tim-split.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/tim.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/tim.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/bits.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/const.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/sections.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/smp.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/misc/write_hex.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/stdlib/malloc.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/_exit.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/close.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/execve.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/fork.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/fstat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/getpid.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/isatty.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/kill.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/link.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/lseek.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/open.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/openat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/puts.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/read.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/sbrk.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/stat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/stub.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/times.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/unlink.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/wait.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/weak_under_alias.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/write.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/aon.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/clint.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/gpio.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/otp.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/plic.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/prci.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/pwm.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/spi.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/uart.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/FreedomStudio/E2FPGA/clic_vectored/sifive-coreip-e2-arty.cfg b/FreedomStudio/E2FPGA/clic_vectored/sifive-coreip-e2-arty.cfg
new file mode 100644
index 0000000..8b382dc
--- /dev/null
+++ b/FreedomStudio/E2FPGA/clic_vectored/sifive-coreip-e2-arty.cfg
@@ -0,0 +1,31 @@
+# JTAG adapter setup
+adapter_khz     10000
+
+interface ftdi
+ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi_vid_pid 0x15ba 0x002a
+
+ftdi_layout_init 0x0808 0x0a1b
+ftdi_layout_signal nSRST -oe 0x0200
+#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi_layout_signal LED -data 0x0800
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+# Un-comment these two flash lines if you have a SPI flash and want to write
+# it.
+flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
+init
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+flash protect 0 64 last off
+echo "Ready for Remote Connections"
diff --git a/FreedomStudio/E2FPGA/coreplexip_welcome/.cproject b/FreedomStudio/E2FPGA/coreplexip_welcome/.cproject
new file mode 100644
index 0000000..051c949
--- /dev/null
+++ b/FreedomStudio/E2FPGA/coreplexip_welcome/.cproject
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug">
+					<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722." name="/" resourcePath="">
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+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1633934157" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1696261404" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1361926988" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.2097010512" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.446955466" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1446800331" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.917780362" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1881705446" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.453203469" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.511548754" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1318187086" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1829288149" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.663740155" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1315189209" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1728208687" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="coreplexip_welcome.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.84799689" name="Executable" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.743554394;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2132640858">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.424460842;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1695943366">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/>
+		</configuration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/FreedomStudio/E2FPGA/coreplexip_welcome/.gitignore b/FreedomStudio/E2FPGA/coreplexip_welcome/.gitignore
new file mode 100644
index 0000000..3df573f
--- /dev/null
+++ b/FreedomStudio/E2FPGA/coreplexip_welcome/.gitignore
@@ -0,0 +1 @@
+/Debug/
diff --git a/FreedomStudio/E2FPGA/coreplexip_welcome/.project b/FreedomStudio/E2FPGA/coreplexip_welcome/.project
new file mode 100644
index 0000000..0d91d8d
--- /dev/null
+++ b/FreedomStudio/E2FPGA/coreplexip_welcome/.project
@@ -0,0 +1,358 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>coreplexip_welcome</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>bsp</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>coreplexip_welcome.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/coreplexip_welcome/coreplexip_welcome.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/include</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/clic</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/fe300prci</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreplexip-arty.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-arty.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/encoding.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/entry.S</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/entry.S</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/hifive1.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/hifive1.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/start.S</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/misc</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/stdlib</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/clic/clic_driver.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/clic/clic_driver.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/clic/plic_driver.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/clic/clic_driver.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/dhrystone.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/dhrystone.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/flash.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/flash.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/init.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/init.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/openocd.cfg</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/openocd.cfg</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/platform.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/platform.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/settings.mk</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/settings.mk</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/tim-split.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/tim-split.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/tim.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/tim.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/bits.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/const.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/sections.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/smp.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/misc/write_hex.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/stdlib/malloc.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/_exit.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/close.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/execve.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/fork.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/fstat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/getpid.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/isatty.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/kill.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/link.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/lseek.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/open.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/openat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/puts.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/read.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/sbrk.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/stat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/stub.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/times.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/unlink.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/wait.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/weak_under_alias.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/write.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/aon.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
+		</link>
+		<link>
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+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/gpio.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/otp.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/plic.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/prci.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/pwm.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/spi.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/uart.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/FreedomStudio/E2FPGA/coreplexip_welcome/sifive-coreip-e2-arty.cfg b/FreedomStudio/E2FPGA/coreplexip_welcome/sifive-coreip-e2-arty.cfg
new file mode 100644
index 0000000..8b382dc
--- /dev/null
+++ b/FreedomStudio/E2FPGA/coreplexip_welcome/sifive-coreip-e2-arty.cfg
@@ -0,0 +1,31 @@
+# JTAG adapter setup
+adapter_khz     10000
+
+interface ftdi
+ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi_vid_pid 0x15ba 0x002a
+
+ftdi_layout_init 0x0808 0x0a1b
+ftdi_layout_signal nSRST -oe 0x0200
+#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi_layout_signal LED -data 0x0800
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+# Un-comment these two flash lines if you have a SPI flash and want to write
+# it.
+flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
+init
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+flash protect 0 64 last off
+echo "Ready for Remote Connections"
diff --git a/FreedomStudio/E2FPGA/dhrystone/.cproject b/FreedomStudio/E2FPGA/dhrystone/.cproject
new file mode 100644
index 0000000..863a5a9
--- /dev/null
+++ b/FreedomStudio/E2FPGA/dhrystone/.cproject
@@ -0,0 +1,216 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" errorParsers="org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.CWDLocator;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722" name="Debug" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug" postannouncebuildStep="" postbuildStep="" preannouncebuildStep="" prebuildStep="">
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+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1085159845" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.1809323208" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1876163022" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.197772274" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.2070658666" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+							</tool>
+							<tool command="${cross_prefix}${cross_size}${cross_suffix}" commandLinePattern="${COMMAND} ${FLAGS}" errorParsers="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1974544044" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1826132396" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs"/>
+		</cconfiguration>
+		<cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491" name="Release" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release">
+					<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491." name="/" resourcePath="">
+						<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.798161331" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.417446835" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting.1743854251" name="Create extended listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.1631722448" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.1683678794" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.size" valueType="enumerated"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.1641052347" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.336648016" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.558797525" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.2037007232" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" value="true" valueType="boolean"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.1742776144" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.1933889928" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.2063832146" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" value="RISC-V GCC/Newlib" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.381172939" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" value="riscv64-unknown-elf-" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.965139584" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" value="gcc" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.165778736" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" value="g++" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.1877651524" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" value="ar" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.1312454454" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" value="objcopy" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.1539636938" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" value="objdump" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.744988053" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" value="size" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.198003765" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" value="make" valueType="string"/>
+							<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.190439479" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" value="rm" valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1087126443" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
+							<builder buildPath="${workspace_loc:/coreplexip_welcome}/Release" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1100639240" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1852055175" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.684576923" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.732504559" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.743554394" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2132640858" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.351634096" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1633934157" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1696261404" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
+								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1361926988" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.2097010512" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.446955466" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1446800331" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.917780362" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1881705446" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.453203469" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.511548754" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1318187086" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1829288149" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.663740155" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1315189209" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1728208687" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="coreplexip_welcome.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.84799689" name="Executable" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.188392491.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.743554394;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2132640858">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1419430722.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.424460842;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1695943366">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/coreplexip_welcome"/>
+		</configuration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/FreedomStudio/E2FPGA/dhrystone/.gitignore b/FreedomStudio/E2FPGA/dhrystone/.gitignore
new file mode 100644
index 0000000..3df573f
--- /dev/null
+++ b/FreedomStudio/E2FPGA/dhrystone/.gitignore
@@ -0,0 +1 @@
+/Debug/
diff --git a/FreedomStudio/E2FPGA/dhrystone/.project b/FreedomStudio/E2FPGA/dhrystone/.project
new file mode 100644
index 0000000..3407cae
--- /dev/null
+++ b/FreedomStudio/E2FPGA/dhrystone/.project
@@ -0,0 +1,373 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>dhrystone</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>bsp</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>dhry.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry.h</locationURI>
+		</link>
+		<link>
+			<name>dhry_1.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_1.c</locationURI>
+		</link>
+		<link>
+			<name>dhry_2.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_2.c</locationURI>
+		</link>
+		<link>
+			<name>dhry_printf.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_printf.c</locationURI>
+		</link>
+		<link>
+			<name>dhry_stubs.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/software/dhrystone/dhry_stubs.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/include</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/fe300prci</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/plic</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreplexip-arty.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreplexip-arty.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/encoding.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/encoding.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/entry.S</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/entry.S</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/hifive1.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/hifive1.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/start.S</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/start.S</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/misc</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/stdlib</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/drivers/fe300prci/fe300prci_driver.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/tim-split.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/tim-split.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/tim.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/tim.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/flash.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/flash.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/init.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/init.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/openocd.cfg</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/openocd.cfg</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/platform.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/platform.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/scratchpad.lds</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/scratchpad.lds</locationURI>
+		</link>
+		<link>
+			<name>bsp/env/coreip-e2-arty/settings.mk</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/env/coreip-e2-arty/settings.mk</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/bits.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/const.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/sections.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/smp.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/misc/write_hex.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/misc/write_hex.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/stdlib/malloc.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/stdlib/malloc.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/_exit.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/_exit.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/close.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/close.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/execve.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/execve.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/fork.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fork.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/fstat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/fstat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/getpid.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/getpid.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/isatty.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/isatty.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/kill.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/kill.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/link.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/link.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/lseek.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/lseek.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/open.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/open.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/openat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/openat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/puts.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/puts.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/read.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/read.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/sbrk.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/sbrk.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/stat.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stat.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/stub.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/stub.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/times.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/times.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/unlink.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/unlink.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/wait.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/wait.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/weak_under_alias.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/weak_under_alias.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/libwrap/sys/write.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/libwrap/sys/write.c</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/aon.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/clint.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/gpio.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/otp.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/plic.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/prci.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/pwm.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/spi.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h</locationURI>
+		</link>
+		<link>
+			<name>bsp/include/sifive/devices/uart.h</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/FreedomStudio/E2FPGA/dhrystone/sifive-coreip-e2-arty.cfg b/FreedomStudio/E2FPGA/dhrystone/sifive-coreip-e2-arty.cfg
new file mode 100644
index 0000000..8b382dc
--- /dev/null
+++ b/FreedomStudio/E2FPGA/dhrystone/sifive-coreip-e2-arty.cfg
@@ -0,0 +1,31 @@
+# JTAG adapter setup
+adapter_khz     10000
+
+interface ftdi
+ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi_vid_pid 0x15ba 0x002a
+
+ftdi_layout_init 0x0808 0x0a1b
+ftdi_layout_signal nSRST -oe 0x0200
+#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi_layout_signal LED -data 0x0800
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+# Un-comment these two flash lines if you have a SPI flash and want to write
+# it.
+flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
+init
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+flash protect 0 64 last off
+echo "Ready for Remote Connections"
diff --git a/bsp/env/coreip-e2-arty/flash.lds b/bsp/env/coreip-e2-arty/flash.lds
new file mode 100644
index 0000000..2d5eb01
--- /dev/null
+++ b/bsp/env/coreip-e2-arty/flash.lds
@@ -0,0 +1,161 @@
+OUTPUT_ARCH( "riscv" )
+
+ENTRY( _start )
+
+MEMORY
+{
+  flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 512M
+  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 64K
+}
+
+PHDRS
+{
+  flash PT_LOAD;
+  ram_init PT_LOAD;
+  ram PT_NULL;
+}
+
+SECTIONS
+{
+  __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
+
+  .init           :
+  {
+    KEEP (*(SORT_NONE(.init)))
+  } >flash AT>flash :flash
+
+  .text           :
+  {
+    *(.text.unlikely .text.unlikely.*)
+    *(.text.startup .text.startup.*)
+    *(.text .text.*)
+    *(.gnu.linkonce.t.*)
+  } >flash AT>flash :flash
+
+  .fini           :
+  {
+    KEEP (*(SORT_NONE(.fini)))
+  } >flash AT>flash :flash
+
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+
+  .rodata         :
+  {
+    *(.rdata)
+    *(.rodata .rodata.*)
+    *(.gnu.linkonce.r.*)
+  } >flash AT>flash :flash
+
+  . = ALIGN(4);
+
+  .preinit_array  :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >flash AT>flash :flash
+
+  .init_array     :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >flash AT>flash :flash
+
+  .fini_array     :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >flash AT>flash :flash
+
+  .ctors          :
+  {
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  } >flash AT>flash :flash
+
+  .dtors          :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  } >flash AT>flash :flash
+
+  .lalign         :
+  {
+    . = ALIGN(4);
+    PROVIDE( _data_lma = . );
+  } >flash AT>flash :flash
+
+  .dalign         :
+  {
+    . = ALIGN(4);
+    PROVIDE( _data = . );
+  } >ram AT>flash :ram_init
+
+  .data          :
+  {
+    *(.data .data.*)
+    *(.gnu.linkonce.d.*)
+    . = ALIGN(8);
+    PROVIDE( __global_pointer$ = . + 0x800 );
+    *(.sdata .sdata.*)
+    *(.gnu.linkonce.s.*)
+    . = ALIGN(8);
+    *(.srodata.cst16)
+    *(.srodata.cst8)
+    *(.srodata.cst4)
+    *(.srodata.cst2)
+    *(.srodata .srodata.*)
+  } >ram AT>flash :ram_init
+
+  . = ALIGN(4);
+  PROVIDE( _edata = . );
+  PROVIDE( edata = . );
+
+  PROVIDE( _fbss = . );
+  PROVIDE( __bss_start = . );
+  .bss            :
+  {
+    *(.sbss*)
+    *(.gnu.linkonce.sb.*)
+    *(.bss .bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(4);
+  } >ram AT>ram :ram
+
+  . = ALIGN(8);
+  PROVIDE( _end = . );
+  PROVIDE( end = . );
+
+  .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
+  {
+    PROVIDE( _heap_end = . );
+    . = __stack_size;
+    PROVIDE( _sp = . );
+  } >ram AT>ram :ram
+}
-- 
cgit v1.2.3


From 90968cafb22d81e01a6fd05055df3922215b88a9 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Sun, 8 Jul 2018 18:03:30 -0500
Subject: support clint only projects

---
 bsp/env/coreip-e2-arty/platform.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/bsp/env/coreip-e2-arty/platform.h b/bsp/env/coreip-e2-arty/platform.h
index 9ae9864..0ce0484 100644
--- a/bsp/env/coreip-e2-arty/platform.h
+++ b/bsp/env/coreip-e2-arty/platform.h
@@ -21,6 +21,7 @@
 
 #include "sifive/const.h"
 #include "sifive/devices/gpio.h"
+#include "sifive/devices/clint.h"
 #include "sifive/devices/clic.h"
 #include "sifive/devices/pwm.h"
 #include "sifive/devices/spi.h"
-- 
cgit v1.2.3


From 0c61b9b000932d0e0f9050507f3fdbdda209b0cc Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Sun, 8 Jul 2018 18:05:34 -0500
Subject: debug launch files

---
 .../clic_vectored/clic_vectored OpenOCD.launch     | 61 ++++++++++++++++++++++
 .../coreplexip_welcome OpenOCD.launch              | 61 ++++++++++++++++++++++
 .../E2FPGA/dhrystone/dhrystone OpenOCD.launch      | 61 ++++++++++++++++++++++
 3 files changed, 183 insertions(+)
 create mode 100644 FreedomStudio/E2FPGA/clic_vectored/clic_vectored OpenOCD.launch
 create mode 100644 FreedomStudio/E2FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch
 create mode 100644 FreedomStudio/E2FPGA/dhrystone/dhrystone OpenOCD.launch

diff --git a/FreedomStudio/E2FPGA/clic_vectored/clic_vectored OpenOCD.launch b/FreedomStudio/E2FPGA/clic_vectored/clic_vectored OpenOCD.launch
new file mode 100644
index 0000000..f900b1b
--- /dev/null
+++ b/FreedomStudio/E2FPGA/clic_vectored/clic_vectored OpenOCD.launch	
@@ -0,0 +1,61 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#10;set arch riscv:rv32"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f sifive-coreip-e2-arty.cfg"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
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diff --git a/FreedomStudio/E2FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch b/FreedomStudio/E2FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch
new file mode 100644
index 0000000..356c25a
--- /dev/null
+++ b/FreedomStudio/E2FPGA/coreplexip_welcome/coreplexip_welcome OpenOCD.launch	
@@ -0,0 +1,61 @@
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diff --git a/FreedomStudio/E2FPGA/dhrystone/dhrystone OpenOCD.launch b/FreedomStudio/E2FPGA/dhrystone/dhrystone OpenOCD.launch
new file mode 100644
index 0000000..f996fc4
--- /dev/null
+++ b/FreedomStudio/E2FPGA/dhrystone/dhrystone OpenOCD.launch	
@@ -0,0 +1,61 @@
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+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
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-- 
cgit v1.2.3


From 7bf718778b9710238d791cefc67ac9c8720985e2 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Mon, 9 Jul 2018 21:19:05 -0700
Subject: remove non-vectored example

---
 software/clic_interrupts/Makefile |   8 --
 software/clic_interrupts/clic.c   | 231 --------------------------------------
 2 files changed, 239 deletions(-)
 delete mode 100644 software/clic_interrupts/Makefile
 delete mode 100644 software/clic_interrupts/clic.c

diff --git a/software/clic_interrupts/Makefile b/software/clic_interrupts/Makefile
deleted file mode 100644
index 502534d..0000000
--- a/software/clic_interrupts/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-TARGET = clic_interrupts
-CFLAGS += -O2 -fno-builtin-printf -DUSE_CLIC -DUSE_LOCAL_ISR
-
-BSP_BASE = ../../bsp
-
-C_SRCS += clic.c
-
-include $(BSP_BASE)/env/common.mk
diff --git a/software/clic_interrupts/clic.c b/software/clic_interrupts/clic.c
deleted file mode 100644
index ccf98b2..0000000
--- a/software/clic_interrupts/clic.c
+++ /dev/null
@@ -1,231 +0,0 @@
-// See LICENSE for license details.
-
-#include <stdio.h>
-#include <stdlib.h>
-#include "platform.h"
-#include <string.h>
-#include "encoding.h"
-#include <unistd.h>
-#include "sifive/devices/clic.h"
-
-#ifndef _SIFIVE_COREPLEXIP_ARTY_H
-#error 'local_interrupts' demo only supported for Coreplex IP Eval Kits
-#endif
-
-// Global Variable used to show
-// software interrupts.
-volatile uint32_t g_debouncing;
-
-void debounce();
-
-static void clic_enable(int offset) __attribute__((noinline));
-static void clic_enable(int offset)
-{
-  CLIC_REG8(CLIC_INTCFG + offset) = 0xff;
-  CLIC_REG8(CLIC_INTIE  + offset) = 1;
-}
-
-static void clic_disable(int offset) __attribute__((noinline));
-static void clic_disable(int offset)
-{
-  CLIC_REG8(CLIC_INTCFG + offset) = 0xff;
-  CLIC_REG8(CLIC_INTIE  + offset) = 0;
-}
-
-// Structures for registering different interrupt handlers
-// for different parts of the application.
-typedef void (*interrupt_function_ptr_t) (void);
-
-// This function enables some of the local interrupts sources
-// used in this demo -- just those for the buttons and
-// Switch 3.
-
-void enable_local_interrupts(){
-  clic_enable(IRQ_M_LOCAL + LOCAL_INT_SW_3);
-  clic_enable(IRQ_M_LOCAL + LOCAL_INT_BTN_0);
-  clic_enable(IRQ_M_LOCAL + LOCAL_INT_BTN_1);
-  clic_enable(IRQ_M_LOCAL + LOCAL_INT_BTN_2);
-  clic_enable(IRQ_M_LOCAL + LOCAL_INT_BTN_3);
-}
-
-void disable_local_interrupts() {
-  clic_disable(IRQ_M_LOCAL + LOCAL_INT_SW_3);
-  clic_disable(IRQ_M_LOCAL + LOCAL_INT_BTN_0);
-  clic_disable(IRQ_M_LOCAL + LOCAL_INT_BTN_1);
-  clic_disable(IRQ_M_LOCAL + LOCAL_INT_BTN_2);
-  clic_disable(IRQ_M_LOCAL + LOCAL_INT_BTN_3);
-}
-
-/*Entry Point for Machine Software Interrupt Handler*/
-void msi_isr() {
-  const char msi_msg[] = "    Debouncing: (this message due to Software Interrupt)\n\n";
-  write (STDOUT_FILENO, msi_msg, strlen(msi_msg));  
-
-  //clear the  SW interrupt
-  CLIC_REG(CLIC_MSIP) = 0;
-}
-
-/*Entry Point for Machine Timer Interrupt Handler*/
-void mti_isr(){
-  const char mti_msg[] = "    Timer interrupt, done debouncing.\n\n";
-  write (STDOUT_FILENO, mti_msg, strlen(mti_msg));  
-
-  // Disable the timer interrupt. The Debounce logic sets it.
-  clic_disable(IRQ_M_TIMER);
-
-  // Enable all the local interrupts
-  enable_local_interrupts();
-}
-
-const char * instructions_msg = " \
-\n\
-                         SiFive, Inc\n\
- E21 Core IP Eval Kit 'clic_interrupts' demo.\n\
-\n\
-The Buttons 0-3 and Switch 3 are enabled as local\n\
-interrupts sources. A .5 s 'debounce' timer is used \n\
-between these interrupts. Software interrupts are\n\
-used to print a message while debouncing.\n\
-Note the priority of the interrupts sources.\n\
-\n";
-
-void print_instructions() {
-
-  write (STDERR_FILENO, instructions_msg, strlen(instructions_msg));
-
-}
-
-void button_0_isr(void) {
-
-  // Toggle Red LED
-  const char button_0_msg[] = "Button 0 was pressed. Toggle Red.\n";
-  write (STDOUT_FILENO, button_0_msg, strlen(button_0_msg));  
-  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << RED_LED_OFFSET);
-  debounce();  
-};
-
-void button_1_isr(void) {
-
-  // Toggle Green LED
-  const char button_1_msg[] = "Button 1 was pressed. Toggle Green.\n";
-  write (STDOUT_FILENO, button_1_msg, strlen(button_1_msg));  
-  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << GREEN_LED_OFFSET);
-  debounce();
-};
-
-
-void button_2_isr(void) {
-
-  // Toggle Blue LED
-  const char button_2_msg[] = "Button 2 was pressed. Toggle Blue.\n";
-  write (STDOUT_FILENO, button_2_msg, strlen(button_2_msg));  
-  GPIO_REG(GPIO_OUTPUT_VAL) = GPIO_REG(GPIO_OUTPUT_VAL) ^ (0x1 << BLUE_LED_OFFSET);
-  debounce();
-  
-};
-
-void button_3_isr(void) {
-  const char button_3_msg[] = "Button 3 was pressed! (No LEDs change).\n";
-  write (STDOUT_FILENO, button_3_msg, strlen(button_3_msg));
-  debounce();
-}
-
-void switch_3_isr(void) {
-  const char sw_3_msg[] = "Switch 3 is on! But buttons have higher priority.\n";
-  write (STDOUT_FILENO, sw_3_msg, strlen(sw_3_msg));
-  debounce();
-}
-
-void debounce(int local_interrupt_num) {
-  // Disable the most recent interrupt.
-  // Don't enable it again until the timer goes off,
-  // in .5 second.
-  
-  // Set the machine timer to go off in .5 seconds.
-  // If the timer was already set to go off, this "cancels"
-  // the current one.
-  
-  volatile uint64_t * mtime       = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
-  volatile uint64_t * mtimecmp    = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
-  uint64_t now = *mtime;
-  uint64_t then = now + .5*RTC_FREQ;
-  *mtimecmp = then;
-
-  disable_local_interrupts();
-  g_debouncing = 1;
-
-  // Enable the Machine-Timer bit in MIE
-  clic_enable(IRQ_M_TIMER);
-}
-
-// See bsp/env/<BOARD>/init.c for how this
-// interrupt vector is used.
-
-interrupt_function_ptr_t localISR[32]; 
-
-static void unmapped_interrupt(void) {
-  printf("unmapped interrupt");
-  asm volatile ("1: j 1b" ::: "memory");
-}
-
-int main(int argc, char **argv)
-{
-  // Configure LEDs as outputs.
-  GPIO_REG(GPIO_INPUT_EN)    &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
-  GPIO_REG(GPIO_OUTPUT_EN)   |=  ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
-  GPIO_REG(GPIO_OUTPUT_VAL)  |=   (0x1 << BLUE_LED_OFFSET) ;
-  GPIO_REG(GPIO_OUTPUT_VAL)  &=  ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET)) ;
-
-  // The Buttons and Switches which are used as local interrupt sources
-  // do not go through the GPIO peripheral, so they do not need to
-  // be configured as inputs.
-  
-  // Disable the timer & local interrupts until setup is done (they're
-  // not reset by default)
-  
-  // Unconfigure the CLIC before doing anything
-  for (int i = 0; i < 1024; ++i)
-    CLIC_REG8(CLIC_INTIE + i) = 0;
-
-  // Write down the software interrupt pending bit, as we shouldn't start out
-  // by debouncing anything at all.
-  CLIC_REG(CLIC_MSIP) = 0;
-
-  for (int isr = 0; isr < 32; isr++)
-    localISR[isr] = &unmapped_interrupt;
-  
-  localISR[IRQ_M_SOFT]  = msi_isr;
-  localISR[IRQ_M_TIMER] = mti_isr;
-  localISR[IRQ_M_LOCAL + LOCAL_INT_SW_3]  = switch_3_isr;
-  localISR[IRQ_M_LOCAL + LOCAL_INT_BTN_0] = button_0_isr;
-  localISR[IRQ_M_LOCAL + LOCAL_INT_BTN_1] = button_1_isr;
-  localISR[IRQ_M_LOCAL + LOCAL_INT_BTN_2] = button_2_isr;
-  localISR[IRQ_M_LOCAL + LOCAL_INT_BTN_3] = button_3_isr;
-
-  // Set up the CLIC interrupt mechanism
-  CLIC_REG(CLIC_CFG) = 4<<1; // nmBits=0; nlBits=4; nvBits=0
-
-  print_instructions();
-  
-  enable_local_interrupts();
-
-  g_debouncing = 0;
-
-  // Enable SW interrupts as well in this demo.
-  clic_enable(IRQ_M_SOFT);
-  
-  // Enable all global interrupts
-  set_csr(mstatus, MSTATUS_MIE);
-
-  volatile int foo = 1;
-  while(foo){
-    if (g_debouncing){
-      //Trigger a SW interrupt
-      CLIC_REG(CLIC_MSIP) = 1;
-      g_debouncing = 0;
-    }
-  }
-
-  return 0;
-
-}
-- 
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