From c6998b204d3d817a6c2cd0eeb020fd89b09b372e Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Fri, 9 Dec 2016 15:42:45 -0800 Subject: demo_gpio: Correct trap_entry handling to enable timer/ext interrupts --- bsp/env/common.mk | 1 + bsp/env/freedom-e300-arty/init.c | 3 +- bsp/env/freedom-e300-arty/start.S | 1 + bsp/env/freedom-e300-hifive1/entry.S | 167 ++++++++++++++++++++--------------- bsp/env/freedom-e300-hifive1/init.c | 3 +- bsp/env/freedom-e300-hifive1/start.S | 81 +++++++++++++++++ 6 files changed, 181 insertions(+), 75 deletions(-) create mode 120000 bsp/env/freedom-e300-arty/start.S create mode 100644 bsp/env/freedom-e300-hifive1/start.S diff --git a/bsp/env/common.mk b/bsp/env/common.mk index 42c0f96..8d91805 100644 --- a/bsp/env/common.mk +++ b/bsp/env/common.mk @@ -4,6 +4,7 @@ BOARD ?= freedom-e300-hifive1 ENV_DIR = $(BSP_BASE)/env PLATFORM_DIR = $(ENV_DIR)/$(BOARD) +ASM_SRCS += $(PLATFORM_DIR)/start.S ASM_SRCS += $(PLATFORM_DIR)/entry.S C_SRCS += $(PLATFORM_DIR)/init.c C_SRCS += $(ENV_DIR)/syscall.c diff --git a/bsp/env/freedom-e300-arty/init.c b/bsp/env/freedom-e300-arty/init.c index 36272f7..4313808 100644 --- a/bsp/env/freedom-e300-arty/init.c +++ b/bsp/env/freedom-e300-arty/init.c @@ -5,6 +5,7 @@ #include "encoding.h" extern int main(int argc, char** argv); +extern void trap_entry(); uint32_t get_cpu_freq() { @@ -55,7 +56,7 @@ void _init() printf("core freq at %d Hz\n", get_cpu_freq()); - write_csr(mtvec, &handle_trap); + write_csr(mtvec, &trap_entry); _exit(main(0, NULL)); } diff --git a/bsp/env/freedom-e300-arty/start.S b/bsp/env/freedom-e300-arty/start.S new file mode 120000 index 0000000..028e9bf --- /dev/null +++ b/bsp/env/freedom-e300-arty/start.S @@ -0,0 +1 @@ +../freedom-e300-hifive1/start.S \ No newline at end of file diff --git a/bsp/env/freedom-e300-hifive1/entry.S b/bsp/env/freedom-e300-hifive1/entry.S index c8ec662..524f8ee 100644 --- a/bsp/env/freedom-e300-hifive1/entry.S +++ b/bsp/env/freedom-e300-hifive1/entry.S @@ -1,81 +1,102 @@ -/*- - * Copyright (c) 2013-2015 Marko Zec, University of Zagreb - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id$ - */ +#ifndef ENTRY_S +#define ENTRY_S -/* - * Copy data, clear BSS, set small data index register and jump into main(). - * - * Assumes that the loader has already properly: - * 1) set stack pointer - * 2) set return address - * 3) invalidated caches - */ +#include "encoding.h" - .section .init - .globl _start - .type _start,@function +#if XLEN == 64 +# define LREG ld +# define SREG sd +# define REGBYTES 8 +#else +# define LREG lw +# define SREG sw +# define REGBYTES 4 +#endif -_start: - la gp, _gp - la sp, _sp + .section .text.entry + .global trap_entry +trap_entry: + addi sp, sp, -32*REGBYTES - /* Load data sections */ - la s0, _data - la s1, _edata - la s2, _data_lma - j 2f -1: - lw t0, (s2) - sw t0, (s0) - addi s2, s2, 4 - addi s0, s0, 4 -2: - bltu s0, s1, 1b + SREG x1, 1*REGBYTES(sp) + SREG x2, 2*REGBYTES(sp) + SREG x3, 3*REGBYTES(sp) + SREG x4, 4*REGBYTES(sp) + SREG x5, 5*REGBYTES(sp) + SREG x6, 6*REGBYTES(sp) + SREG x7, 7*REGBYTES(sp) + SREG x8, 8*REGBYTES(sp) + SREG x9, 9*REGBYTES(sp) + SREG x10, 10*REGBYTES(sp) + SREG x11, 11*REGBYTES(sp) + SREG x12, 12*REGBYTES(sp) + SREG x13, 13*REGBYTES(sp) + SREG x14, 14*REGBYTES(sp) + SREG x15, 15*REGBYTES(sp) + SREG x16, 16*REGBYTES(sp) + SREG x17, 17*REGBYTES(sp) + SREG x18, 18*REGBYTES(sp) + SREG x19, 19*REGBYTES(sp) + SREG x20, 20*REGBYTES(sp) + SREG x21, 21*REGBYTES(sp) + SREG x22, 22*REGBYTES(sp) + SREG x23, 23*REGBYTES(sp) + SREG x24, 24*REGBYTES(sp) + SREG x25, 25*REGBYTES(sp) + SREG x26, 26*REGBYTES(sp) + SREG x27, 27*REGBYTES(sp) + SREG x28, 28*REGBYTES(sp) + SREG x29, 29*REGBYTES(sp) + SREG x30, 30*REGBYTES(sp) + SREG x31, 31*REGBYTES(sp) - la s1, _end /* End of BSS section, word aligned */ - la s0, __bss_start /* Start of BSS section, word aligned */ - j bss_bzero_enter + csrr a0, mcause + csrr a1, mepc + mv a2, sp + jal handle_trap + csrw mepc, a0 - /* The loader doesn't bzero the BSS, so we must do it here. */ -bss_bzero_loop: - sw zero, (s0) - addi s0, s0, 4 -bss_bzero_enter: - bne s0, s1, bss_bzero_loop + # Remain in M-mode after mret + li t0, MSTATUS_MPP + csrs mstatus, t0 - la s0, __init_array_start - la s1, __init_array_end - move s2, ra - j ctor_loop_enter + LREG x1, 1*REGBYTES(sp) + LREG x2, 2*REGBYTES(sp) + LREG x3, 3*REGBYTES(sp) + LREG x4, 4*REGBYTES(sp) + LREG x5, 5*REGBYTES(sp) + LREG x6, 6*REGBYTES(sp) + LREG x7, 7*REGBYTES(sp) + LREG x8, 8*REGBYTES(sp) + LREG x9, 9*REGBYTES(sp) + LREG x10, 10*REGBYTES(sp) + LREG x11, 11*REGBYTES(sp) + LREG x12, 12*REGBYTES(sp) + LREG x13, 13*REGBYTES(sp) + LREG x14, 14*REGBYTES(sp) + LREG x15, 15*REGBYTES(sp) + LREG x16, 16*REGBYTES(sp) + LREG x17, 17*REGBYTES(sp) + LREG x18, 18*REGBYTES(sp) + LREG x19, 19*REGBYTES(sp) + LREG x20, 20*REGBYTES(sp) + LREG x21, 21*REGBYTES(sp) + LREG x22, 22*REGBYTES(sp) + LREG x23, 23*REGBYTES(sp) + LREG x24, 24*REGBYTES(sp) + LREG x25, 25*REGBYTES(sp) + LREG x26, 26*REGBYTES(sp) + LREG x27, 27*REGBYTES(sp) + LREG x28, 28*REGBYTES(sp) + LREG x29, 29*REGBYTES(sp) + LREG x30, 30*REGBYTES(sp) + LREG x31, 31*REGBYTES(sp) -ctor_loop: - lw a0, (s0) - addi s0, s0, 4 - jalr a0 -ctor_loop_enter: - bne s0, s1, ctor_loop - move ra, s2 - j _init + addi sp, sp, 32*REGBYTES + mret + +.weak handle_trap +handle_trap: + j handle_trap + +#endif diff --git a/bsp/env/freedom-e300-hifive1/init.c b/bsp/env/freedom-e300-hifive1/init.c index 343f071..05faeea 100644 --- a/bsp/env/freedom-e300-hifive1/init.c +++ b/bsp/env/freedom-e300-hifive1/init.c @@ -7,6 +7,7 @@ uint32_t cpu_freq = 0; extern int main(int argc, char** argv); +extern void trap_entry(); uint32_t mtime_lo(void) { @@ -181,7 +182,7 @@ void _init() printf("core freq at %d Hz\n", get_cpu_freq()); - write_csr(mtvec, &handle_trap); + write_csr(mtvec, &trap_entry); if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping write_csr(fcsr, 0); // initialize rounding mode, undefined at reset diff --git a/bsp/env/freedom-e300-hifive1/start.S b/bsp/env/freedom-e300-hifive1/start.S new file mode 100644 index 0000000..c8ec662 --- /dev/null +++ b/bsp/env/freedom-e300-hifive1/start.S @@ -0,0 +1,81 @@ +/*- + * Copyright (c) 2013-2015 Marko Zec, University of Zagreb + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $Id$ + */ + +/* + * Copy data, clear BSS, set small data index register and jump into main(). + * + * Assumes that the loader has already properly: + * 1) set stack pointer + * 2) set return address + * 3) invalidated caches + */ + + .section .init + .globl _start + .type _start,@function + +_start: + la gp, _gp + la sp, _sp + + /* Load data sections */ + la s0, _data + la s1, _edata + la s2, _data_lma + j 2f +1: + lw t0, (s2) + sw t0, (s0) + addi s2, s2, 4 + addi s0, s0, 4 +2: + bltu s0, s1, 1b + + la s1, _end /* End of BSS section, word aligned */ + la s0, __bss_start /* Start of BSS section, word aligned */ + j bss_bzero_enter + + /* The loader doesn't bzero the BSS, so we must do it here. */ +bss_bzero_loop: + sw zero, (s0) + addi s0, s0, 4 +bss_bzero_enter: + bne s0, s1, bss_bzero_loop + + la s0, __init_array_start + la s1, __init_array_end + move s2, ra + j ctor_loop_enter + +ctor_loop: + lw a0, (s0) + addi s0, s0, 4 + jalr a0 +ctor_loop_enter: + bne s0, s1, ctor_loop + move ra, s2 + j _init -- cgit v1.2.3 From a68a562a49da111ff722a1651dd6f74604d3247b Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Fri, 9 Dec 2016 17:27:06 -0800 Subject: demo_gpio: Make the demo more interesting with interrupts that actually do things. --- bsp/env/freedom-e300-arty/init.c | 2 +- bsp/env/hifive1.h | 6 ++-- software/demo_gpio/demo_gpio.c | 72 +++++++++++++++++++++++++++++++--------- 3 files changed, 59 insertions(+), 21 deletions(-) diff --git a/bsp/env/freedom-e300-arty/init.c b/bsp/env/freedom-e300-arty/init.c index 4313808..37e9725 100644 --- a/bsp/env/freedom-e300-arty/init.c +++ b/bsp/env/freedom-e300-arty/init.c @@ -44,7 +44,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) #endif } else { - write(1, "trap\n", 5); + write(1, "Unhandled Trap:\n", 16); _exit(1 + mcause); } return epc; diff --git a/bsp/env/hifive1.h b/bsp/env/hifive1.h index f6bef9f..11b98f8 100644 --- a/bsp/env/hifive1.h +++ b/bsp/env/hifive1.h @@ -66,16 +66,14 @@ #define BUTTON_2_OFFSET 31 #define INT_DEVICE_BUTTON_0 (INT_GPIO_BASE + BUTTON_0_OFFSET) -#define INT_DEVICE_BUTTON_1 (INT_GPIO_BASE + BUTTON_0_OFFSET) -#define INT_DEVICE_BUTTON_2 (INT_GPIO_BASE + BUTTON_0_OFFSET) +#define INT_DEVICE_BUTTON_1 (INT_GPIO_BASE + BUTTON_1_OFFSET) +#define INT_DEVICE_BUTTON_2 (INT_GPIO_BASE + BUTTON_2_OFFSET) #endif #define HAS_HFXOSC 1 #define HAS_LFROSC_BYPASS 1 - - void write_hex(int fd, uint32_t hex); #endif /* _SIFIVE_HIFIVE1_H */ diff --git a/software/demo_gpio/demo_gpio.c b/software/demo_gpio/demo_gpio.c index c977281..f568ae8 100644 --- a/software/demo_gpio/demo_gpio.c +++ b/software/demo_gpio/demo_gpio.c @@ -35,7 +35,7 @@ volatile unsigned int* g_input_en = (unsigned int *) (GPIO_BASE_ADDR + GPIO_ /*Entry Point for PLIC Interrupt Handler*/ void handle_m_ext_interrupt(){ plic_source int_num = PLIC_claim_interrupt(&g_plic); - if ((int_num >=1 ) && (int_num <= 8)) { + if ((int_num >=1 ) && (int_num < PLIC_NUM_INTERRUPTS)) { g_ext_interrupt_handlers[int_num](); } else { @@ -56,7 +56,7 @@ void handle_m_time_interrupt(){ volatile uint64_t * mtime = (uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIME); volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIMECMP); uint64_t now = *mtime; - uint64_t then = now + 3 * RTC_FREQUENCY; + uint64_t then = now + 1.5 * RTC_FREQUENCY; *mtimecmp = then; // read the current value of the LEDS and invert them. @@ -98,8 +98,10 @@ const char * instructions_msg = " \ 55555\n\ 5\n\ \n\ - SiFive E-Series Coreplex Demo on Arty Board\n \ - \n\ +SiFive E-Series Software Development Kit 'demo_gpio' program.\n\ +Every 1.5 second, the Timer Interrupt will invert the LEDs.\n\ +(Arty Dev Kit Only): Press Buttons 0, 1, 2 to Set the LEDs.\n\ +\n\ "; void print_instructions() { @@ -110,13 +112,34 @@ void print_instructions() { void button_0_handler(void) { - // All LEDS on - * g_output_vals = (0x1 << RED_LED_OFFSET) | - (0x1 << GREEN_LED_OFFSET) | - (0x1 << BLUE_LED_OFFSET); + // Red LED on + * g_output_vals |= (0x1 << RED_LED_OFFSET); + + // Clear the GPIO Pending interrupt by writing 1. + + GPIO_REG(GPIO_RISE_IP) = (0x1 << BUTTON_0_OFFSET); }; +void button_1_handler(void) { + + // Green LED On + * g_output_vals |= (1 << GREEN_LED_OFFSET); + + GPIO_REG(GPIO_RISE_IP) = (0x1 << BUTTON_1_OFFSET); + +}; + + +void button_2_handler(void) { + + // Blue LED On + * g_output_vals |= (1 << BLUE_LED_OFFSET); + + GPIO_REG(GPIO_RISE_IP) = (0x1 << BUTTON_2_OFFSET); + +}; + void reset_demo (){ @@ -131,12 +154,29 @@ void reset_demo (){ #ifdef HAS_BOARD_BUTTONS g_ext_interrupt_handlers[INT_DEVICE_BUTTON_0] = button_0_handler; + g_ext_interrupt_handlers[INT_DEVICE_BUTTON_1] = button_1_handler; + g_ext_interrupt_handlers[INT_DEVICE_BUTTON_2] = button_2_handler; #endif print_instructions(); #ifdef HAS_BOARD_BUTTONS + + // Have to enable the interrupt both at the GPIO level, + // and at the PLIC level. PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_0); + PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_1); + PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_2); + + // Priority must be set > 0 to trigger the interrupt. + PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_0, 1); + PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_1, 1); + PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_2, 1); + + GPIO_REG(GPIO_RISE_IE) |= (1 << BUTTON_0_OFFSET); + GPIO_REG(GPIO_RISE_IE) |= (1 << BUTTON_1_OFFSET); + GPIO_REG(GPIO_RISE_IE) |= (1 << BUTTON_2_OFFSET); + #endif // Set the machine timer to go off in 3 seconds. @@ -144,7 +184,7 @@ void reset_demo (){ volatile uint64_t * mtime = (uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIME); volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIMECMP); uint64_t now = *mtime; - uint64_t then = now + 3*RTC_FREQUENCY; + uint64_t then = now + 1.5*RTC_FREQUENCY; *mtimecmp = then; // Enable the Machine-External bit in MIE @@ -163,15 +203,15 @@ int main(int argc, char **argv) // can be used as both Inputs and Outputs. #ifdef HAS_BOARD_BUTTONS - * g_output_en &= ~((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x2 << BUTTON_2_OFFSET)); - * g_pullup_en &= ~((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x2 << BUTTON_2_OFFSET)); - * g_input_en |= ((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x2 << BUTTON_2_OFFSET)); + * g_output_en &= ~((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x1 << BUTTON_2_OFFSET)); + * g_pullup_en &= ~((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x1 << BUTTON_2_OFFSET)); + * g_input_en |= ((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x1 << BUTTON_2_OFFSET)); #endif - * g_input_en &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ; - * g_output_en |= ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ; - * g_output_vals|= (0x1 << BLUE_LED_OFFSET) ; - * g_output_vals &= ~((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET)) ; + * g_input_en &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ; + * g_output_en |= ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ; + * g_output_vals |= (0x1 << BLUE_LED_OFFSET) ; + * g_output_vals &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET)) ; /************************************************************************** * Set up the PLIC -- cgit v1.2.3