From 9bf66e496f4d77128d1c1edd3f435dd6ae1c010a Mon Sep 17 00:00:00 2001
From: Nathaniel Graff <nathaniel.graff@sifive.com>
Date: Fri, 4 Jan 2019 09:41:46 -0800
Subject: Look for OpenOCD in RISCV_OPENOCD_PATH

The README states that OpenOCD should be pointed to by
RISCV_OPENOCD_PATH, not RISCV_PATH. Fix the makefile to look in the
right place.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
---
 Makefile | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index a25ecc7..491a3dd 100644
--- a/Makefile
+++ b/Makefile
@@ -131,17 +131,21 @@ RISCV_GXX     := $(CROSS_COMPILE)-g++
 RISCV_OBJDUMP := $(CROSS_COMPILE)-objdump
 RISCV_GDB     := $(CROSS_COMPILE)-gdb
 RISCV_AR      := $(CROSS_COMPILE)-ar
-RISCV_OPENOCD := openocd
 else
 RISCV_GCC     := $(abspath $(RISCV_PATH)/bin/$(CROSS_COMPILE)-gcc)
 RISCV_GXX     := $(abspath $(RISCV_PATH)/bin/$(CROSS_COMPILE)-g++)
 RISCV_OBJDUMP := $(abspath $(RISCV_PATH)/bin/$(CROSS_COMPILE)-objdump)
 RISCV_GDB     := $(abspath $(RISCV_PATH)/bin/$(CROSS_COMPILE)-gdb)
 RISCV_AR      := $(abspath $(RISCV_PATH)/bin/$(CROSS_COMPILE)-ar)
-RISCV_OPENOCD := $(abspath $(RISCV_PATH)/bin/openocd)
 PATH          := $(abspath $(RISCV_PATH)/bin):$(PATH)
 endif
 
+ifeq ($(RISCV_OPENOCD_PATH),)
+RISCV_OPENOCD := openocd
+else
+RISCV_OPENOCD := $(abspath $(RISCV_OPENOCD_PATH)/bin/openocd)
+endif
+
 #############################################################
 # Compiles an instance of the MEE targeted at $(BOARD)
 #############################################################
-- 
cgit v1.2.3


From 0d260eefcf9d14e6da017254b994959923f171c7 Mon Sep 17 00:00:00 2001
From: Nathaniel Graff <nathaniel.graff@sifive.com>
Date: Fri, 4 Jan 2019 09:45:05 -0800
Subject: Add OpenOCD configurations to Arty boards

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
---
 bsp/coreip-e31-arty/openocd.cfg   | 30 ++++++++++++++++++++++++++++++
 bsp/coreip-s51-arty/openocd.cfg   | 30 ++++++++++++++++++++++++++++++
 bsp/freedom-e310-arty/openocd.cfg | 30 ++++++++++++++++++++++++++++++
 3 files changed, 90 insertions(+)
 create mode 100644 bsp/coreip-e31-arty/openocd.cfg
 create mode 100644 bsp/coreip-s51-arty/openocd.cfg
 create mode 100644 bsp/freedom-e310-arty/openocd.cfg

diff --git a/bsp/coreip-e31-arty/openocd.cfg b/bsp/coreip-e31-arty/openocd.cfg
new file mode 100644
index 0000000..34b9f88
--- /dev/null
+++ b/bsp/coreip-e31-arty/openocd.cfg
@@ -0,0 +1,30 @@
+adapter_khz     10000
+
+#source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
+
+interface ftdi
+ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi_vid_pid 0x15ba 0x002a
+
+ftdi_layout_init 0x0808 0x0a1b
+ftdi_layout_signal nSRST -oe 0x0200
+ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi_layout_signal LED -data 0x0800
+#
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank my_first_flash fespi 0x40000000 0 0 0 $_TARGETNAME 0x20004000
+init
+#reset
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+#flash protect 0 64 last off
diff --git a/bsp/coreip-s51-arty/openocd.cfg b/bsp/coreip-s51-arty/openocd.cfg
new file mode 100644
index 0000000..34b9f88
--- /dev/null
+++ b/bsp/coreip-s51-arty/openocd.cfg
@@ -0,0 +1,30 @@
+adapter_khz     10000
+
+#source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
+
+interface ftdi
+ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi_vid_pid 0x15ba 0x002a
+
+ftdi_layout_init 0x0808 0x0a1b
+ftdi_layout_signal nSRST -oe 0x0200
+ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi_layout_signal LED -data 0x0800
+#
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank my_first_flash fespi 0x40000000 0 0 0 $_TARGETNAME 0x20004000
+init
+#reset
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+#flash protect 0 64 last off
diff --git a/bsp/freedom-e310-arty/openocd.cfg b/bsp/freedom-e310-arty/openocd.cfg
new file mode 100644
index 0000000..ba13207
--- /dev/null
+++ b/bsp/freedom-e310-arty/openocd.cfg
@@ -0,0 +1,30 @@
+adapter_khz     10000
+
+#source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
+
+interface ftdi
+ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi_vid_pid 0x15ba 0x002a
+
+ftdi_layout_init 0x0808 0x0a1b
+ftdi_layout_signal nSRST -oe 0x0200
+ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi_layout_signal LED -data 0x0800
+#
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank my_first_flash fespi 0x20000000 0 0 0 $_TARGETNAME 0x10014000
+init
+#reset
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+#flash protect 0 64 last off
-- 
cgit v1.2.3